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From: Gerd Hoffmann <kraxel@redhat.com>
Date: Thu, 08 Jun 2017 21:48:53 +0200
In-Reply-To: <20170608204026-mutt-send-email-mst@kernel.org>
References: <20170608161013.17920-1-lersek@redhat.com>
	<20170608204026-mutt-send-email-mst@kernel.org>
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Subject: Re: [Qemu-devel] [PATCH] q35/mch: implement extended TSEG sizes
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To: "Michael S. Tsirkin" <mst@redhat.com>, Laszlo Ersek <lersek@redhat.com>
Cc: qemu devel list <qemu-devel@nongnu.org>, Paolo Bonzini <pbonzini@redhat.com>

  Hi,

> I really dislike negotiation being re-invented for each device.=C2=A0=C2=
=A0Do
> we
> need these tricks?=C2=A0=C2=A0Can we just do fw cfg with standard discove=
ry?
> This ties in with my proposal to generalize smi features to
> generic ones.

Device properties should be part of the device.
We should have done this with the smi too.

A more standard way to handle this would be to add a vendor-specific
pci capability and place the register there.  Not sure we have room for
that in the pci config space though.

cheers,
  Gerd