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From: Gerd Hoffmann <kraxel@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>,
	qemu devel list <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH] q35/mch: implement extended TSEG sizes
Date: Fri, 09 Jun 2017 22:01:18 +0200	[thread overview]
Message-ID: <1497038478.10080.1.camel@redhat.com> (raw)
In-Reply-To: <7a7647cd-3d7a-0b6f-0691-d656c9026f44@redhat.com>

On Fri, 2017-06-09 at 13:40 +0200, Paolo Bonzini wrote:
> 
> On 08/06/2017 21:55, Michael S. Tsirkin wrote:
> > We don't have room anywhere in PCI config space. Laszlo makes
> > argument
> > why it's safe for this device based on spec but it's anyone's guess
> > whether current and future software will follow spec.  In short,
> > going
> > anywhere near the emulated device has a potential to break some
> > drivers.
> 
> There are no such drivers.  The MCH and PCH are only touched by the
> firmware, not by the OS.

Yea.  That is *exactly* the reason why I think simply using the 0x50
offset probably works fine in practice even though I suspect on
physical hardware it might be some undocumented register.  Much of the
stuff in the host bridge pci config space is firmware territory, and we
run qemu specific firmware *anyway*.

cheers,
  Gerd

  reply	other threads:[~2017-06-09 20:01 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-08 16:10 [Qemu-devel] [PATCH] q35/mch: implement extended TSEG sizes Laszlo Ersek
2017-06-08 16:34 ` Paolo Bonzini
2017-06-08 18:31   ` Laszlo Ersek
2017-06-08 17:41 ` Michael S. Tsirkin
2017-06-08 19:48   ` Gerd Hoffmann
2017-06-08 19:55     ` Michael S. Tsirkin
2017-06-08 23:01       ` Laszlo Ersek
2017-06-09  0:19         ` Michael S. Tsirkin
2017-06-09 17:41           ` Laszlo Ersek
2017-06-09 11:40       ` Paolo Bonzini
2017-06-09 20:01         ` Gerd Hoffmann [this message]
2017-06-14 18:25           ` Michael S. Tsirkin
2017-06-15  7:07             ` Gerd Hoffmann
2017-06-16  3:23               ` Michael S. Tsirkin

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