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From: Gerd Hoffmann <kraxel@redhat.com>
Date: Fri, 09 Jun 2017 22:01:18 +0200
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References: <20170608161013.17920-1-lersek@redhat.com>
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Subject: Re: [Qemu-devel] [PATCH] q35/mch: implement extended TSEG sizes
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To: Paolo Bonzini <pbonzini@redhat.com>, "Michael S. Tsirkin" <mst@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>, qemu devel list <qemu-devel@nongnu.org>

On Fri, 2017-06-09 at 13:40 +0200, Paolo Bonzini wrote:
>=20
> On 08/06/2017 21:55, Michael S. Tsirkin wrote:
> > We don't have room anywhere in PCI config space. Laszlo makes
> > argument
> > why it's safe for this device based on spec but it's anyone's guess
> > whether current and future software will follow spec.=C2=A0=C2=A0In sho=
rt,
> > going
> > anywhere near the emulated device has a potential to break some
> > drivers.
>=20
> There are no such drivers.=C2=A0=C2=A0The MCH and PCH are only touched by=
 the
> firmware, not by the OS.

Yea.  That is *exactly* the reason why I think simply using the 0x50
offset probably works fine in practice even though I suspect on
physical hardware it might be some undocumented register.  Much of the
stuff in the host bridge pci config space is firmware territory, and we
run qemu specific firmware *anyway*.

cheers,
  Gerd