From: "Emilio G. Cota" <cota@braap.org>
To: qemu-devel@nongnu.org
Cc: "Daniel P . Berrange" <berrange@redhat.com>,
"Lluís Vilanova" <vilanova@ac.upc.edu>,
"Stefan Hajnoczi" <stefanha@redhat.com>,
"Richard Henderson" <rth@twiddle.net>,
"Laurent Desnogues" <laurent.desnogues@gmail.com>
Subject: [Qemu-devel] [PATCH 7/7] trace: Statically enable all TCG guest events
Date: Mon, 26 Jun 2017 18:04:41 -0400 [thread overview]
Message-ID: <1498514681-3059-8-git-send-email-cota@braap.org> (raw)
In-Reply-To: <1498514681-3059-1-git-send-email-cota@braap.org>
From: Lluís Vilanova <vilanova@ac.upc.edu>
The optimizations of this series makes it feasible to have them
available on all builds.
After this patchset we avoid the ~2X slowdown that enabling
TCG events used to incur, as shown in the bar chart below.
[orig==before; new==after]
NBench score; higher is better
180 +-+--------+----------+----------+---------+----------+----------+----------+----------+----------+---------+----------+--------+-+
| |
| *** $$$$%% orig |
160 +-+....................................*.*.$..$.%............................................................orig-enabled +-+
| * * $ $ % new |
140 +-+....................................*.*.$..$.%............................................................new-disabled.......+-+
| * * $ $ % |
| * * $ $ % |
120 +-+....................................*.*.$..$.%...............................................................................+-+
| * * $ $ % |
| * * $ $ % |
100 +-+....................................*.*.$..$.%.....$$$%%%....................................................................+-+
| * * $ $ % *** $ $ % *** $$$%% |
80 +-+....................................*.*.$..$.%.*.*.$.$..%.*.*.$.$.%..........................................................+-+
| * * $ $ % * * $ $ % * * $ $ % |
| * * $ $ % * * $ $ % * * $ $ % |
60 +-+.........................***..$$$%%.*.*##..$.%.*.*.$.$..%.*.*.$.$.%..***.$$$%%...............................................+-+
| **** $$$%% * * $ $ % * * # $ % * *## $ % * * $ $ % * * $ $ % |
| * * $ $ % * * $ $ % * * # $ % * * # $ % * *## $ % * * $ $ % |
40 +-+..............*..*.$.$.%.*.*..$.$.%.*.*.#..$.%.*.*.#.$..%.*.*.#.$.%..*.*.$.$.%...............................................+-+
| * * $ $ % * * $ $ % * * # $ % * * # $ % * * # $ % * *## $ % *** $$$%%% |
20 +-+....***.$$$%%.*..*##.$.%.*.*###.$.%.*.*.#..$.%.*.*.#.$..%.*.*.#.$.%..*.*.#.$.%..................................*.*.$.$..%...+-+
| * *## $ % * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % * *## $ % |
| * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % ***###$$%% ***##$$$%% * * # $ % |
0 +-+----***##$$%%-****##$$%%-***###$$%%-***##$$$%%-***##$$%%%-***##$$%%--***##$$%%-****##$$%%-***###$$%%-***##$$$%%-***##$$%%%---+-+
NUMERIC SORTSTRING SORT BITFIEFP EMULATION ASSIGNMENT IDEA HUFFMAN FOURIER NEURLU DECOMPOSITION gmean
png: http://imgur.com/a/8XG5S
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
[cota: add perf numbers]
Signed-off-by: Emilio G. Cota <cota@braap.org>
---
trace-events | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/trace-events b/trace-events
index bae63fd..f9dbd7f 100644
--- a/trace-events
+++ b/trace-events
@@ -106,7 +106,7 @@ vcpu guest_cpu_reset(void)
#
# Mode: user, softmmu
# Targets: TCG(all)
-disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d", "vaddr=0x%016"PRIx64" info=%d"
+vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d", "vaddr=0x%016"PRIx64" info=%d"
# @num: System call number.
# @arg*: System call argument value.
@@ -115,7 +115,7 @@ disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d", "vaddr=0x
#
# Mode: user
# Targets: TCG(all)
-disable vcpu guest_user_syscall(uint64_t num, uint64_t arg1, uint64_t arg2, uint64_t arg3, uint64_t arg4, uint64_t arg5, uint64_t arg6, uint64_t arg7, uint64_t arg8) "num=0x%016"PRIx64" arg1=0x%016"PRIx64" arg2=0x%016"PRIx64" arg3=0x%016"PRIx64" arg4=0x%016"PRIx64" arg5=0x%016"PRIx64" arg6=0x%016"PRIx64" arg7=0x%016"PRIx64" arg8=0x%016"PRIx64
+vcpu guest_user_syscall(uint64_t num, uint64_t arg1, uint64_t arg2, uint64_t arg3, uint64_t arg4, uint64_t arg5, uint64_t arg6, uint64_t arg7, uint64_t arg8) "num=0x%016"PRIx64" arg1=0x%016"PRIx64" arg2=0x%016"PRIx64" arg3=0x%016"PRIx64" arg4=0x%016"PRIx64" arg5=0x%016"PRIx64" arg6=0x%016"PRIx64" arg7=0x%016"PRIx64" arg8=0x%016"PRIx64
# @num: System call number.
# @ret: System call result value.
@@ -124,4 +124,4 @@ disable vcpu guest_user_syscall(uint64_t num, uint64_t arg1, uint64_t arg2, uint
#
# Mode: user
# Targets: TCG(all)
-disable vcpu guest_user_syscall_ret(uint64_t num, uint64_t ret) "num=0x%016"PRIx64" ret=0x%016"PRIx64
+vcpu guest_user_syscall_ret(uint64_t num, uint64_t ret) "num=0x%016"PRIx64" ret=0x%016"PRIx64
--
2.7.4
next prev parent reply other threads:[~2017-06-26 22:04 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-26 22:04 [Qemu-devel] [PATCH v9 0/7] trace: Optimize per-vCPU TCG tracing states Emilio G. Cota
2017-06-26 22:04 ` [Qemu-devel] [PATCH 1/7] exec: [tcg] Refactor flush of per-CPU virtual TB cache Emilio G. Cota
2017-06-26 22:04 ` [Qemu-devel] [PATCH 2/7] cpu: allocate cpu->trace_dstate in place Emilio G. Cota
2017-06-26 22:04 ` [Qemu-devel] [PATCH 3/7] trace: [tcg] Delay changes to dynamic state when translating Emilio G. Cota
2017-06-26 22:04 ` [Qemu-devel] [PATCH 4/7] exec: [tcg] Use different TBs according to the vCPU's dynamic tracing state Emilio G. Cota
2017-06-26 22:04 ` [Qemu-devel] [PATCH 5/7] trace: [tcg] Do not generate TCG code to trace dinamically-disabled events Emilio G. Cota
2017-06-26 22:04 ` [Qemu-devel] [PATCH 6/7] trace: [tcg, trivial] Re-align generated code Emilio G. Cota
2017-06-26 22:04 ` Emilio G. Cota [this message]
2017-07-10 12:07 ` [Qemu-devel] [PATCH v9 0/7] trace: Optimize per-vCPU TCG tracing states Stefan Hajnoczi
2017-07-11 10:55 ` Stefan Hajnoczi
2017-07-11 12:35 ` Lluís Vilanova
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