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[76.14.228.138]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-219dc9f5dc5sm331894015ad.210.2025.01.08.14.53.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Jan 2025 14:54:00 -0800 (PST) Message-ID: <14a2173f-e1b4-4290-99e5-c46b4153d800@linaro.org> Date: Wed, 8 Jan 2025 14:53:57 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/5] semihosting: Reduce target specific code To: =?UTF-8?Q?Alex_Benn=C3=A9e?= , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= Cc: qemu-devel@nongnu.org, Pierrick Bouvier , Alistair Francis , Kito Cheng , Keith Packard , Daniel Henrique Barboza , Thomas Huth References: <20250103171037.11265-1-philmd@linaro.org> <87h669ba39.fsf@draig.linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <87h669ba39.fsf@draig.linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/8/25 07:26, Alex Bennée wrote: > Philippe Mathieu-Daudé writes: > >> This series makes semihosting config.c and console.c >> target agnostic, building them once, removing symbol >> collision of the following functions in the single >> binary: > > Queued to semihosting/next, thanks. > >> - qemu_semihosting_chardev_init >> - qemu_semihosting_config_options >> - qemu_semihosting_config_opts >> - qemu_semihosting_enable >> - semihosting_arg_fallback >> - semihosting_enabled >> - semihosting_get_argc >> - semihosting_get_target >> >> This function is still problematic, being built for >> each target: >> >> - qemu_semihosting_guestfd_init >> >> Note, it depends on CONFIG_ARM_COMPATIBLE_SEMIHOSTING >> which is target specific, so doesn't scale in a >> heterogeneous setup like the ZynqMP machine, having >> ARM cores with CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y and >> MicroBlaze ones with CONFIG_ARM_COMPATIBLE_SEMIHOSTING=n. > > Does MicroBlaze even do semihosting? > >> I suppose the semihosting API needs rework to consider >> the CPUClass? I'll let that investigation for the >> maintainer ;) > > Hmm most of it is already handled as EXCP_SEMIHOST exceptions are dealt > with withing the target specific exception handlers. > do_common_semihosting could be renamed though - do_armc_semihosting() > maybe? > > If we have the full list of CPUs at qemu_semihosting_chardev_init() time > we could then selectively do the bits of qemu_semihosting_guestfd_init() > depending on what combination we have. For normal open/read/write stuff > I think they could co-exist. > > Two independent cores could still write to stdout (0) though. Fixing > that would need a per-cpu semihosting config. None of the semihosting stuff is smp safe. The assumption in the homogeneous cpu case is that the guest uses it's own mutexes to protect the semihosting calls. This is obviously more complicated in the heterogeneous case, but it *still* should not be qemu's problem. r~