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Thu, 26 Oct 2023 15:24:55 +0000 (GMT) Message-ID: <14bca721-8cc0-428a-9898-038b07323571@linux.ibm.com> Date: Thu, 26 Oct 2023 10:24:54 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 02/10] hw/fsi: Introduce IBM's scratchpad To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, clg@kaod.org, peter.maydell@linaro.org, andrew@codeconstruct.com.au, joel@jms.id.au, pbonzini@redhat.com, marcandre.lureau@redhat.com, berrange@redhat.com, thuth@redhat.com, lvivier@redhat.com Cc: qemu-arm@nongnu.org, Andrew Jeffery References: <20231021211720.3571082-1-ninad@linux.ibm.com> <20231021211720.3571082-3-ninad@linux.ibm.com> <957bc5db-53aa-6946-edf3-3b728a52b660@linaro.org> <4b2e68dd-db49-4041-ee5a-ae2b836bd255@linaro.org> Content-Language: en-US From: Ninad Palsule In-Reply-To: <4b2e68dd-db49-4041-ee5a-ae2b836bd255@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: VRDoNUX0ltXdaisX8JliAu-aYsBzZNHw X-Proofpoint-ORIG-GUID: qaOyQk5-T34quNQQXWy0oLndDtnBm4r- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-26_13,2023-10-26_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 suspectscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 phishscore=0 mlxscore=0 spamscore=0 impostorscore=0 clxscore=1015 mlxlogscore=740 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310170001 definitions=main-2310260133 Received-SPF: pass client-ip=148.163.158.5; envelope-from=ninad@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 10/24/23 02:08, Philippe Mathieu-Daudé wrote: > On 23/10/23 19:08, Ninad Palsule wrote: >> Hello Philippe, >> >> On 10/23/23 10:00, Philippe Mathieu-Daudé wrote: >>> On 21/10/23 23:17, Ninad Palsule wrote: >>>> This is a part of patchset where scratchpad is introduced. >>>> >>>> The scratchpad provides a set of non-functional registers. The >>>> firmware >>>> is free to use them, hardware does not support any special management >>>> support. The scratchpad registers can be read or written from LBUS >>>> slave. >>>> >>>> In this model, The LBUS device is parent for the scratchpad. >>>> >>>> Signed-off-by: Andrew Jeffery >>>> Signed-off-by: Ninad Palsule >>>> --- >>>> v2: >>>> - Incorporated Joel's review comments. >>>> v5: >>>> - Incorporated review comments by Cedric. >>>> v6: >>>> - Incorporated review comments by Daniel. >>>> --- >>>>   meson.build                        |  1 + >>>>   hw/fsi/trace.h                     |  1 + >>>>   include/hw/fsi/engine-scratchpad.h | 32 ++++++++++ >>>>   include/hw/fsi/fsi.h               | 16 +++++ >>>>   hw/fsi/engine-scratchpad.c         | 93 >>>> ++++++++++++++++++++++++++++++ >>>>   hw/fsi/Kconfig                     |  4 ++ >>>>   hw/fsi/meson.build                 |  1 + >>>>   hw/fsi/trace-events                |  2 + >>>>   8 files changed, 150 insertions(+) >>>>   create mode 100644 hw/fsi/trace.h >>>>   create mode 100644 include/hw/fsi/engine-scratchpad.h >>>>   create mode 100644 include/hw/fsi/fsi.h >>>>   create mode 100644 hw/fsi/engine-scratchpad.c >>>>   create mode 100644 hw/fsi/trace-events >>> >>> >>>> diff --git a/include/hw/fsi/fsi.h b/include/hw/fsi/fsi.h >>>> new file mode 100644 >>>> index 0000000000..e65f26f17b >>>> --- /dev/null >>>> +++ b/include/hw/fsi/fsi.h >>>> @@ -0,0 +1,16 @@ >>>> +/* >>>> + * SPDX-License-Identifier: GPL-2.0-or-later >>>> + * Copyright (C) 2023 IBM Corp. >>>> + * >>>> + * IBM Flexible Service Interface >>>> + */ >>>> +#ifndef FSI_FSI_H >>>> +#define FSI_FSI_H >>>> + >>>> +/* Bitwise operations at the word level. */ >>>> +#define BE_BIT(x)                          BIT(31 - (x)) >>>> +#define GENMASK(t, b) \ >>>> +    (((1ULL << ((t) + 1)) - 1) & ~((1ULL << (b)) - 1)) >>> >>> Please use MAKE_64BIT_MASK() from "qemu/bitops.h". >> >> The GENMASK and MAKE_64BIT_MASK macros are invoke differently. >> >> GENMASK is invoked with bit t and bit b (t:b) and it provides the >> mask and >> >> MAKE_64BIT_MASK uses shift and length. > > Don't we have: > > #define GENMASK(t, b) MAKE_64BIT_MASK(t, b - t + 1) > > ? You are right. I am able to use this macro. I have removed some unused macros. Thanks for the review. Regards, Ninad > >> Thanks for the review. >> >> Regards, >> >> Ninad >> >> >>>> +#define BE_GENMASK(t, b)                   GENMASK(BE_BIT(t), >>>> BE_BIT(b)) >>>> + >>>> +#endif >>> >