qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: "Cédric Le Goater" <clg@kaod.org>,
	"Alexander Graf" <agraf@suse.de>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model
Date: Mon, 24 Jul 2017 15:04:05 +1000	[thread overview]
Message-ID: <1500872645.10674.52.camel@kernel.crashing.org> (raw)
In-Reply-To: <20170724032853.GB17228@umbus.fritz.box>

On Mon, 2017-07-24 at 13:28 +1000, David Gibson wrote:
> > So yes, in PAPR there's an "allocator" because the hypervisor will
> > create a guest "virtual" (or logical to use PAPR terminology) interrupt
> > number space, in order to represents the various interrupts into the
> > guest.
> 
> Ok, but are each of those logical irqs bound to a specific device/PHB
> line/whatever, or can they be configured by the guest?

So for clarity, let's first establish the terminology :-)

 - HW number is a HW interrupt number on a "bare metal" system or
powernv guest. For now we will ignore those, they are effectively a
side effect of how skiboot configure the XIVE and qemu per-se doesn't
allocate them.

 - A logical number is a "guest physical" interrupt number for a PAPR
guest. These fall into roughly 2 categories at the moment:

    * "interrupts" (or related) properties in the DT, typically
interrupts for a PCI device, ranges of MSIs etc... that correspond to
HW sources from a PHB.

    * "generic IPIs". Those are ranges of "generic" interrupts that the
hypervisor gives the guest. On a real system, they correspond to chunks
allocated off a HW facility for generic interrupts. Generic interrupts
are the same as normal interrupts from the prespective of
managing/receiving them, but are "triggered" by an MMIO to a certain HW
page. There's a DT property telling the guest the interrupt number
ranges for these guys.

So that logical number above is what a PAPR guest obtains from the DT
and uses for the various H-call used to manage and configure interrupt
sources.

In addition, the XIVE supports renumbering the interrupt number that
you obtain in the queues. Both bare metal linux, KVM and guests make
use of this. This only changes the number you observe in a queue when
you receive an interrupt, it has no effect on the HW number or logical
number used for the various management calls.

This is used by Linux so that:

  - On bare metal systems or PAPR guest with "exploitation mode" (ie,
PAPR guest directly using the XIVE), we put the linux interrupt number
in there as to avoid the reverse-mapping done by linux otherwise when
receiving an interrupt.

  - On PARP guests using the legacy hcalls, KVM configures the logical
number there.

> > Those numbers however are just tokens, they don't have to represent any
> > real HW concept. So they can be "allocated" in a rather fixed way, for
> > example, you could have something like a fixed map where you put all
> > the PCI interrupts at a certain number (a factor of the PHB# with room
> > or a fix number per PHB, maybe 16K or so, the HW does 4K max). Another
> > based would have a chunk of "general purpose" IPIs (for use for actual
> > IPIs and for other things to come). And a range for the virtual device
> > interrupts for example. Or you can just use an allocator.
> 
> Hm.  So what I'm meaning by an "allocator" is something at least
> partially dynamic.  Something you say "give me an irq" and it gives
> you the next available or similar.  As opposed to any mapping from
> devices to (logical) irqs, which the machine will need to supply one
> way or another.

For the sake of repeatability/migration etc... I think a mapping is
better than an allocator.  IE, a fixed number scheme so that the range
of interrupts for PHB#x is always a fixed function of x.

We can fix the number of "generic" interrupts given to a guest. The
only requirements from a PAPR perspective is that there should be at
least as many as there are possible threads in the guest so they can be
used as IPIs.

But we may need more for other things. We can make this a machine
parameter with a default value of something like 4096. If we call N
that number of extra generic interrupts, then the number of generic
interrutps would be #possible-vcpu's + N, or something like that.

> > But it's fundamentally an allocator that sits in the hypervisor, so in
> > our case, I would say in the spapr "component" of XIVE, rather than the
> > XIVE HW model itself.
> 
> Maybe..

You are right in that a mapping is a better term than an allocator
here.

> > Now what Cedric did, because XIVE is very complex and we need something
> > for PAPR quickly, is not a complete HW model, but a somewhat simplified
> > one that only handles what PAPR exposes. So in that case where the
> > allocator sits is a bit of a TBD...
> 
> Hm, ok.  My concern here is that "dynamic" allocation of irqs at the
> machine type level needs extreme caution, or the irqs may not be
> stable which will generally break migration.

Yes you are right. We should probably create a more "static" scheme.

Cheers,
Ben.

  parent reply	other threads:[~2017-07-24  5:04 UTC|newest]

Thread overview: 122+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-05 17:13 [Qemu-devel] [RFC PATCH 00/26] guest exploitation of the XIVE interrupt controller (POWER9) Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 01/26] spapr: introduce the XIVE_EXPLOIT option in CAS Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 02/26] spapr: populate device tree depending on XIVE_EXPLOIT option Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 03/26] target/ppc/POWER9: add POWERPC_EXCP_POWER9 Cédric Le Goater
2017-07-10 10:26   ` David Gibson
2017-07-10 12:49     ` Cédric Le Goater
2017-07-10 21:00       ` Benjamin Herrenschmidt
2017-07-11  9:01         ` Cédric Le Goater
2017-07-11 13:27           ` David Gibson
2017-07-11 13:52             ` Cédric Le Goater
2017-07-11 21:20               ` Benjamin Herrenschmidt
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model Cédric Le Goater
2017-07-19  3:08   ` David Gibson
2017-07-19  3:23     ` David Gibson
2017-07-19  3:56     ` Benjamin Herrenschmidt
2017-07-19  4:01       ` David Gibson
2017-07-19  4:18         ` Benjamin Herrenschmidt
2017-07-19  4:25           ` David Gibson
2017-07-19  4:02     ` Benjamin Herrenschmidt
2017-07-21  7:50       ` David Gibson
2017-07-21  8:21         ` Benjamin Herrenschmidt
2017-07-24  3:28           ` David Gibson
2017-07-24  3:53             ` Alexey Kardashevskiy
2017-07-24  5:04             ` Benjamin Herrenschmidt [this message]
2017-07-24  5:38               ` David Gibson
2017-07-24  7:20                 ` Benjamin Herrenschmidt
2017-07-24 10:03                   ` David Gibson
2017-07-25  8:52                     ` Cédric Le Goater
2017-07-25 12:39                       ` David Gibson
2017-07-25 13:48                         ` Cédric Le Goater
2017-07-24 13:00     ` Cédric Le Goater
2017-07-25  1:26       ` [Qemu-devel] [Qemu-ppc] " Alexey Kardashevskiy
2017-07-25  2:17         ` David Gibson
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 05/26] ppc/xive: define XIVE internal tables Cédric Le Goater
2017-07-19  3:24   ` David Gibson
2017-07-24 12:52     ` Cédric Le Goater
2017-07-25  2:16       ` David Gibson
2017-07-25 15:54         ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 06/26] ppc/xive: introduce a XIVE interrupt source model Cédric Le Goater
2017-07-24  4:02   ` David Gibson
2017-07-24  6:00     ` Alexey Kardashevskiy
2017-07-24 15:20       ` Cédric Le Goater
2017-07-25  3:06         ` Alexey Kardashevskiy
2017-07-24 15:13     ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 07/26] ppc/xive: add MMIO handlers to the XIVE interrupt source Cédric Le Goater
2017-07-24  4:29   ` David Gibson
2017-07-24  8:56     ` Benjamin Herrenschmidt
2017-07-24 15:55     ` Cédric Le Goater
2017-07-25 12:21       ` David Gibson
2017-07-25 15:42         ` Cédric Le Goater
2017-07-24  6:50   ` Alexey Kardashevskiy
2017-07-24 15:39     ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 08/26] ppc/xive: add flags " Cédric Le Goater
2017-07-24  4:36   ` David Gibson
2017-07-24  7:00     ` Benjamin Herrenschmidt
2017-07-24  9:50       ` David Gibson
2017-07-24 11:07         ` Benjamin Herrenschmidt
2017-07-24 11:47           ` Cédric Le Goater
2017-07-25  4:19             ` David Gibson
2017-07-25  5:49               ` Benjamin Herrenschmidt
2017-07-25  4:18           ` David Gibson
2017-07-25  5:47             ` Benjamin Herrenschmidt
2017-07-25  8:28               ` Cédric Le Goater
2017-07-25 12:24               ` David Gibson
2017-07-25  8:17         ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 09/26] ppc/xive: add an overall memory region for the ESBs Cédric Le Goater
2017-07-24  4:49   ` David Gibson
2017-07-24  6:09     ` Benjamin Herrenschmidt
2017-07-24  6:39       ` David Gibson
2017-07-24 13:27         ` Cédric Le Goater
2017-07-25  2:19           ` David Gibson
2017-07-24 13:25       ` Cédric Le Goater
2017-07-25  2:19         ` David Gibson
2017-07-25  9:50           ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 10/26] ppc/xive: record interrupt source MMIO address for hcalls Cédric Le Goater
2017-07-24  5:11   ` David Gibson
2017-07-24 13:45     ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 11/26] ppc/xics: introduce a print_info() handler to the ICS and ICP objects Cédric Le Goater
2017-07-24  5:13   ` David Gibson
2017-07-24 13:58     ` Cédric Le Goater
2017-07-25 13:26       ` David Gibson
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 12/26] ppc/xive: add a print_info() handler for the interrupt source Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 13/26] ppc/xive: introduce a XIVE interrupt presenter model Cédric Le Goater
2017-07-24  6:05   ` David Gibson
2017-07-24 14:02     ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 14/26] ppc/xive: add MMIO handlers to the " Cédric Le Goater
2017-07-24  6:35   ` David Gibson
2017-07-24 14:44     ` Cédric Le Goater
2017-07-25  4:20       ` David Gibson
2017-07-25  9:08         ` Cédric Le Goater
2017-07-25 13:21           ` David Gibson
2017-07-25 15:01             ` Cédric Le Goater
2017-07-26  2:02               ` David Gibson
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 15/26] ppc/xive: push EQ data in OS event queues Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 16/26] ppc/xive: notify CPU when interrupt priority is more privileged Cédric Le Goater
2017-09-09  7:39   ` Benjamin Herrenschmidt
2017-09-09  8:08     ` Cédric Le Goater
2017-09-09  8:40       ` Benjamin Herrenschmidt
2017-09-09  8:24     ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 17/26] ppc/xive: add hcalls support Cédric Le Goater
2017-07-24  9:39   ` [Qemu-devel] [Qemu-ppc] " Alexey Kardashevskiy
2017-07-24 14:55     ` Cédric Le Goater
2017-07-25  2:09       ` Alexey Kardashevskiy
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 18/26] ppc/xive: add device tree support Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 19/26] ppc/xive: introduce a helper to map the XIVE memory regions Cédric Le Goater
2017-07-25  2:54   ` [Qemu-devel] [Qemu-ppc] " Alexey Kardashevskiy
2017-07-25  9:18     ` Cédric Le Goater
2017-07-25 14:16       ` Alexey Kardashevskiy
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 20/26] ppc/xive: introduce a helper to create XIVE interrupt source objects Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 21/26] ppc/xive: introduce routines to allocate IRQ numbers Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 22/26] ppc/xive: create an XIVE interrupt source to handle IPIs Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 23/26] spapr: add a XIVE object to the sPAPR machine Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 24/26] spapr: include the XIVE interrupt source for IPIs Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 25/26] spapr: print the XIVE interrupt source for IPIs in the monitor Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 26/26] spapr: force XIVE exploitation mode for POWER9 (HACK) Cédric Le Goater
2017-07-25  2:43   ` [Qemu-devel] [Qemu-ppc] " Alexey Kardashevskiy
2017-07-25  9:20     ` Cédric Le Goater
2017-07-10 10:24 ` [Qemu-devel] [RFC PATCH 00/26] guest exploitation of the XIVE interrupt controller (POWER9) David Gibson
2017-07-10 12:36   ` Cédric Le Goater
2017-07-19  3:00 ` David Gibson
2017-07-19  3:55   ` Benjamin Herrenschmidt
2017-07-24  7:28     ` Cédric Le Goater

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1500872645.10674.52.camel@kernel.crashing.org \
    --to=benh@kernel.crashing.org \
    --cc=agraf@suse.de \
    --cc=clg@kaod.org \
    --cc=david@gibson.dropbear.id.au \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).