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* [Qemu-devel] [PULL 0/8] target-mips queue
@ 2017-08-03 14:45 Yongbok Kim
  2017-08-03 14:45 ` [Qemu-devel] [PULL 1/8] target-mips: Don't stop on [d]mtc0 DESAVE/KScratch Yongbok Kim
                   ` (8 more replies)
  0 siblings, 9 replies; 16+ messages in thread
From: Yongbok Kim @ 2017-08-03 14:45 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell

The following changes since commit aaaec6acad7cf97372d48c1b09126a09697519c8:

  Update version for v2.10.0-rc1 release (2017-08-02 16:36:32 +0100)

are available in the git repository at:

  git://github.com/yongbok/upstream-qemu.git tags/mips-20170803

for you to fetch changes up to d673a68db6963e86536b125af464bb6ed03eba33:

  target/mips: Fix RDHWR CC with icount (2017-08-02 22:18:13 +0100)

----------------------------------------------------------------
MIPS patches 2017-08-03

Changes:
KVM T&E segment support for TCG
malta: leave space for the bootmap after the initrd
Apply CP0.PageMask before writing into TLB entry
Fix fallout from indirect branch optimisation

----------------------------------------------------------------

Aurelien Jarno (1):
  mips/malta: leave space for the bootmap after the initrd

James Hogan (6):
  target-mips: Don't stop on [d]mtc0 DESAVE/KScratch
  mips: Improve segment defs for KVM T&E guests
  mips: Add KVM T&E segment support for TCG
  target/mips: Use BS_EXCP where interrupts are expected
  target/mips: Drop redundant gen_io_start/stop()
  target/mips: Fix RDHWR CC with icount

Leon Alrae (1):
  target-mips: apply CP0.PageMask before writing into TLB entry

 hw/mips/addr.c            | 12 ++++++++
 hw/mips/mips_malta.c      | 24 +++++++--------
 include/hw/mips/cpudevs.h |  5 ++--
 target/mips/helper.c      | 27 +++++++++--------
 target/mips/op_helper.c   |  5 ++--
 target/mips/translate.c   | 74 ++++++++++++++++++++++++++++++-----------------
 6 files changed, 90 insertions(+), 57 deletions(-)

-- 
2.7.4

^ permalink raw reply	[flat|nested] 16+ messages in thread
* [Qemu-devel] [PULL 0/8] target-mips queue
@ 2017-02-20 20:30 Yongbok Kim
  2017-02-20 20:47 ` no-reply
  2017-02-21  9:34 ` Peter Maydell
  0 siblings, 2 replies; 16+ messages in thread
From: Yongbok Kim @ 2017-02-20 20:30 UTC (permalink / raw)
  To: qemu-devel

Hi,

This is pull-req for target-mips.

Regards,
Yongbok

The following changes since commit 56f9e46b841c7be478ca038d8d4085d776ab4b0d:

  Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2017-02-20' into staging (2017-02-20 17:42:47 +0000)

are available in the git repository at:

  git://github.com/yongbok/upstream-qemu.git tags/mips-20170220

for you to fetch changes up to 0a1fdcc94338ea12f7deba71e795c01989152752:

  hw/mips: MIPS Boston board support (2017-02-20 19:37:28 +0000)

----------------------------------------------------------------
MIPS patches 2017-02-20

Changes:
* Add MIPS Boston board support

----------------------------------------------------------------

Paul Burton (8):
  hw/mips_cmgcr: allow GCR base to be moved
  hw/mips_gictimer: provide API for retrieving frequency
  hw/mips_gic: Update pin state on mask changes
  target-mips: Provide function to test if a CPU supports an ISA
  dtc: Update requirement to v1.4.2
  loader: Support Flattened Image Trees (FIT images)
  hw: xilinx-pcie: Add support for Xilinx AXI PCIe Controller
  hw/mips: MIPS Boston board support

 configure                            |   8 +-
 default-configs/mips64el-softmmu.mak |   2 +
 dtc                                  |   2 +-
 hw/core/Makefile.objs                |   1 +
 hw/core/loader-fit.c                 | 325 ++++++++++++++++++++
 hw/core/loader.c                     |   7 +-
 hw/intc/mips_gic.c                   |  56 ++--
 hw/mips/Makefile.objs                |   1 +
 hw/mips/boston.c                     | 576 +++++++++++++++++++++++++++++++++++
 hw/misc/mips_cmgcr.c                 |  17 ++
 hw/pci-host/Makefile.objs            |   1 +
 hw/pci-host/xilinx-pcie.c            | 328 ++++++++++++++++++++
 hw/timer/mips_gictimer.c             |   5 +
 include/hw/loader-fit.h              |  41 +++
 include/hw/loader.h                  |   6 +
 include/hw/misc/mips_cmgcr.h         |   3 +
 include/hw/pci-host/xilinx-pcie.h    |  68 +++++
 include/hw/timer/mips_gictimer.h     |   1 +
 target/mips/cpu.h                    |   1 +
 target/mips/translate.c              |  10 +
 20 files changed, 1423 insertions(+), 36 deletions(-)
 create mode 100644 hw/core/loader-fit.c
 create mode 100644 hw/mips/boston.c
 create mode 100644 hw/pci-host/xilinx-pcie.c
 create mode 100644 include/hw/loader-fit.h
 create mode 100644 include/hw/pci-host/xilinx-pcie.h

-- 
2.7.4

^ permalink raw reply	[flat|nested] 16+ messages in thread
* [Qemu-devel] [PULL 0/8] target-mips queue
@ 2016-02-26 11:16 Leon Alrae
  2016-02-26 13:24 ` Peter Maydell
  0 siblings, 1 reply; 16+ messages in thread
From: Leon Alrae @ 2016-02-26 11:16 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell, Aurelien Jarno

Hi,

MIPS pull request containing support for FPU and MSA in KVM and R6 VPs.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit 0c6940d086f39bbf725d96104abe46da87429cb6:

  build: [bsd-user] Rename "syscall.h" to "target_syscall.h" in target directories (2016-02-25 16:41:08 +0000)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20160226

for you to fetch changes up to 01bc435b44b8802cc4697faa07d908684afbce4e:

  target-mips: implement R6 multi-threading (2016-02-26 08:59:17 +0000)

----------------------------------------------------------------
MIPS patches 2016-02-26

Changes:
* support for FPU and MSA in KVM guest
* support for R6 Virtual Processors

----------------------------------------------------------------
James Hogan (7):
      mips/kvm: Remove a couple of noisy DPRINTFs
      mips/kvm: Implement PRid CP0 register
      mips/kvm: Implement Config CP0 registers
      mips/kvm: Support unsigned KVM registers
      mips/kvm: Support signed 64-bit KVM registers
      mips/kvm: Support FPU in MIPS KVM guests
      mips/kvm: Support MSA in MIPS KVM guests

Yongbok Kim (1):
      target-mips: implement R6 multi-threading

 disas/mips.c                 |   4 +
 target-mips/cpu.c            |   9 +
 target-mips/cpu.h            |  25 +++
 target-mips/helper.h         |   4 +
 target-mips/kvm.c            | 387 +++++++++++++++++++++++++++++++++++++++++--
 target-mips/op_helper.c      |  48 ++++++
 target-mips/translate.c      |  59 +++++++
 target-mips/translate_init.c |   3 +-
 8 files changed, 525 insertions(+), 14 deletions(-)

^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2017-08-04 13:22 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-08-03 14:45 [Qemu-devel] [PULL 0/8] target-mips queue Yongbok Kim
2017-08-03 14:45 ` [Qemu-devel] [PULL 1/8] target-mips: Don't stop on [d]mtc0 DESAVE/KScratch Yongbok Kim
2017-08-03 14:45 ` [Qemu-devel] [PULL 2/8] mips/malta: leave space for the bootmap after the initrd Yongbok Kim
2017-08-03 14:45 ` [Qemu-devel] [PULL 3/8] mips: Improve segment defs for KVM T&E guests Yongbok Kim
2017-08-03 14:45 ` [Qemu-devel] [PULL 4/8] mips: Add KVM T&E segment support for TCG Yongbok Kim
2017-08-03 14:45 ` [Qemu-devel] [PULL 5/8] target-mips: apply CP0.PageMask before writing into TLB entry Yongbok Kim
2017-08-03 14:45 ` [Qemu-devel] [PULL 6/8] target/mips: Use BS_EXCP where interrupts are expected Yongbok Kim
2017-08-03 14:45 ` [Qemu-devel] [PULL 7/8] target/mips: Drop redundant gen_io_start/stop() Yongbok Kim
2017-08-03 14:45 ` [Qemu-devel] [PULL 8/8] target/mips: Fix RDHWR CC with icount Yongbok Kim
2017-08-04 12:46 ` [Qemu-devel] [PULL 0/8] target-mips queue Peter Maydell
  -- strict thread matches above, loose matches on Subject: below --
2017-02-20 20:30 Yongbok Kim
2017-02-20 20:47 ` no-reply
2017-02-21  0:00   ` Yongbok Kim
2017-02-21  9:34 ` Peter Maydell
2016-02-26 11:16 Leon Alrae
2016-02-26 13:24 ` Peter Maydell

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