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Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH v2 42/54] tcg/ppc: Convert tcg_out_qemu_{ld,st}_slow_path Content-Language: en-US To: Richard Henderson , qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org References: <20230411010512.5375-1-richard.henderson@linaro.org> <20230411010512.5375-43-richard.henderson@linaro.org> From: Daniel Henrique Barboza In-Reply-To: <20230411010512.5375-43-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2001:4860:4864:20::36; envelope-from=danielhb413@gmail.com; helo=mail-oa1-x36.google.com X-Spam_score_int: -3 X-Spam_score: -0.4 X-Spam_bar: / X-Spam_report: (-0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, NICE_REPLY_A=-1.083, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, SUSPICIOUS_RECIPS=2.51 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 4/10/23 22:05, Richard Henderson wrote: > Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret, > and tcg_out_st_helper_args. > > Signed-off-by: Richard Henderson > --- Reviewed-by: Daniel Henrique Barboza > tcg/ppc/tcg-target.c.inc | 88 ++++++++++++---------------------------- > 1 file changed, 26 insertions(+), 62 deletions(-) > > diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc > index 90093a6509..1b60166d2f 100644 > --- a/tcg/ppc/tcg-target.c.inc > +++ b/tcg/ppc/tcg-target.c.inc > @@ -2137,44 +2137,38 @@ static void add_qemu_ldst_label(TCGContext *s, bool is_ld, > label->label_ptr[0] = lptr; > } > > +static TCGReg ldst_ra_gen(TCGContext *s, const TCGLabelQemuLdst *l, int arg) > +{ > + if (arg < 0) { > + arg = TCG_REG_TMP1; > + } > + tcg_out32(s, MFSPR | RT(arg) | LR); > + return arg; > +} > + > +/* > + * For the purposes of ppc32 sorting 4 input registers into 4 argument > + * registers, there is an outside chance we would require 3 temps. > + * Because of constraints, no inputs are in r3, and env will not be > + * placed into r3 until after the sorting is done, and is thus free. > + */ > +static const TCGLdstHelperParam ldst_helper_param = { > + .ra_gen = ldst_ra_gen, > + .ntmp = 3, > + .tmp = { TCG_REG_TMP1, TCG_REG_R0, TCG_REG_R3 } > +}; > + > static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) > { > - MemOpIdx oi = lb->oi; > - MemOp opc = get_memop(oi); > - TCGReg hi, lo, arg = TCG_REG_R3; > + MemOp opc = get_memop(lb->oi); > > if (!reloc_pc14(lb->label_ptr[0], tcg_splitwx_to_rx(s->code_ptr))) { > return false; > } > > - tcg_out_mov(s, TCG_TYPE_PTR, arg++, TCG_AREG0); > - > - lo = lb->addrlo_reg; > - hi = lb->addrhi_reg; > - if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) { > - arg |= (TCG_TARGET_CALL_ARG_I64 == TCG_CALL_ARG_EVEN); > - tcg_out_mov(s, TCG_TYPE_I32, arg++, hi); > - tcg_out_mov(s, TCG_TYPE_I32, arg++, lo); > - } else { > - /* If the address needed to be zero-extended, we'll have already > - placed it in R4. The only remaining case is 64-bit guest. */ > - tcg_out_mov(s, TCG_TYPE_TL, arg++, lo); > - } > - > - tcg_out_movi(s, TCG_TYPE_I32, arg++, oi); > - tcg_out32(s, MFSPR | RT(arg) | LR); > - > + tcg_out_ld_helper_args(s, lb, &ldst_helper_param); > tcg_out_call_int(s, LK, qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)]); > - > - lo = lb->datalo_reg; > - hi = lb->datahi_reg; > - if (TCG_TARGET_REG_BITS == 32 && (opc & MO_SIZE) == MO_64) { > - tcg_out_mov(s, TCG_TYPE_I32, lo, TCG_REG_R4); > - tcg_out_mov(s, TCG_TYPE_I32, hi, TCG_REG_R3); > - } else { > - tcg_out_movext(s, lb->type, lo, > - TCG_TYPE_REG, opc & MO_SSIZE, TCG_REG_R3); > - } > + tcg_out_ld_helper_ret(s, lb, false, &ldst_helper_param); > > tcg_out_b(s, 0, lb->raddr); > return true; > @@ -2182,43 +2176,13 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) > > static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) > { > - MemOpIdx oi = lb->oi; > - MemOp opc = get_memop(oi); > - MemOp s_bits = opc & MO_SIZE; > - TCGReg hi, lo, arg = TCG_REG_R3; > + MemOp opc = get_memop(lb->oi); > > if (!reloc_pc14(lb->label_ptr[0], tcg_splitwx_to_rx(s->code_ptr))) { > return false; > } > > - tcg_out_mov(s, TCG_TYPE_PTR, arg++, TCG_AREG0); > - > - lo = lb->addrlo_reg; > - hi = lb->addrhi_reg; > - if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) { > - arg |= (TCG_TARGET_CALL_ARG_I64 == TCG_CALL_ARG_EVEN); > - tcg_out_mov(s, TCG_TYPE_I32, arg++, hi); > - tcg_out_mov(s, TCG_TYPE_I32, arg++, lo); > - } else { > - /* If the address needed to be zero-extended, we'll have already > - placed it in R4. The only remaining case is 64-bit guest. */ > - tcg_out_mov(s, TCG_TYPE_TL, arg++, lo); > - } > - > - lo = lb->datalo_reg; > - hi = lb->datahi_reg; > - if (TCG_TARGET_REG_BITS == 32 && s_bits == MO_64) { > - arg |= (TCG_TARGET_CALL_ARG_I64 == TCG_CALL_ARG_EVEN); > - tcg_out_mov(s, TCG_TYPE_I32, arg++, hi); > - tcg_out_mov(s, TCG_TYPE_I32, arg++, lo); > - } else { > - tcg_out_movext(s, s_bits == MO_64 ? TCG_TYPE_I64 : TCG_TYPE_I32, > - arg++, lb->type, s_bits, lo); > - } > - > - tcg_out_movi(s, TCG_TYPE_I32, arg++, oi); > - tcg_out32(s, MFSPR | RT(arg) | LR); > - > + tcg_out_st_helper_args(s, lb, &ldst_helper_param); > tcg_out_call_int(s, LK, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); > > tcg_out_b(s, 0, lb->raddr);