From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35178) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dgAsz-00021E-Cm for qemu-devel@nongnu.org; Fri, 11 Aug 2017 10:26:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dgAsy-0003Mq-Ah for qemu-devel@nongnu.org; Fri, 11 Aug 2017 10:26:01 -0400 From: Eric Auger Date: Fri, 11 Aug 2017 16:22:34 +0200 Message-Id: <1502461354-11327-10-git-send-email-eric.auger@redhat.com> In-Reply-To: <1502461354-11327-1-git-send-email-eric.auger@redhat.com> References: <1502461354-11327-1-git-send-email-eric.auger@redhat.com> Subject: [Qemu-devel] [RFC v6 9/9] hw/arm/virt-acpi-build: Use the ACPI_IORT_SMMU_V3_CACHING_MODE model List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: eric.auger.pro@gmail.com, eric.auger@redhat.com, peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, alex.williamson@redhat.com, prem.mallappa@gmail.com Cc: drjones@redhat.com, christoffer.dall@linaro.org, Radha.Chintakuntla@cavium.com, Sunil.Goutham@cavium.com, mohun106@gmail.com, tcain@qti.qualcomm.com, bharat.bhushan@nxp.com, tn@semihalf.com, mst@redhat.com, will.deacon@arm.com, jean-philippe.brucker@arm.com, robin.murphy@arm.com, peterx@redhat.com, edgar.iglesias@gmail.com To allow VFIO use case, let's set the smmu model to ACPI_IORT_SMMU_V3_CACHING_MODE. An important notice is this model is not standardized in the ACPI IORT as this work is a proof of concept. We also set the COHACC override flag which seems to be mandated. Signed-off-by: Eric Auger --- hw/arm/virt-acpi-build.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index ac2cd3e..9103117 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -437,6 +437,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) smmu->type = ACPI_IORT_NODE_SMMU_V3; smmu->length = cpu_to_le16(node_size); + smmu->model = 0x3; /* ACPI_IORT_SMMU_V3_CACHING_MODE */ smmu->mapping_count = cpu_to_le32(1); smmu->mapping_offset = cpu_to_le32(sizeof(*smmu)); smmu->base_address = cpu_to_le64(vms->memmap[VIRT_SMMU].base); @@ -444,6 +445,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) smmu->pri_gsiv = cpu_to_le32(irq + 1); smmu->gerr_gsiv = cpu_to_le32(irq + 2); smmu->sync_gsiv = cpu_to_le32(irq + 3); + smmu->flags = 0x1; /* COHACC Override */ /* Identity RID mapping covering the whole input RID range */ idmap = &smmu->id_mapping_array[0]; -- 2.5.5