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From: Aleksandr Bezzubikov <zuban32s@gmail.com>
To: seabios@seabios.org
Cc: marcel@redhat.com, mst@redhat.com, kraxel@redhat.com,
	kevin@koconnor.net, lersek@redhat.com, qemu-devel@nongnu.org,
	Aleksandr Bezzubikov <zuban32s@gmail.com>
Subject: [Qemu-devel] [PATCH RESEND v7 2/3] pci: add QEMU-specific PCI capability structure
Date: Fri, 18 Aug 2017 02:33:20 +0300	[thread overview]
Message-ID: <1503012801-10855-3-git-send-email-zuban32s@gmail.com> (raw)
In-Reply-To: <1503012801-10855-1-git-send-email-zuban32s@gmail.com>

On PCI init PCI bridge devices may need some
extra info about bus number to reserve, IO, memory and
prefetchable memory limits. QEMU can provide this
with special vendor-specific PCI capability.

This capability is intended to be used only
for Red Hat PCI bridges, i.e. QEMU cooperation.

Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
---
 src/fw/dev-pci.h | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 src/fw/dev-pci.h

diff --git a/src/fw/dev-pci.h b/src/fw/dev-pci.h
new file mode 100644
index 0000000..0dc5556
--- /dev/null
+++ b/src/fw/dev-pci.h
@@ -0,0 +1,53 @@
+#ifndef _PCI_CAP_H
+#define _PCI_CAP_H
+
+#include "types.h"
+
+/*
+ *
+ * QEMU-specific vendor(Red Hat)-specific capability.
+ * It's intended to provide some hints for firmware to init PCI devices.
+ *
+ * Its structure is shown below:
+ *
+ * Header:
+ *
+ * u8 id;       Standard PCI Capability Header field
+ * u8 next;     Standard PCI Capability Header field
+ * u8 len;      Standard PCI Capability Header field
+ * u8 type;     Red Hat vendor-specific capability type
+ * Data:
+ *
+ * u32 bus_res;     minimum bus number to reserve;
+ *                  this is necessary for PCI Express Root Ports
+ *                  to support PCI bridges hotplug
+ * u64 io;          IO space to reserve
+ * u32 mem;         non-prefetchable memory to reserve
+ *
+ * At most of the following two fields may be set to a value
+ * different from 0xFF...F:
+ * u32 prefetchable_mem_32;     prefetchable memory to reserve (32-bit MMIO)
+ * u64 prefetchable_mem_64;     prefetchable memory to reserve (64-bit MMIO)
+ *
+ * If any field value in Data section is 0xFF...F,
+ * it means that such kind of reservation is not needed and must be ignored.
+ *
+*/
+
+/* Offset of vendor-specific capability type field */
+#define PCI_CAP_REDHAT_TYPE_OFFSET  3
+
+/* List of valid Red Hat vendor-specific capability types */
+#define REDHAT_CAP_RESOURCE_RESERVE 1
+
+
+/* Offsets of RESOURCE_RESERVE capability fields */
+#define RES_RESERVE_BUS_RES        4
+#define RES_RESERVE_IO             8
+#define RES_RESERVE_MEM            16
+#define RES_RESERVE_PREF_MEM_32    20
+#define RES_RESERVE_PREF_MEM_64    24
+#define RES_RESERVE_CAP_SIZE       32
+
+#endif /* _PCI_CAP_H */
+
-- 
2.7.4

  parent reply	other threads:[~2017-08-17 23:33 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-17 23:33 [Qemu-devel] [PATCH RESEND v7 0/3] Red Hat PCI bridge resource reserve capability Aleksandr Bezzubikov
2017-08-17 23:33 ` [Qemu-devel] [PATCH RESEND v7 1/3] pci: refactor pci_find_capapibilty to get bdf as the first argument instead of the whole pci_device Aleksandr Bezzubikov
2017-08-17 23:33 ` Aleksandr Bezzubikov [this message]
2017-08-17 23:33 ` [Qemu-devel] [PATCH RESEND v7 3/3] pci: enable RedHat PCI bridges to reserve additional resources on PCI init Aleksandr Bezzubikov
2017-09-10 18:34 ` [Qemu-devel] [PATCH RESEND v7 0/3] Red Hat PCI bridge resource reserve capability Aleksandr Bezzubikov
2017-09-10 19:40   ` Marcel Apfelbaum
2017-09-14  8:15     ` Aleksandr Bezzubikov
2017-09-14 19:54       ` Kevin O'Connor

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