qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 17/36] loader: Ignore zero-sized ELF segments
Date: Mon,  4 Sep 2017 13:25:48 +0100	[thread overview]
Message-ID: <1504527967-29248-18-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1504527967-29248-1-git-send-email-peter.maydell@linaro.org>

Some ELF files have program headers that specify segments that
are of zero size. Ignore them, rather than trying to create
zero-length ROM blobs for them, because the zero-length blob
can falsely trigger the overlapping-ROM-blobs check.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Hua Yanghao <huayanghao@gmail.com>
Message-id: 1502116754-18867-3-git-send-email-peter.maydell@linaro.org
---
 include/hw/elf_ops.h | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/include/hw/elf_ops.h b/include/hw/elf_ops.h
index 2e526d3..d192e7e 100644
--- a/include/hw/elf_ops.h
+++ b/include/hw/elf_ops.h
@@ -451,14 +451,24 @@ static int glue(load_elf, SZ)(const char *name, int fd,
                 *pentry = ehdr.e_entry - ph->p_vaddr + ph->p_paddr;
             }
 
-            if (load_rom) {
-                snprintf(label, sizeof(label), "phdr #%d: %s", i, name);
-
-                /* rom_add_elf_program() seize the ownership of 'data' */
-                rom_add_elf_program(label, data, file_size, mem_size, addr, as);
-            } else {
-                cpu_physical_memory_write(addr, data, file_size);
+            if (mem_size == 0) {
+                /* Some ELF files really do have segments of zero size;
+                 * just ignore them rather than trying to create empty
+                 * ROM blobs, because the zero-length blob can falsely
+                 * trigger the overlapping-ROM-blobs check.
+                 */
                 g_free(data);
+            } else {
+                if (load_rom) {
+                    snprintf(label, sizeof(label), "phdr #%d: %s", i, name);
+
+                    /* rom_add_elf_program() seize the ownership of 'data' */
+                    rom_add_elf_program(label, data, file_size, mem_size,
+                                        addr, as);
+                } else {
+                    cpu_physical_memory_write(addr, data, file_size);
+                    g_free(data);
+                }
             }
 
             total_size += mem_size;
-- 
2.7.4

  parent reply	other threads:[~2017-09-04 12:26 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-04 12:25 [Qemu-devel] [PULL 00/36] target-arm queue Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 01/36] target/arm: Use MMUAccessType enum rather than int Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 02/36] target/arm: Don't trap WFI/WFE for M profile Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 03/36] target/arm: Consolidate PMSA handling in get_phys_addr() Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 04/36] target/arm: Tighten up Thumb decode where new v8M insns will be Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 05/36] hw/intc/armv7m_nvic.c: Remove out of date comment Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 06/36] target/arm: Remove incorrect comment about MPU_CTRL Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 07/36] target/arm: Fix outdated comment about exception exit Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 08/36] target/arm: Define and use XPSR bit masks Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 09/36] target/arm: Don't store M profile PRIMASK and FAULTMASK in daif Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 10/36] target/arm: Don't use cpsr_write/cpsr_read to transfer M profile XPSR Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 11/36] target/arm: Make arm_cpu_dump_state() handle the M-profile XPSR Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 12/36] target/arm: Don't calculate lr in arm_v7m_cpu_do_interrupt() until needed Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 13/36] target/arm: Create and use new function arm_v7m_is_handler_mode() Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 14/36] armv7m_nvic.h: Move from include/hw/arm to include/hw/intc Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 15/36] nvic: Implement "user accesses BusFault" SCS region behaviour Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 16/36] loader: Handle ELF files with overlapping zero-initialized data Peter Maydell
2017-09-04 12:25 ` Peter Maydell [this message]
2017-09-04 12:25 ` [Qemu-devel] [PULL 18/36] hw/arm: use defined type name instead of hard-coded string Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 19/36] hw/arm/virt: add pmu interrupt state Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 20/36] target/arm/kvm: pmu: split init and set-irq stages Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 21/36] hw/arm/virt: allow pmu instantiation with userspace irqchip Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 22/36] target/arm/kvm: pmu: improve error handling Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 23/36] watchdog: wdt_aspeed: Add support for the reset width register Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 24/36] aspeed_soc: Propagate silicon-rev to watchdog Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 25/36] memory.h: Move MemTxResult type to memattrs.h Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 26/36] cpu: Define new cpu_transaction_failed() hook Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 27/36] cputlb: Support generating CPU exceptions on memory transaction failures Peter Maydell
2017-09-04 12:25 ` [Qemu-devel] [PULL 28/36] boards.h: Define new flag ignore_memory_transaction_failures Peter Maydell
2017-09-04 12:26 ` [Qemu-devel] [PULL 29/36] hw/arm: Set ignore_memory_transaction_failures for most ARM boards Peter Maydell
2017-09-04 12:26 ` [Qemu-devel] [PULL 30/36] target/arm: Factor out fault delivery code Peter Maydell
2017-09-04 12:26 ` [Qemu-devel] [PULL 31/36] target/arm: Allow deliver_fault() caller to specify EA bit Peter Maydell
2017-09-04 12:26 ` [Qemu-devel] [PULL 32/36] target/arm: Implement new do_transaction_failed hook Peter Maydell
2017-09-04 12:26 ` [Qemu-devel] [PULL 33/36] hw/arm/aspeed_soc: Mark devices as user_creatable = false Peter Maydell
2017-09-04 12:26 ` [Qemu-devel] [PULL 34/36] hw/arm/digic: Mark device with " Peter Maydell
2017-09-04 12:26 ` [Qemu-devel] [PULL 35/36] target/arm: Fix aa64 ldp register writeback Peter Maydell
2017-09-04 12:26 ` [Qemu-devel] [PULL 36/36] arm_gicv3_kvm: Fix compile warning Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1504527967-29248-18-git-send-email-peter.maydell@linaro.org \
    --to=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).