From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 07/31] hw/arm/allwinner-a10: Mark the allwinner-a10 device with user_creatable = false
Date: Thu, 7 Sep 2017 14:28:00 +0100 [thread overview]
Message-ID: <1504790904-17018-8-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1504790904-17018-1-git-send-email-peter.maydell@linaro.org>
From: Thomas Huth <thuth@redhat.com>
QEMU currently exits unexpectedly when the user accidentially
tries to do something like this:
$ aarch64-softmmu/qemu-system-aarch64 -S -M integratorcp -nographic
QEMU 2.9.93 monitor - type 'help' for more information
(qemu) device_add allwinner-a10
Unsupported NIC model: smc91c111
Exiting just due to a "device_add" should not happen. Looking closer
at the the realize and instance_init function of this device also
reveals that it is using serial_hds and nd_table directly there, so
this device is clearly not creatable by the user and should be marked
accordingly.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Message-id: 1503416789-32080-1-git-send-email-thuth@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/allwinner-a10.c | 2 ++
scripts/device-crash-test | 1 -
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
index f62a9a3..43a3f01 100644
--- a/hw/arm/allwinner-a10.c
+++ b/hw/arm/allwinner-a10.c
@@ -118,6 +118,8 @@ static void aw_a10_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = aw_a10_realize;
+ /* Reason: Uses serial_hds in realize and nd_table in instance_init */
+ dc->user_creatable = false;
}
static const TypeInfo aw_a10_type_info = {
diff --git a/scripts/device-crash-test b/scripts/device-crash-test
index e77b693..81d65b9 100755
--- a/scripts/device-crash-test
+++ b/scripts/device-crash-test
@@ -187,7 +187,6 @@ ERROR_WHITELIST = [
{'log':r"Device [\w.,-]+ can not be dynamically instantiated"},
{'log':r"Platform Bus: Can not fit MMIO region of size "},
# other more specific errors we will ignore:
- {'device':'allwinner-a10', 'log':"Unsupported NIC model:"},
{'device':'.*-spapr-cpu-core', 'log':r"CPU core type should be"},
{'log':r"MSI(-X)? is not supported by interrupt controller"},
{'log':r"pxb-pcie? devices cannot reside on a PCIe? bus"},
--
2.7.4
next prev parent reply other threads:[~2017-09-07 13:28 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-07 13:27 [Qemu-devel] [PULL 00/31] target-arm queue Peter Maydell
2017-09-07 13:27 ` [Qemu-devel] [PULL 01/31] armv7m: Convert bitband.source-memory to DEFINE_PROP_LINK Peter Maydell
2017-09-07 13:27 ` [Qemu-devel] [PULL 02/31] armv7m: Convert armv7m.memory " Peter Maydell
2017-09-07 13:27 ` [Qemu-devel] [PULL 03/31] gicv3: Convert " Peter Maydell
2017-09-07 13:27 ` [Qemu-devel] [PULL 04/31] xlnx_zynqmp: " Peter Maydell
2017-09-07 13:27 ` [Qemu-devel] [PULL 05/31] xilinx_axienet: " Peter Maydell
2017-09-07 13:27 ` [Qemu-devel] [PULL 06/31] xilinx_axidma: " Peter Maydell
2017-09-07 13:28 ` Peter Maydell [this message]
2017-09-07 13:28 ` [Qemu-devel] [PULL 08/31] target/arm: Implement ARMv8M's PMSAv8 registers Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 09/31] target/arm: Implement new PMSAv8 behaviour Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 10/31] target/arm: Add state field, feature bit and migration for v8M secure state Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 11/31] target/arm: Register second AddressSpace for secure v8M CPUs Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 12/31] target/arm: Add MMU indexes for secure v8M Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 13/31] target/arm: Make BASEPRI register banked for v8M Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 14/31] target/arm: Make PRIMASK " Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 15/31] target/arm: Make FAULTMASK " Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 16/31] target/arm: Make CONTROL " Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 17/31] nvic: Add NS alias SCS region Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 18/31] target/arm: Make VTOR register banked for v8M Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 19/31] target/arm: Make MPU_MAIR0, MPU_MAIR1 registers " Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 20/31] target/arm: Make MPU_RBAR, MPU_RLAR " Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 21/31] target/arm: Make MPU_RNR register " Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 22/31] target/arm: Make MPU_CTRL " Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 23/31] target/arm: Make CCR " Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 24/31] target/arm: Make MMFAR " Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 25/31] target/arm: Make CFSR register " Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 26/31] target/arm: Move regime_is_secure() to target/arm/internals.h Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 27/31] target/arm: Implement BXNS, and banked stack pointers Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 28/31] boards.h: Define new flag ignore_memory_transaction_failures Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 29/31] hw/arm: Set ignore_memory_transaction_failures for most ARM boards Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 30/31] target/arm: Implement new do_transaction_failed hook Peter Maydell
2017-09-07 13:28 ` [Qemu-devel] [PULL 31/31] target/arm: Add Jazelle feature Peter Maydell
2017-09-07 16:48 ` [Qemu-devel] [PULL 00/31] target-arm queue Peter Maydell
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