[Qemu-devel] [PATCH v2 00/40] generalize parsing of cpu_model (part 2)

[Qemu-devel] [PATCH v2 00/40] generalize parsing of cpu_model (part 2)

[Igor Mammedov]

Changelog:
 v2:
    - replace "qom: add helper type_init_from_array()" with 3 new patches
      * qom: update doc comment for type_register[_static]()                           
      * qom: introduce type_register_static_array()                                    
      * qom: add helper macro DEFINE_TYPES()
    - s/type_init_from_array/DEFINE_TYPES/ across series in
        "FOO: cleanup cpu type name composition" patches
    - re-add lost DEFINE_CRIS_CPU_TYPE() in
        "cris: cleanup cpu type name composition"
    - improve commit message in
        "sh4: shix: use generic cpu_model parsing"
    - drop  NULL-initialization in
        "sh4: simplify superh_cpu_class_by_name()"
    - pick up Reviewed/Acked-bys from v1
        I took a liberty to keep all of them because of
        s/type_init_from_array/DEFINE_TYPES/ renaming in reviewed
        "FOO: cleanup cpu type name composition" patches was trivial
        and it passed tests locally so works as expected.

this series is continuation of effort to remove boards dependency on
cpu_model parsing and generalizing default cpu type handling.
For background story look at merged: 

  [PATCH v2 0/5] generalize parsing of cpu_model (x86/arm)
  https://lists.gnu.org/archive/html/qemu-devel/2017-09/msg03564.html

thisi series mostly consist of 3 types of patches:
 1: unifying cpu type name composing by introdicing 
        FOO_CPU_TYPE_NAME() macro across targets
 2: replacing simple static(and needlessly dynamic) cpu type registrations
    with common pattern where typinfo is put into array which
    is used to batch register cpu types with new helper DEFINE_TYPES()
 3: main patches that generalize cpu_model parsing for boards

I'm releasing independent subset that takes care of all
targets/boards except null-machine, ppc and *-user targets
(as they are still work in progress and PPC part is big
enough to deserve its own series)

I've tried to test all converted boards but there were a lot
so I've might have missed some.

git tree for testing:
  https://github.com/imammedo/qemu/branches cpu_init_removal_part2_v2

For reference v1:
  https://lists.nongnu.org/archive/html/qemu-devel/2017-10/msg00036.html

PS:
 rebased on top of ehabkost/machine-next tree to avoid resolve conflicts with
 queued "qom/cpu: move cpu_model null check to  cpu_class_by_name()"

CC: Philippe Mathieu-Daudé <f4bug@amsat.org>

Igor Mammedov (40):
  qom: update doc comment for type_register[_static]()
  qom: introduce type_register_static_array()
  qom: add helper macro DEFINE_TYPES()
  alpha: cleanup cpu type name composition
  alpha: use generic cpu_model parsing
  cris: cleanup cpu type name composition
  cris: use generic cpu_model parsing
  lm32: cleanup cpu type name composition
  lm32: milkymist: use generic cpu_model parsing
  lm32: lm32_boards: use generic cpu_model parsing
  m68k: cleanup cpu type name composition
  m68k: an5206: use generic cpu_model parsing
  m68k: mcf5208: use generic cpu_model parsing
  moxie: fix qemu-system-moxie failing to start with CLI "-cpu
    MoxieLite"
  moxie: cleanup cpu type name composition
  moxie: use generic cpu_model parsing
  openrisc: cleanup cpu type name composition
  openrisc: use generic cpu_model parsing
  sh4: r2d: use generic cpu_model parsing
  sh4: shix: use generic cpu_model parsing
  sh4: cleanup cpu type name composition
  sh4: simplify superh_cpu_class_by_name()
  sh4: remove SuperHCPUClass::name field
  xtensa: cleanup cpu type name composition
  xtensa: sim: use generic cpu_model parsing
  xtensa: lx60/lx200/ml605/kc705: use generic cpu_model parsing
  unicore32: cleanup cpu type name composition
  unicore32: use generic cpu_model parsing
  tricore: cleanup cpu type name composition
  tricore: use generic cpu_model parsing
  sparc: cleanup cpu type name composition
  sparc: sun4u/sun4v/niagara: use generic cpu_model parsing
  sparc: sparc: use generic cpu_model parsing
  sparc: leon3: use generic cpu_model parsing
  mips: use object_new() instead of gnew()+object_initialize()
  mips: malta/boston: replace cpu_model with cpu_type
  mips: fulong2e: replace cpu_model with cpu_type
  mips: Magnum/Acer Pica 61: replace cpu_model with cpu_type
  mips: mipssim: replace cpu_model with cpu_type
  mips: r4k: replace cpu_model with cpu_type

 include/hw/mips/cps.h          |   2 +-
 include/hw/sparc/sparc64.h     |   3 +-
 include/qom/object.h           |  50 ++++++++++++++++++-
 target/alpha/cpu.h             |   3 ++
 target/cris/cpu.h              |   3 ++
 target/lm32/cpu.h              |   3 ++
 target/m68k/cpu.h              |   3 ++
 target/mips/cpu.h              |   8 ++-
 target/moxie/cpu.h             |   3 ++
 target/openrisc/cpu.h          |   3 ++
 target/sh4/cpu-qom.h           |   8 ++-
 target/sh4/cpu.h               |   3 ++
 target/sparc/cpu.h             |   3 ++
 target/tricore/cpu.h           |   2 +
 target/unicore32/cpu.h         |   3 ++
 target/xtensa/cpu.h            |   4 ++
 hw/alpha/dp264.c               |   4 +-
 hw/cris/axis_dev88.c           |   7 +--
 hw/lm32/lm32_boards.c          |  14 ++----
 hw/lm32/milkymist.c            |   7 +--
 hw/m68k/an5206.c               |   7 +--
 hw/m68k/mcf5208.c              |   7 +--
 hw/mips/boston.c               |  14 +++---
 hw/mips/cps.c                  |   4 +-
 hw/mips/mips_fulong2e.c        |   7 +--
 hw/mips/mips_jazz.c            |   8 ++-
 hw/mips/mips_malta.c           |  36 ++++++--------
 hw/mips/mips_mipssim.c         |  15 +++---
 hw/mips/mips_r4k.c             |  16 +++---
 hw/moxie/moxiesim.c            |   7 +--
 hw/openrisc/openrisc_sim.c     |   8 +--
 hw/sh4/r2d.c                   |   8 +--
 hw/sh4/shix.c                  |   7 +--
 hw/sparc/leon3.c               |   8 +--
 hw/sparc/sun4m.c               |  29 +++++------
 hw/sparc64/niagara.c           |   4 +-
 hw/sparc64/sparc64.c           |   8 +--
 hw/sparc64/sun4u.c             |   8 ++-
 hw/tricore/tricore_testboard.c |   6 +--
 hw/unicore32/puv3.c            |   8 +--
 hw/xtensa/sim.c                |   8 +--
 hw/xtensa/xtfpga.c             |  11 ++---
 qom/object.c                   |   9 ++++
 target/alpha/cpu.c             | 107 +++++++++++++----------------------------
 target/cris/cpu.c              |  81 +++++++++++--------------------
 target/lm32/cpu.c              |  74 +++++++++-------------------
 target/m68k/cpu.c              |  75 +++++++++++------------------
 target/mips/cpu.c              |   2 +-
 target/mips/translate.c        |  20 +++-----
 target/mips/translate_init.c   |  12 -----
 target/moxie/cpu.c             |  61 +++++++++--------------
 target/openrisc/cpu.c          |  69 +++++++++-----------------
 target/sh4/cpu.c               | 107 +++++++++++++++--------------------------
 target/sparc/cpu.c             |   2 +-
 target/tricore/cpu.c           |  68 ++++++++------------------
 target/unicore32/cpu.c         |  61 ++++++++---------------
 target/xtensa/cpu.c            |   2 +-
 target/xtensa/helper.c         |   2 +-
 58 files changed, 442 insertions(+), 680 deletions(-)

-- 
2.7.4

[Qemu-devel] [PATCH v2 01/40] qom: update doc comment for type_register[_static]()

[Igor Mammedov]

type_register()/type_register_static() functions in current impl.
can't fail returning 0, also none of the users check for error
so update doc comment to reflect current behaviour.

Suggested-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
---
 include/qom/object.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/qom/object.h b/include/qom/object.h
index f3e5cff..76a5e3a 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -773,7 +773,7 @@ const char *object_get_typename(const Object *obj);
  * @info and all of the strings it points to should exist for the life time
  * that the type is registered.
  *
- * Returns: 0 on failure, the new #Type on success.
+ * Returns: the new #Type.
  */
 Type type_register_static(const TypeInfo *info);
 
@@ -784,7 +784,7 @@ Type type_register_static(const TypeInfo *info);
  * Unlike type_register_static(), this call does not require @info or its
  * string members to continue to exist after the call returns.
  *
- * Returns: 0 on failure, the new #Type on success.
+ * Returns: the new #Type.
  */
 Type type_register(const TypeInfo *info);
 
-- 
2.7.4

[Qemu-devel] [PATCH v2 02/40] qom: introduce type_register_static_array()

[Igor Mammedov]

it will help to remove code duplication of registration
static types in places that have open coded loop to
perform batch type registering.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/qom/object.h | 10 ++++++++++
 qom/object.c         |  9 +++++++++
 2 files changed, 19 insertions(+)

diff --git a/include/qom/object.h b/include/qom/object.h
index 76a5e3a..ce25567 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -789,6 +789,16 @@ Type type_register_static(const TypeInfo *info);
 Type type_register(const TypeInfo *info);
 
 /**
+ * type_register_static_array:
+ * @infos: The array of the new type #TypeInfo structures.
+ * @nr_infos: number of entries in @infos
+ *
+ * @infos and all of the strings it points to should exist for the life time
+ * that the type is registered.
+ */
+void type_register_static_array(const TypeInfo *infos, int nr_infos);
+
+/**
  * object_class_dynamic_cast_assert:
  * @klass: The #ObjectClass to attempt to cast.
  * @typename: The QOM typename of the class to cast to.
diff --git a/qom/object.c b/qom/object.c
index 3e18537..f4c377a 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -151,6 +151,15 @@ TypeImpl *type_register_static(const TypeInfo *info)
     return type_register(info);
 }
 
+void type_register_static_array(const TypeInfo *infos, int nr_infos)
+{
+    int i;
+
+    for (i = 0; i < nr_infos; i++) {
+        type_register_static(&infos[i]);
+    }
+}
+
 static TypeImpl *type_get_by_name(const char *name)
 {
     if (name == NULL) {
-- 
2.7.4

[Qemu-devel] [PATCH v2 03/40] qom: add helper macro DEFINE_TYPES()

[Igor Mammedov]

DEFINE_TYPES() will help to simplify following routine patterns:

 static void foo_register_types(void)
 {
    type_register_static(&foo1_type_info);
    type_register_static(&foo2_type_info);
    ...
 }

 type_init(foo_register_types)

or

 static void foo_register_types(void)
 {
    int i;

    for (i = 0; i < ARRAY_SIZE(type_infos); i++) {
        type_register_static(&type_infos[i]);
    }
 }

 type_init(foo_register_types)

with a single line

 DEFINE_TYPES(type_infos)

where types have static definition which could be consolidated in
a single array of TypeInfo structures.
It saves us ~6-10LOC per use case and would help to replace
imperative foo_register_types() there with declarative style of
type registration.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/qom/object.h | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/include/qom/object.h b/include/qom/object.h
index ce25567..a615066 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -79,6 +79,28 @@ typedef struct InterfaceInfo InterfaceInfo;
  * #TypeInfo describes information about the type including what it inherits
  * from, the instance and class size, and constructor/destructor hooks.
  *
+ * Alternatively several static types could be registered using helper macro
+ * DEFINE_TYPES()
+ *
+ * <example>
+ *   <programlisting>
+ * static const TypeInfo device_types_info[] = {
+ *     {
+ *         .name = TYPE_MY_DEVICE_A,
+ *         .parent = TYPE_DEVICE,
+ *         .instance_size = sizeof(MyDeviceA),
+ *     },
+ *     {
+ *         .name = TYPE_MY_DEVICE_B,
+ *         .parent = TYPE_DEVICE,
+ *         .instance_size = sizeof(MyDeviceB),
+ *     },
+ * };
+ *
+ * DEFINE_TYPES(device_types_info)
+ *   </programlisting>
+ * </example>
+ *
  * Every type has an #ObjectClass associated with it.  #ObjectClass derivatives
  * are instantiated dynamically but there is only ever one instance for any
  * given type.  The #ObjectClass typically holds a table of function pointers
@@ -799,6 +821,20 @@ Type type_register(const TypeInfo *info);
 void type_register_static_array(const TypeInfo *infos, int nr_infos);
 
 /**
+ * DEFINE_TYPES:
+ * @type_array: The array containing #TypeInfo structures to register
+ *
+ * @type_array should be static constant that exists for the life time
+ * that the type is registered.
+ */
+#define DEFINE_TYPES(type_array)                                            \
+static void do_qemu_init_ ## type_array(void)                               \
+{                                                                           \
+    type_register_static_array(type_array, ARRAY_SIZE(type_array));         \
+}                                                                           \
+type_init(do_qemu_init_ ## type_array)
+
+/**
  * object_class_dynamic_cast_assert:
  * @klass: The #ObjectClass to attempt to cast.
  * @typename: The QOM typename of the class to cast to.
-- 
2.7.4

[Qemu-devel] [PATCH v2 04/40] alpha: cleanup cpu type name composition

[Igor Mammedov]

Introduce ALPHA_CPU_TYPE_NAME macro to replace rather ununique
TYPE macro that alpha uses. With new macro it will follow
the same naming convention as other targets.

While at it put scattered TypeInfo into one array which places
type desriptions at one place and reduces code a bit.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2:
 rename type_init_from_array into DEFINE_TYPES

CC: rth@twiddle.net
---
 target/alpha/cpu.h |   3 ++
 target/alpha/cpu.c | 107 +++++++++++++++++------------------------------------
 2 files changed, 37 insertions(+), 73 deletions(-)

diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 6ae2409..0a9ad35 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -470,6 +470,9 @@ void alpha_translate_init(void);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_ALPHA_CPU, cpu_model)
 
+#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
+#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
+
 void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
    signal handlers to inform the virtual CPU of exceptions. non zero
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index b8a21f4..05cef19 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -108,21 +108,18 @@ void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf)
 }
 
 /* Models */
-
-#define TYPE(model) model "-" TYPE_ALPHA_CPU
-
 typedef struct AlphaCPUAlias {
     const char *alias;
     const char *typename;
 } AlphaCPUAlias;
 
 static const AlphaCPUAlias alpha_cpu_aliases[] = {
-    { "21064",   TYPE("ev4") },
-    { "21164",   TYPE("ev5") },
-    { "21164a",  TYPE("ev56") },
-    { "21164pc", TYPE("pca56") },
-    { "21264",   TYPE("ev6") },
-    { "21264a",  TYPE("ev67") },
+    { "21064",   ALPHA_CPU_TYPE_NAME("ev4") },
+    { "21164",   ALPHA_CPU_TYPE_NAME("ev5") },
+    { "21164a",  ALPHA_CPU_TYPE_NAME("ev56") },
+    { "21164pc", ALPHA_CPU_TYPE_NAME("pca56") },
+    { "21264",   ALPHA_CPU_TYPE_NAME("ev6") },
+    { "21264a",  ALPHA_CPU_TYPE_NAME("ev67") },
 };
 
 static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
@@ -145,7 +142,7 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
         }
     }
 
-    typename = g_strdup_printf("%s-" TYPE_ALPHA_CPU, cpu_model);
+    typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && object_class_is_abstract(oc)) {
@@ -155,7 +152,7 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
     /* TODO: remove match everything nonsense */
     /* Default to ev67; no reason not to emulate insns by default. */
     if (!oc) {
-        oc = object_class_by_name(TYPE("ev67"));
+        oc = object_class_by_name(ALPHA_CPU_TYPE_NAME("ev67"));
     }
 
     return oc;
@@ -169,12 +166,6 @@ static void ev4_cpu_initfn(Object *obj)
     env->implver = IMPLVER_2106x;
 }
 
-static const TypeInfo ev4_cpu_type_info = {
-    .name = TYPE("ev4"),
-    .parent = TYPE_ALPHA_CPU,
-    .instance_init = ev4_cpu_initfn,
-};
-
 static void ev5_cpu_initfn(Object *obj)
 {
     AlphaCPU *cpu = ALPHA_CPU(obj);
@@ -183,12 +174,6 @@ static void ev5_cpu_initfn(Object *obj)
     env->implver = IMPLVER_21164;
 }
 
-static const TypeInfo ev5_cpu_type_info = {
-    .name = TYPE("ev5"),
-    .parent = TYPE_ALPHA_CPU,
-    .instance_init = ev5_cpu_initfn,
-};
-
 static void ev56_cpu_initfn(Object *obj)
 {
     AlphaCPU *cpu = ALPHA_CPU(obj);
@@ -197,12 +182,6 @@ static void ev56_cpu_initfn(Object *obj)
     env->amask |= AMASK_BWX;
 }
 
-static const TypeInfo ev56_cpu_type_info = {
-    .name = TYPE("ev56"),
-    .parent = TYPE("ev5"),
-    .instance_init = ev56_cpu_initfn,
-};
-
 static void pca56_cpu_initfn(Object *obj)
 {
     AlphaCPU *cpu = ALPHA_CPU(obj);
@@ -211,12 +190,6 @@ static void pca56_cpu_initfn(Object *obj)
     env->amask |= AMASK_MVI;
 }
 
-static const TypeInfo pca56_cpu_type_info = {
-    .name = TYPE("pca56"),
-    .parent = TYPE("ev56"),
-    .instance_init = pca56_cpu_initfn,
-};
-
 static void ev6_cpu_initfn(Object *obj)
 {
     AlphaCPU *cpu = ALPHA_CPU(obj);
@@ -226,12 +199,6 @@ static void ev6_cpu_initfn(Object *obj)
     env->amask = AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP;
 }
 
-static const TypeInfo ev6_cpu_type_info = {
-    .name = TYPE("ev6"),
-    .parent = TYPE_ALPHA_CPU,
-    .instance_init = ev6_cpu_initfn,
-};
-
 static void ev67_cpu_initfn(Object *obj)
 {
     AlphaCPU *cpu = ALPHA_CPU(obj);
@@ -240,17 +207,6 @@ static void ev67_cpu_initfn(Object *obj)
     env->amask |= AMASK_CIX | AMASK_PREFETCH;
 }
 
-static const TypeInfo ev67_cpu_type_info = {
-    .name = TYPE("ev67"),
-    .parent = TYPE("ev6"),
-    .instance_init = ev67_cpu_initfn,
-};
-
-static const TypeInfo ev68_cpu_type_info = {
-    .name = TYPE("ev68"),
-    .parent = TYPE("ev67"),
-};
-
 static void alpha_cpu_initfn(Object *obj)
 {
     CPUState *cs = CPU(obj);
@@ -303,26 +259,31 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data)
     cc->gdb_num_core_regs = 67;
 }
 
-static const TypeInfo alpha_cpu_type_info = {
-    .name = TYPE_ALPHA_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(AlphaCPU),
-    .instance_init = alpha_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(AlphaCPUClass),
-    .class_init = alpha_cpu_class_init,
+#define DEFINE_ALPHA_CPU_TYPE(base_type, cpu_model, initfn) \
+     {                                                      \
+         .parent = base_type,                               \
+         .instance_init = initfn,                           \
+         .name = ALPHA_CPU_TYPE_NAME(cpu_model),            \
+     }
+
+static const TypeInfo alpha_cpu_type_infos[] = {
+    {
+        .name = TYPE_ALPHA_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(AlphaCPU),
+        .instance_init = alpha_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(AlphaCPUClass),
+        .class_init = alpha_cpu_class_init,
+    },
+    DEFINE_ALPHA_CPU_TYPE(TYPE_ALPHA_CPU, "ev4", ev4_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(TYPE_ALPHA_CPU, "ev5", ev5_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev5"), "ev56", ev56_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev56"), "pca56",
+                          pca56_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(TYPE_ALPHA_CPU, "ev6", ev6_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev6"), "ev67", ev67_cpu_initfn),
+    DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev67"), "ev68", NULL),
 };
 
-static void alpha_cpu_register_types(void)
-{
-    type_register_static(&alpha_cpu_type_info);
-    type_register_static(&ev4_cpu_type_info);
-    type_register_static(&ev5_cpu_type_info);
-    type_register_static(&ev56_cpu_type_info);
-    type_register_static(&pca56_cpu_type_info);
-    type_register_static(&ev6_cpu_type_info);
-    type_register_static(&ev67_cpu_type_info);
-    type_register_static(&ev68_cpu_type_info);
-}
-
-type_init(alpha_cpu_register_types)
+DEFINE_TYPES(alpha_cpu_type_infos)
-- 
2.7.4

[Qemu-devel] [PATCH v2 05/40] alpha: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: rth@twiddle.net
---
 hw/alpha/dp264.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 1b12130..babd6ea 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -51,7 +51,6 @@ static int clipper_pci_map_irq(PCIDevice *d, int irq_num)
 static void clipper_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model ? machine->cpu_model : "ev67";
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
     const char *initrd_filename = machine->initrd_filename;
@@ -67,7 +66,7 @@ static void clipper_init(MachineState *machine)
     /* Create up to 4 cpus.  */
     memset(cpus, 0, sizeof(cpus));
     for (i = 0; i < smp_cpus; ++i) {
-        cpus[i] = ALPHA_CPU(cpu_generic_init(TYPE_ALPHA_CPU, cpu_model));
+        cpus[i] = ALPHA_CPU(cpu_create(machine->cpu_type));
     }
 
     cpus[0]->env.trap_arg0 = ram_size;
@@ -179,6 +178,7 @@ static void clipper_machine_init(MachineClass *mc)
     mc->block_default_type = IF_IDE;
     mc->max_cpus = 4;
     mc->is_default = 1;
+    mc->default_cpu_type = ALPHA_CPU_TYPE_NAME("ev67");
 }
 
 DEFINE_MACHINE("clipper", clipper_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 06/40] cris: cleanup cpu type name composition

[Igor Mammedov]

replace ambiguous TYPE macro with a new CRIS_CPU_TYPE_NAME
and use it consistently in the code.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
v2:
  - rename type_init_from_array into DEFINE_TYPES
  - add & use DEFINE_CRIS_CPU_TYPE (Philippe Mathieu-Daudé <f4bug@amsat.org>)

CC: edgar.iglesias@gmail.com
---
 target/cris/cpu.h |  3 +++
 target/cris/cpu.c | 81 +++++++++++++++++++------------------------------------
 2 files changed, 30 insertions(+), 54 deletions(-)

diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index 5d822de..b64fa35 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -269,6 +269,9 @@ enum {
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_CRIS_CPU, cpu_model)
 
+#define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
+#define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
+
 #define cpu_signal_handler cpu_cris_signal_handler
 
 /* MMU modes definitions */
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index 88d93f2..adf1bc4 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -71,11 +71,11 @@ static ObjectClass *cris_cpu_class_by_name(const char *cpu_model)
 
 #if defined(CONFIG_USER_ONLY)
     if (strcasecmp(cpu_model, "any") == 0) {
-        return object_class_by_name("crisv32-" TYPE_CRIS_CPU);
+        return object_class_by_name(CRIS_CPU_TYPE_NAME("crisv32"));
     }
 #endif
 
-    typename = g_strdup_printf("%s-" TYPE_CRIS_CPU, cpu_model);
+    typename = g_strdup_printf(CRIS_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_CRIS_CPU) ||
@@ -108,7 +108,7 @@ static void cris_cpu_list_entry(gpointer data, gpointer user_data)
     const char *typename = object_class_get_name(oc);
     char *name;
 
-    name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_CRIS_CPU));
+    name = g_strndup(typename, strlen(typename) - strlen(CRIS_CPU_TYPE_SUFFIX));
     (*s->cpu_fprintf)(s->file, "  %s\n", name);
     g_free(name);
 }
@@ -259,38 +259,6 @@ static void crisv32_cpu_class_init(ObjectClass *oc, void *data)
     ccc->vr = 32;
 }
 
-#define TYPE(model) model "-" TYPE_CRIS_CPU
-
-static const TypeInfo cris_cpu_model_type_infos[] = {
-    {
-        .name = TYPE("crisv8"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv8_cpu_class_init,
-    }, {
-        .name = TYPE("crisv9"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv9_cpu_class_init,
-    }, {
-        .name = TYPE("crisv10"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv10_cpu_class_init,
-    }, {
-        .name = TYPE("crisv11"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv11_cpu_class_init,
-    }, {
-        .name = TYPE("crisv17"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv17_cpu_class_init,
-    }, {
-        .name = TYPE("crisv32"),
-        .parent = TYPE_CRIS_CPU,
-        .class_init = crisv32_cpu_class_init,
-    }
-};
-
-#undef TYPE
-
 static void cris_cpu_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
@@ -324,24 +292,29 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data)
     cc->disas_set_info = cris_disas_set_info;
 }
 
-static const TypeInfo cris_cpu_type_info = {
-    .name = TYPE_CRIS_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(CRISCPU),
-    .instance_init = cris_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(CRISCPUClass),
-    .class_init = cris_cpu_class_init,
-};
+#define DEFINE_CRIS_CPU_TYPE(cpu_model, initfn) \
+     {                                          \
+         .parent = TYPE_CRIS_CPU,               \
+         .class_init = initfn,                  \
+         .name = CRIS_CPU_TYPE_NAME(cpu_model), \
+     }
 
-static void cris_cpu_register_types(void)
-{
-    int i;
-
-    type_register_static(&cris_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(cris_cpu_model_type_infos); i++) {
-        type_register_static(&cris_cpu_model_type_infos[i]);
-    }
-}
+static const TypeInfo cris_cpu_model_type_infos[] = {
+    {
+        .name = TYPE_CRIS_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(CRISCPU),
+        .instance_init = cris_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(CRISCPUClass),
+        .class_init = cris_cpu_class_init,
+    },
+    DEFINE_CRIS_CPU_TYPE("crisv8", crisv8_cpu_class_init),
+    DEFINE_CRIS_CPU_TYPE("crisv9", crisv9_cpu_class_init),
+    DEFINE_CRIS_CPU_TYPE("crisv10", crisv10_cpu_class_init),
+    DEFINE_CRIS_CPU_TYPE("crisv11", crisv11_cpu_class_init),
+    DEFINE_CRIS_CPU_TYPE("crisv17", crisv17_cpu_class_init),
+    DEFINE_CRIS_CPU_TYPE("crisv32", crisv32_cpu_class_init),
+};
 
-type_init(cris_cpu_register_types)
+DEFINE_TYPES(cris_cpu_model_type_infos)
-- 
2.7.4

Re: [Qemu-devel] [PATCH v2 06/40] cris: cleanup cpu type name composition

[Philippe Mathieu-Daudé]

On 10/05/2017 10:50 AM, Igor Mammedov wrote:
> replace ambiguous TYPE macro with a new CRIS_CPU_TYPE_NAME
> and use it consistently in the code.
> 
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
> v2:
>   - rename type_init_from_array into DEFINE_TYPES
>   - add & use DEFINE_CRIS_CPU_TYPE (Philippe Mathieu-Daudé <f4bug@amsat.org>)
> 
> CC: edgar.iglesias@gmail.com
> ---
>  target/cris/cpu.h |  3 +++
>  target/cris/cpu.c | 81 +++++++++++++++++++------------------------------------
>  2 files changed, 30 insertions(+), 54 deletions(-)
> 
> diff --git a/target/cris/cpu.h b/target/cris/cpu.h
> index 5d822de..b64fa35 100644
> --- a/target/cris/cpu.h
> +++ b/target/cris/cpu.h
> @@ -269,6 +269,9 @@ enum {
>  
>  #define cpu_init(cpu_model) cpu_generic_init(TYPE_CRIS_CPU, cpu_model)
>  
> +#define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
> +#define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
> +
>  #define cpu_signal_handler cpu_cris_signal_handler
>  
>  /* MMU modes definitions */
> diff --git a/target/cris/cpu.c b/target/cris/cpu.c
> index 88d93f2..adf1bc4 100644
> --- a/target/cris/cpu.c
> +++ b/target/cris/cpu.c
> @@ -71,11 +71,11 @@ static ObjectClass *cris_cpu_class_by_name(const char *cpu_model)
>  
>  #if defined(CONFIG_USER_ONLY)
>      if (strcasecmp(cpu_model, "any") == 0) {
> -        return object_class_by_name("crisv32-" TYPE_CRIS_CPU);
> +        return object_class_by_name(CRIS_CPU_TYPE_NAME("crisv32"));
>      }
>  #endif
>  
> -    typename = g_strdup_printf("%s-" TYPE_CRIS_CPU, cpu_model);
> +    typename = g_strdup_printf(CRIS_CPU_TYPE_NAME("%s"), cpu_model);
>      oc = object_class_by_name(typename);
>      g_free(typename);
>      if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_CRIS_CPU) ||
> @@ -108,7 +108,7 @@ static void cris_cpu_list_entry(gpointer data, gpointer user_data)
>      const char *typename = object_class_get_name(oc);
>      char *name;
>  
> -    name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_CRIS_CPU));
> +    name = g_strndup(typename, strlen(typename) - strlen(CRIS_CPU_TYPE_SUFFIX));
>      (*s->cpu_fprintf)(s->file, "  %s\n", name);
>      g_free(name);
>  }
> @@ -259,38 +259,6 @@ static void crisv32_cpu_class_init(ObjectClass *oc, void *data)
>      ccc->vr = 32;
>  }
>  
> -#define TYPE(model) model "-" TYPE_CRIS_CPU
> -
> -static const TypeInfo cris_cpu_model_type_infos[] = {
> -    {
> -        .name = TYPE("crisv8"),
> -        .parent = TYPE_CRIS_CPU,
> -        .class_init = crisv8_cpu_class_init,
> -    }, {
> -        .name = TYPE("crisv9"),
> -        .parent = TYPE_CRIS_CPU,
> -        .class_init = crisv9_cpu_class_init,
> -    }, {
> -        .name = TYPE("crisv10"),
> -        .parent = TYPE_CRIS_CPU,
> -        .class_init = crisv10_cpu_class_init,
> -    }, {
> -        .name = TYPE("crisv11"),
> -        .parent = TYPE_CRIS_CPU,
> -        .class_init = crisv11_cpu_class_init,
> -    }, {
> -        .name = TYPE("crisv17"),
> -        .parent = TYPE_CRIS_CPU,
> -        .class_init = crisv17_cpu_class_init,
> -    }, {
> -        .name = TYPE("crisv32"),
> -        .parent = TYPE_CRIS_CPU,
> -        .class_init = crisv32_cpu_class_init,
> -    }
> -};
> -
> -#undef TYPE
> -
>  static void cris_cpu_class_init(ObjectClass *oc, void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(oc);
> @@ -324,24 +292,29 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data)
>      cc->disas_set_info = cris_disas_set_info;
>  }
>  
> -static const TypeInfo cris_cpu_type_info = {
> -    .name = TYPE_CRIS_CPU,
> -    .parent = TYPE_CPU,
> -    .instance_size = sizeof(CRISCPU),
> -    .instance_init = cris_cpu_initfn,
> -    .abstract = true,
> -    .class_size = sizeof(CRISCPUClass),
> -    .class_init = cris_cpu_class_init,
> -};
> +#define DEFINE_CRIS_CPU_TYPE(cpu_model, initfn) \
> +     {                                          \
> +         .parent = TYPE_CRIS_CPU,               \
> +         .class_init = initfn,                  \
> +         .name = CRIS_CPU_TYPE_NAME(cpu_model), \
> +     }
>  
> -static void cris_cpu_register_types(void)
> -{
> -    int i;
> -
> -    type_register_static(&cris_cpu_type_info);
> -    for (i = 0; i < ARRAY_SIZE(cris_cpu_model_type_infos); i++) {
> -        type_register_static(&cris_cpu_model_type_infos[i]);
> -    }
> -}
> +static const TypeInfo cris_cpu_model_type_infos[] = {
> +    {
> +        .name = TYPE_CRIS_CPU,
> +        .parent = TYPE_CPU,
> +        .instance_size = sizeof(CRISCPU),
> +        .instance_init = cris_cpu_initfn,
> +        .abstract = true,
> +        .class_size = sizeof(CRISCPUClass),
> +        .class_init = cris_cpu_class_init,
> +    },
> +    DEFINE_CRIS_CPU_TYPE("crisv8", crisv8_cpu_class_init),
> +    DEFINE_CRIS_CPU_TYPE("crisv9", crisv9_cpu_class_init),
> +    DEFINE_CRIS_CPU_TYPE("crisv10", crisv10_cpu_class_init),
> +    DEFINE_CRIS_CPU_TYPE("crisv11", crisv11_cpu_class_init),
> +    DEFINE_CRIS_CPU_TYPE("crisv17", crisv17_cpu_class_init),
> +    DEFINE_CRIS_CPU_TYPE("crisv32", crisv32_cpu_class_init),
> +};
>  
> -type_init(cris_cpu_register_types)
> +DEFINE_TYPES(cris_cpu_model_type_infos)
> 

[Qemu-devel] [PATCH v2 07/40] cris: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: edgar.iglesias@gmail.com
---
 hw/cris/axis_dev88.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c
index 5eb552b..9ccc435 100644
--- a/hw/cris/axis_dev88.c
+++ b/hw/cris/axis_dev88.c
@@ -251,7 +251,6 @@ static
 void axisdev88_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
     CRISCPU *cpu;
@@ -268,10 +267,7 @@ void axisdev88_init(MachineState *machine)
     MemoryRegion *phys_intmem = g_new(MemoryRegion, 1);
 
     /* init CPUs */
-    if (cpu_model == NULL) {
-        cpu_model = "crisv32";
-    }
-    cpu = CRIS_CPU(cpu_generic_init(TYPE_CRIS_CPU, cpu_model));
+    cpu = CRIS_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
 
     /* allocate RAM */
@@ -359,6 +355,7 @@ static void axisdev88_machine_init(MachineClass *mc)
     mc->desc = "AXIS devboard 88";
     mc->init = axisdev88_init;
     mc->is_default = 1;
+    mc->default_cpu_type = CRIS_CPU_TYPE_NAME("crisv32");
 }
 
 DEFINE_MACHINE("axis-dev88", axisdev88_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 08/40] lm32: cleanup cpu type name composition

[Igor Mammedov]

introduce LM32_CPU_TYPE_NAME macro and consistently use it
to construct cpu type names. While at it replace dynamic
cpu type name composition with static data.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Michael Walle <michael@walle.cc>
---
v2:  rename type_init_from_array into DEFINE_TYPES

CC: michael@walle.cc
---
 target/lm32/cpu.h |  3 +++
 target/lm32/cpu.c | 74 +++++++++++++++++--------------------------------------
 2 files changed, 25 insertions(+), 52 deletions(-)

diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h
index de265b5..2279594 100644
--- a/target/lm32/cpu.h
+++ b/target/lm32/cpu.h
@@ -257,6 +257,9 @@ bool lm32_cpu_do_semihosting(CPUState *cs);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_LM32_CPU, cpu_model)
 
+#define LM32_CPU_TYPE_SUFFIX "-" TYPE_LM32_CPU
+#define LM32_CPU_TYPE_NAME(model) model LM32_CPU_TYPE_SUFFIX
+
 #define cpu_list lm32_cpu_list
 #define cpu_signal_handler cpu_lm32_signal_handler
 
diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
index bf081f5..43d84a1 100644
--- a/target/lm32/cpu.c
+++ b/target/lm32/cpu.c
@@ -51,7 +51,7 @@ static void lm32_cpu_list_entry(gpointer data, gpointer user_data)
     const char *typename = object_class_get_name(oc);
     char *name;
 
-    name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_LM32_CPU));
+    name = g_strndup(typename, strlen(typename) - strlen(LM32_CPU_TYPE_SUFFIX));
     (*s->cpu_fprintf)(s->file, "  %s\n", name);
     g_free(name);
 }
@@ -221,32 +221,12 @@ static void lm32_full_cpu_initfn(Object *obj)
                   | LM32_FEATURE_CYCLE_COUNT;
 }
 
-typedef struct LM32CPUInfo {
-    const char *name;
-    void (*initfn)(Object *obj);
-} LM32CPUInfo;
-
-static const LM32CPUInfo lm32_cpus[] = {
-    {
-        .name = "lm32-basic",
-        .initfn = lm32_basic_cpu_initfn,
-    },
-    {
-        .name = "lm32-standard",
-        .initfn = lm32_standard_cpu_initfn,
-    },
-    {
-        .name = "lm32-full",
-        .initfn = lm32_full_cpu_initfn,
-    },
-};
-
 static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model)
 {
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_LM32_CPU, cpu_model);
+    typename = g_strdup_printf(LM32_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) ||
@@ -288,36 +268,26 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
     cc->disas_set_info = lm32_cpu_disas_set_info;
 }
 
-static void lm32_register_cpu_type(const LM32CPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_LM32_CPU,
-        .instance_init = info->initfn,
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_LM32_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
+#define DEFINE_LM32_CPU_TYPE(cpu_model, initfn) \
+    { \
+        .parent = TYPE_LM32_CPU, \
+        .name = LM32_CPU_TYPE_NAME(cpu_model), \
+        .instance_init = initfn, \
+    }
 
-static const TypeInfo lm32_cpu_type_info = {
-    .name = TYPE_LM32_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(LM32CPU),
-    .instance_init = lm32_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(LM32CPUClass),
-    .class_init = lm32_cpu_class_init,
+static const TypeInfo lm32_cpus_type_infos[] = {
+    { /* base class should be registered first */
+         .name = TYPE_LM32_CPU,
+         .parent = TYPE_CPU,
+         .instance_size = sizeof(LM32CPU),
+         .instance_init = lm32_cpu_initfn,
+         .abstract = true,
+         .class_size = sizeof(LM32CPUClass),
+         .class_init = lm32_cpu_class_init,
+    },
+    DEFINE_LM32_CPU_TYPE("lm32-basic", lm32_basic_cpu_initfn),
+    DEFINE_LM32_CPU_TYPE("lm32-standard", lm32_standard_cpu_initfn),
+    DEFINE_LM32_CPU_TYPE("lm32-full", lm32_full_cpu_initfn),
 };
 
-static void lm32_cpu_register_types(void)
-{
-    int i;
-
-    type_register_static(&lm32_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(lm32_cpus); i++) {
-        lm32_register_cpu_type(&lm32_cpus[i]);
-    }
-}
-
-type_init(lm32_cpu_register_types)
+DEFINE_TYPES(lm32_cpus_type_infos)
-- 
2.7.4

[Qemu-devel] [PATCH v2 09/40] lm32: milkymist: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Michael Walle <michael@walle.cc>
---
CC: michael@walle.cc
---
 hw/lm32/milkymist.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
index 4db4d2d..d4e765f 100644
--- a/hw/lm32/milkymist.c
+++ b/hw/lm32/milkymist.c
@@ -80,7 +80,6 @@ static void main_cpu_reset(void *opaque)
 static void
 milkymist_init(MachineState *machine)
 {
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
     const char *initrd_filename = machine->initrd_filename;
@@ -108,10 +107,7 @@ milkymist_init(MachineState *machine)
 
     reset_info = g_malloc0(sizeof(ResetInfo));
 
-    if (cpu_model == NULL) {
-        cpu_model = "lm32-full";
-    }
-    cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
+    cpu = LM32_CPU(cpu_create(machine->cpu_type));
 
     env = &cpu->env;
     reset_info->cpu = cpu;
@@ -216,6 +212,7 @@ static void milkymist_machine_init(MachineClass *mc)
     mc->desc = "Milkymist One";
     mc->init = milkymist_init;
     mc->is_default = 0;
+    mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
 }
 
 DEFINE_MACHINE("milkymist", milkymist_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 10/40] lm32: lm32_boards: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Michael Walle <michael@walle.cc>
---
CC: michael@walle.cc
---
 hw/lm32/lm32_boards.c | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
index b0bb3ef..002d638 100644
--- a/hw/lm32/lm32_boards.c
+++ b/hw/lm32/lm32_boards.c
@@ -75,7 +75,6 @@ static void main_cpu_reset(void *opaque)
 
 static void lm32_evr_init(MachineState *machine)
 {
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     LM32CPU *cpu;
     CPULM32State *env;
@@ -101,10 +100,7 @@ static void lm32_evr_init(MachineState *machine)
 
     reset_info = g_malloc0(sizeof(ResetInfo));
 
-    if (cpu_model == NULL) {
-        cpu_model = "lm32-full";
-    }
-    cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
+    cpu = LM32_CPU(cpu_create(machine->cpu_type));
 
     env = &cpu->env;
     reset_info->cpu = cpu;
@@ -163,7 +159,6 @@ static void lm32_evr_init(MachineState *machine)
 
 static void lm32_uclinux_init(MachineState *machine)
 {
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
     const char *initrd_filename = machine->initrd_filename;
@@ -198,10 +193,7 @@ static void lm32_uclinux_init(MachineState *machine)
 
     reset_info = g_malloc0(sizeof(ResetInfo));
 
-    if (cpu_model == NULL) {
-        cpu_model = "lm32-full";
-    }
-    cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
+    cpu = LM32_CPU(cpu_create(machine->cpu_type));
 
     env = &cpu->env;
     reset_info->cpu = cpu;
@@ -295,6 +287,7 @@ static void lm32_evr_class_init(ObjectClass *oc, void *data)
     mc->desc = "LatticeMico32 EVR32 eval system";
     mc->init = lm32_evr_init;
     mc->is_default = 1;
+    mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
 }
 
 static const TypeInfo lm32_evr_type = {
@@ -310,6 +303,7 @@ static void lm32_uclinux_class_init(ObjectClass *oc, void *data)
     mc->desc = "lm32 platform for uClinux and u-boot by Theobroma Systems";
     mc->init = lm32_uclinux_init;
     mc->is_default = 0;
+    mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
 }
 
 static const TypeInfo lm32_uclinux_type = {
-- 
2.7.4

[Qemu-devel] [PATCH v2 11/40] m68k: cleanup cpu type name composition

[Igor Mammedov]

use new M68K_CPU_TYPE_NAME to compose CPU type names
and get rid of intermediate M68kCPUInfo/register_cpu_type()
which is replaced by static TypeInfo array.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Laurent Vivier <laurent@vivier.eu>
---
v2:  rename type_init_from_array into DEFINE_TYPES

CC: laurent@vivier.eu
---
 target/m68k/cpu.h |  3 +++
 target/m68k/cpu.c | 75 ++++++++++++++++++++-----------------------------------
 2 files changed, 30 insertions(+), 48 deletions(-)

diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index d936547..afae5f6 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -323,6 +323,9 @@ void register_m68k_insns (CPUM68KState *env);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_M68K_CPU, cpu_model)
 
+#define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU
+#define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX
+
 #define cpu_signal_handler cpu_m68k_signal_handler
 #define cpu_list m68k_cpu_list
 
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 8c70e08..bd339ab 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -87,7 +87,7 @@ static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_M68K_CPU, cpu_model);
+    typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
@@ -202,23 +202,6 @@ static void any_cpu_initfn(Object *obj)
     m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
 }
 
-typedef struct M68kCPUInfo {
-    const char *name;
-    void (*instance_init)(Object *obj);
-} M68kCPUInfo;
-
-static const M68kCPUInfo m68k_cpus[] = {
-    { .name = "m68000", .instance_init = m68000_cpu_initfn },
-    { .name = "m68020", .instance_init = m68020_cpu_initfn },
-    { .name = "m68030", .instance_init = m68030_cpu_initfn },
-    { .name = "m68040", .instance_init = m68040_cpu_initfn },
-    { .name = "m68060", .instance_init = m68060_cpu_initfn },
-    { .name = "m5206", .instance_init = m5206_cpu_initfn },
-    { .name = "m5208", .instance_init = m5208_cpu_initfn },
-    { .name = "cfv4e", .instance_init = cfv4e_cpu_initfn },
-    { .name = "any",   .instance_init = any_cpu_initfn },
-};
-
 static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
 {
     CPUState *cs = CPU(dev);
@@ -295,36 +278,32 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
     dc->vmsd = &vmstate_m68k_cpu;
 }
 
-static void register_cpu_type(const M68kCPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_M68K_CPU,
-        .instance_init = info->instance_init,
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_M68K_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
+#define DEFINE_M68K_CPU_TYPE(cpu_model, initfn) \
+    {                                           \
+        .name = M68K_CPU_TYPE_NAME(cpu_model),  \
+        .instance_init = initfn,                \
+        .parent = TYPE_M68K_CPU,                \
+    }
 
-static const TypeInfo m68k_cpu_type_info = {
-    .name = TYPE_M68K_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(M68kCPU),
-    .instance_init = m68k_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(M68kCPUClass),
-    .class_init = m68k_cpu_class_init,
+static const TypeInfo m68k_cpus_type_infos[] = {
+    { /* base class should be registered first */
+        .name = TYPE_M68K_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(M68kCPU),
+        .instance_init = m68k_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(M68kCPUClass),
+        .class_init = m68k_cpu_class_init,
+    },
+    DEFINE_M68K_CPU_TYPE("m68000", m68000_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m68020", m68020_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m68030", m68030_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m68040", m68040_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m68060", m68060_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m5206", m5206_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("m5208", m5208_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("cfv4e", cfv4e_cpu_initfn),
+    DEFINE_M68K_CPU_TYPE("any", any_cpu_initfn),
 };
 
-static void m68k_cpu_register_types(void)
-{
-    int i;
-
-    type_register_static(&m68k_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(m68k_cpus); i++) {
-        register_cpu_type(&m68k_cpus[i]);
-    }
-}
-
-type_init(m68k_cpu_register_types)
+DEFINE_TYPES(m68k_cpus_type_infos)
-- 
2.7.4

[Qemu-devel] [PATCH v2 12/40] m68k: an5206: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
---
CC: huth@tuxfamily.org
CC: laurent@vivier.eu
---
 hw/m68k/an5206.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c
index 9002c46..0cedc54 100644
--- a/hw/m68k/an5206.c
+++ b/hw/m68k/an5206.c
@@ -28,7 +28,6 @@
 static void an5206_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     M68kCPU *cpu;
     CPUM68KState *env;
@@ -39,10 +38,7 @@ static void an5206_init(MachineState *machine)
     MemoryRegion *ram = g_new(MemoryRegion, 1);
     MemoryRegion *sram = g_new(MemoryRegion, 1);
 
-    if (!cpu_model) {
-        cpu_model = "m5206";
-    }
-    cpu = M68K_CPU(cpu_generic_init(TYPE_M68K_CPU, cpu_model));
+    cpu = M68K_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
 
     /* Initialize CPU registers.  */
@@ -94,6 +90,7 @@ static void an5206_machine_init(MachineClass *mc)
 {
     mc->desc = "Arnewsh 5206";
     mc->init = an5206_init;
+    mc->default_cpu_type = M68K_CPU_TYPE_NAME("m5206");
 }
 
 DEFINE_MACHINE("an5206", an5206_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 13/40] m68k: mcf5208: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
---
CC: laurent@vivier.eu
CC: huth@tuxfamily.org
---
 hw/m68k/mcf5208.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index b9dde75..cfac845 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -217,7 +217,6 @@ static void mcf_fec_init(MemoryRegion *sysmem, NICInfo *nd, hwaddr base,
 static void mcf5208evb_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     M68kCPU *cpu;
     CPUM68KState *env;
@@ -229,10 +228,7 @@ static void mcf5208evb_init(MachineState *machine)
     MemoryRegion *ram = g_new(MemoryRegion, 1);
     MemoryRegion *sram = g_new(MemoryRegion, 1);
 
-    if (!cpu_model) {
-        cpu_model = "m5208";
-    }
-    cpu = M68K_CPU(cpu_generic_init(TYPE_M68K_CPU, cpu_model));
+    cpu = M68K_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
 
     /* Initialize CPU registers.  */
@@ -321,6 +317,7 @@ static void mcf5208evb_machine_init(MachineClass *mc)
     mc->desc = "MCF5206EVB";
     mc->init = mcf5208evb_init;
     mc->is_default = 1;
+    mc->default_cpu_type = M68K_CPU_TYPE_NAME("m5208");
 }
 
 DEFINE_MACHINE("mcf5208evb", mcf5208evb_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 14/40] moxie: fix qemu-system-moxie failing to start with CLI "-cpu MoxieLite"

[Igor Mammedov]

It 'works' with default CPU only because of bug in
moxie_cpu_class_by_name() where it treats cpu_model
as type name and default cpu_model also happens to be
type name. But specifying explicitly cpu on CLI,
ex: '-cpu MoxieLite', makes QEMU fail since
moxie_cpu_class_by_name() doesn't traslate cpu_model
to cpu type and fails to find corresponding object class.

Fix moxie_cpu_class_by_name() to do proper
   cpu_model -> cpu type
translation and fix default cpu_model to be cpu_model
instead of being typename.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: green@moxielogic.com
---
 hw/moxie/moxiesim.c | 2 +-
 target/moxie/cpu.c  | 7 ++++++-
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
index 5ea8dd3..01b9f34 100644
--- a/hw/moxie/moxiesim.c
+++ b/hw/moxie/moxiesim.c
@@ -116,7 +116,7 @@ static void moxiesim_init(MachineState *machine)
 
     /* Init CPUs. */
     if (cpu_model == NULL) {
-        cpu_model = "MoxieLite-moxie-cpu";
+        cpu_model = "MoxieLite";
     }
     cpu = MOXIE_CPU(cpu_generic_init(TYPE_MOXIE_CPU, cpu_model));
     env = &cpu->env;
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 30bd44f..d4626a1 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -89,7 +89,12 @@ static void moxie_cpu_initfn(Object *obj)
 
 static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
 {
-    ObjectClass *oc = object_class_by_name(cpu_model);
+    ObjectClass *oc;
+    char *typename;
+
+    typename = g_strdup_printf("%s-" TYPE_MOXIE_CPU, cpu_model);
+    oc = object_class_by_name(typename);
+    g_free(typename);
     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
                        object_class_is_abstract(oc))) {
         return NULL;
-- 
2.7.4

[Qemu-devel] [PATCH v2 15/40] moxie: cleanup cpu type name composition

[Igor Mammedov]

introduce MOXIE_CPU_TYPE_NAME macro and consistently use it
to construct cpu type names. While at it replace dynamic
cpu type name composition with static data.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2:  rename type_init_from_array into DEFINE_TYPES

CC: green@moxielogic.com
---
 target/moxie/cpu.h |  3 +++
 target/moxie/cpu.c | 56 +++++++++++++++++-------------------------------------
 2 files changed, 20 insertions(+), 39 deletions(-)

diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h
index 75decaa..d37e6a5 100644
--- a/target/moxie/cpu.h
+++ b/target/moxie/cpu.h
@@ -122,6 +122,9 @@ int cpu_moxie_signal_handler(int host_signum, void *pinfo,
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_MOXIE_CPU, cpu_model)
 
+#define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU
+#define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX
+
 #define cpu_signal_handler cpu_moxie_signal_handler
 
 static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch)
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index d4626a1..f68074d 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -92,7 +92,7 @@ static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_MOXIE_CPU, cpu_model);
+    typename = g_strdup_printf(MOXIE_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
@@ -139,46 +139,24 @@ static void moxie_any_initfn(Object *obj)
     /* Set cpu feature flags */
 }
 
-typedef struct MoxieCPUInfo {
-    const char *name;
-    void (*initfn)(Object *obj);
-} MoxieCPUInfo;
-
-static const MoxieCPUInfo moxie_cpus[] = {
-    { .name = "MoxieLite",      .initfn = moxielite_initfn },
-    { .name = "any",            .initfn = moxie_any_initfn },
-};
+#define DEFINE_MOXIE_CPU_TYPE(cpu_model, initfn) \
+    {                                            \
+        .parent = TYPE_MOXIE_CPU,                \
+        .instance_init = initfn,                 \
+        .name = MOXIE_CPU_TYPE_NAME(cpu_model),  \
+    }
 
-static void cpu_register(const MoxieCPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_MOXIE_CPU,
+static const TypeInfo moxie_cpus_type_infos[] = {
+    { /* base class should be registered first */
+        .name = TYPE_MOXIE_CPU,
+        .parent = TYPE_CPU,
         .instance_size = sizeof(MoxieCPU),
-        .instance_init = info->initfn,
+        .instance_init = moxie_cpu_initfn,
         .class_size = sizeof(MoxieCPUClass),
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_MOXIE_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
-
-static const TypeInfo moxie_cpu_type_info = {
-    .name = TYPE_MOXIE_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(MoxieCPU),
-    .instance_init = moxie_cpu_initfn,
-    .class_size = sizeof(MoxieCPUClass),
-    .class_init = moxie_cpu_class_init,
+        .class_init = moxie_cpu_class_init,
+    },
+    DEFINE_MOXIE_CPU_TYPE("MoxieLite", moxielite_initfn),
+    DEFINE_MOXIE_CPU_TYPE("any", moxie_any_initfn),
 };
 
-static void moxie_cpu_register_types(void)
-{
-    int i;
-    type_register_static(&moxie_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(moxie_cpus); i++) {
-        cpu_register(&moxie_cpus[i]);
-    }
-}
-
-type_init(moxie_cpu_register_types)
+DEFINE_TYPES(moxie_cpus_type_infos)
-- 
2.7.4

[Qemu-devel] [PATCH v2 16/40] moxie: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: green@moxielogic.com
---
 hw/moxie/moxiesim.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
index 01b9f34..3ba5848 100644
--- a/hw/moxie/moxiesim.c
+++ b/hw/moxie/moxiesim.c
@@ -103,7 +103,6 @@ static void moxiesim_init(MachineState *machine)
 {
     MoxieCPU *cpu = NULL;
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
     const char *initrd_filename = machine->initrd_filename;
@@ -115,10 +114,7 @@ static void moxiesim_init(MachineState *machine)
     LoaderParams loader_params;
 
     /* Init CPUs. */
-    if (cpu_model == NULL) {
-        cpu_model = "MoxieLite";
-    }
-    cpu = MOXIE_CPU(cpu_generic_init(TYPE_MOXIE_CPU, cpu_model));
+    cpu = MOXIE_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
 
     qemu_register_reset(main_cpu_reset, cpu);
@@ -150,6 +146,7 @@ static void moxiesim_machine_init(MachineClass *mc)
     mc->desc = "Moxie simulator platform";
     mc->init = moxiesim_init;
     mc->is_default = 1;
+    mc->default_cpu_type = MOXIE_CPU_TYPE_NAME("MoxieLite");
 }
 
 DEFINE_MACHINE("moxiesim", moxiesim_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 17/40] openrisc: cleanup cpu type name composition

[Igor Mammedov]

use new OPENRISC_CPU_TYPE_NAME to compose CPU type name and get
rid of intermediate OpenRISCCPUInfo/openrisc_cpu_register_types()
which is replaced by static TypeInfo array.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2:  rename type_init_from_array into DEFINE_TYPES

CC: shorne@gmail.com
---
 target/openrisc/cpu.h |  3 +++
 target/openrisc/cpu.c | 69 +++++++++++++++++----------------------------------
 2 files changed, 26 insertions(+), 46 deletions(-)

diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index f51b89a..576cf66 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -390,6 +390,9 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu,
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model)
 
+#define OPENRISC_CPU_TYPE_SUFFIX "-" TYPE_OPENRISC_CPU
+#define OPENRISC_CPU_TYPE_NAME(model) model OPENRISC_CPU_TYPE_SUFFIX
+
 #include "exec/cpu-all.h"
 
 #define TB_FLAGS_DFLAG 1
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index af9cdcc..629831a 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -108,7 +108,7 @@ static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_OPENRISC_CPU, cpu_model);
+    typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU) ||
@@ -133,16 +133,6 @@ static void openrisc_any_initfn(Object *obj)
     cpu->env.cpucfgr = CPUCFGR_NSGF | CPUCFGR_OB32S | CPUCFGR_EVBARP;
 }
 
-typedef struct OpenRISCCPUInfo {
-    const char *name;
-    void (*initfn)(Object *obj);
-} OpenRISCCPUInfo;
-
-static const OpenRISCCPUInfo openrisc_cpus[] = {
-    { .name = "or1200",      .initfn = or1200_initfn },
-    { .name = "any",         .initfn = openrisc_any_initfn },
-};
-
 static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
 {
     OpenRISCCPUClass *occ = OPENRISC_CPU_CLASS(oc);
@@ -172,40 +162,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
     cc->gdb_num_core_regs = 32 + 3;
 }
 
-static void cpu_register(const OpenRISCCPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_OPENRISC_CPU,
-        .instance_size = sizeof(OpenRISCCPU),
-        .instance_init = info->initfn,
-        .class_size = sizeof(OpenRISCCPUClass),
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_OPENRISC_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
-
-static const TypeInfo openrisc_cpu_type_info = {
-    .name = TYPE_OPENRISC_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(OpenRISCCPU),
-    .instance_init = openrisc_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(OpenRISCCPUClass),
-    .class_init = openrisc_cpu_class_init,
-};
-
-static void openrisc_cpu_register_types(void)
-{
-    int i;
-
-    type_register_static(&openrisc_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(openrisc_cpus); i++) {
-        cpu_register(&openrisc_cpus[i]);
-    }
-}
-
 /* Sort alphabetically by type name, except for "any". */
 static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b)
 {
@@ -254,4 +210,25 @@ void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf)
     g_slist_free(list);
 }
 
-type_init(openrisc_cpu_register_types)
+#define DEFINE_OPENRISC_CPU_TYPE(cpu_model, initfn) \
+    {                                               \
+        .parent = TYPE_OPENRISC_CPU,                \
+        .instance_init = initfn,                    \
+        .name = OPENRISC_CPU_TYPE_NAME(cpu_model),  \
+    }
+
+static const TypeInfo openrisc_cpus_type_infos[] = {
+    { /* base class should be registered first */
+        .name = TYPE_OPENRISC_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(OpenRISCCPU),
+        .instance_init = openrisc_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(OpenRISCCPUClass),
+        .class_init = openrisc_cpu_class_init,
+    },
+    DEFINE_OPENRISC_CPU_TYPE("or1200", or1200_initfn),
+    DEFINE_OPENRISC_CPU_TYPE("any", openrisc_any_initfn),
+};
+
+DEFINE_TYPES(openrisc_cpus_type_infos)
-- 
2.7.4

Re: [Qemu-devel] [PATCH v2 17/40] openrisc: cleanup cpu type name composition

[Stafford Horne]

On Thu, Oct 05, 2017 at 03:50:51PM +0200, Igor Mammedov wrote:
> use new OPENRISC_CPU_TYPE_NAME to compose CPU type name and get
> rid of intermediate OpenRISCCPUInfo/openrisc_cpu_register_types()
> which is replaced by static TypeInfo array.
> 
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

This is nice

Acked-by: Stafford Horne <shorne@gmail.com>

> ---
> v2:  rename type_init_from_array into DEFINE_TYPES
> 
> CC: shorne@gmail.com
> ---
>  target/openrisc/cpu.h |  3 +++
>  target/openrisc/cpu.c | 69 +++++++++++++++++----------------------------------
>  2 files changed, 26 insertions(+), 46 deletions(-)
> 
> diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
> index f51b89a..576cf66 100644
> --- a/target/openrisc/cpu.h
> +++ b/target/openrisc/cpu.h
> @@ -390,6 +390,9 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu,
>  
>  #define cpu_init(cpu_model) cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model)
>  
> +#define OPENRISC_CPU_TYPE_SUFFIX "-" TYPE_OPENRISC_CPU
> +#define OPENRISC_CPU_TYPE_NAME(model) model OPENRISC_CPU_TYPE_SUFFIX
> +
>  #include "exec/cpu-all.h"
>  
>  #define TB_FLAGS_DFLAG 1
> diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
> index af9cdcc..629831a 100644
> --- a/target/openrisc/cpu.c
> +++ b/target/openrisc/cpu.c
> @@ -108,7 +108,7 @@ static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model)
>      ObjectClass *oc;
>      char *typename;
>  
> -    typename = g_strdup_printf("%s-" TYPE_OPENRISC_CPU, cpu_model);
> +    typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model);
>      oc = object_class_by_name(typename);
>      g_free(typename);
>      if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU) ||
> @@ -133,16 +133,6 @@ static void openrisc_any_initfn(Object *obj)
>      cpu->env.cpucfgr = CPUCFGR_NSGF | CPUCFGR_OB32S | CPUCFGR_EVBARP;
>  }
>  
> -typedef struct OpenRISCCPUInfo {
> -    const char *name;
> -    void (*initfn)(Object *obj);
> -} OpenRISCCPUInfo;
> -
> -static const OpenRISCCPUInfo openrisc_cpus[] = {
> -    { .name = "or1200",      .initfn = or1200_initfn },
> -    { .name = "any",         .initfn = openrisc_any_initfn },
> -};
> -
>  static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
>  {
>      OpenRISCCPUClass *occ = OPENRISC_CPU_CLASS(oc);
> @@ -172,40 +162,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
>      cc->gdb_num_core_regs = 32 + 3;
>  }
>  
> -static void cpu_register(const OpenRISCCPUInfo *info)
> -{
> -    TypeInfo type_info = {
> -        .parent = TYPE_OPENRISC_CPU,
> -        .instance_size = sizeof(OpenRISCCPU),
> -        .instance_init = info->initfn,
> -        .class_size = sizeof(OpenRISCCPUClass),
> -    };
> -
> -    type_info.name = g_strdup_printf("%s-" TYPE_OPENRISC_CPU, info->name);
> -    type_register(&type_info);
> -    g_free((void *)type_info.name);
> -}
> -
> -static const TypeInfo openrisc_cpu_type_info = {
> -    .name = TYPE_OPENRISC_CPU,
> -    .parent = TYPE_CPU,
> -    .instance_size = sizeof(OpenRISCCPU),
> -    .instance_init = openrisc_cpu_initfn,
> -    .abstract = true,
> -    .class_size = sizeof(OpenRISCCPUClass),
> -    .class_init = openrisc_cpu_class_init,
> -};
> -
> -static void openrisc_cpu_register_types(void)
> -{
> -    int i;
> -
> -    type_register_static(&openrisc_cpu_type_info);
> -    for (i = 0; i < ARRAY_SIZE(openrisc_cpus); i++) {
> -        cpu_register(&openrisc_cpus[i]);
> -    }
> -}
> -
>  /* Sort alphabetically by type name, except for "any". */
>  static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b)
>  {
> @@ -254,4 +210,25 @@ void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf)
>      g_slist_free(list);
>  }
>  
> -type_init(openrisc_cpu_register_types)
> +#define DEFINE_OPENRISC_CPU_TYPE(cpu_model, initfn) \
> +    {                                               \
> +        .parent = TYPE_OPENRISC_CPU,                \
> +        .instance_init = initfn,                    \
> +        .name = OPENRISC_CPU_TYPE_NAME(cpu_model),  \
> +    }
> +
> +static const TypeInfo openrisc_cpus_type_infos[] = {
> +    { /* base class should be registered first */
> +        .name = TYPE_OPENRISC_CPU,
> +        .parent = TYPE_CPU,
> +        .instance_size = sizeof(OpenRISCCPU),
> +        .instance_init = openrisc_cpu_initfn,
> +        .abstract = true,
> +        .class_size = sizeof(OpenRISCCPUClass),
> +        .class_init = openrisc_cpu_class_init,
> +    },
> +    DEFINE_OPENRISC_CPU_TYPE("or1200", or1200_initfn),
> +    DEFINE_OPENRISC_CPU_TYPE("any", openrisc_any_initfn),
> +};
> +
> +DEFINE_TYPES(openrisc_cpus_type_infos)
> -- 
> 2.7.4
> 

[Qemu-devel] [PATCH v2 18/40] openrisc: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: shorne@gmail.com
---
 hw/openrisc/openrisc_sim.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 86bf284..f61b63d 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -98,18 +98,13 @@ static void cpu_openrisc_load_kernel(ram_addr_t ram_size,
 static void openrisc_sim_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     OpenRISCCPU *cpu = NULL;
     MemoryRegion *ram;
     int n;
 
-    if (!cpu_model) {
-        cpu_model = "or1200";
-    }
-
     for (n = 0; n < smp_cpus; n++) {
-        cpu = OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model));
+        cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));
         qemu_register_reset(main_cpu_reset, cpu);
         main_cpu_reset(cpu);
     }
@@ -138,6 +133,7 @@ static void openrisc_sim_machine_init(MachineClass *mc)
     mc->init = openrisc_sim_init;
     mc->max_cpus = 1;
     mc->is_default = 1;
+    mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200");
 }
 
 DEFINE_MACHINE("or1k-sim", openrisc_sim_machine_init)
-- 
2.7.4

Re: [Qemu-devel] [PATCH v2 18/40] openrisc: use generic cpu_model parsing

[Stafford Horne]

On Thu, Oct 05, 2017 at 03:50:52PM +0200, Igor Mammedov wrote:
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Less lines of code, thanks.

Acked-by: Stafford Horne <shorne@gmail.com>

> ---
> CC: shorne@gmail.com
> ---
>  hw/openrisc/openrisc_sim.c | 8 ++------
>  1 file changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
> index 86bf284..f61b63d 100644
> --- a/hw/openrisc/openrisc_sim.c
> +++ b/hw/openrisc/openrisc_sim.c
> @@ -98,18 +98,13 @@ static void cpu_openrisc_load_kernel(ram_addr_t ram_size,
>  static void openrisc_sim_init(MachineState *machine)
>  {
>      ram_addr_t ram_size = machine->ram_size;
> -    const char *cpu_model = machine->cpu_model;
>      const char *kernel_filename = machine->kernel_filename;
>      OpenRISCCPU *cpu = NULL;
>      MemoryRegion *ram;
>      int n;
>  
> -    if (!cpu_model) {
> -        cpu_model = "or1200";
> -    }
> -
>      for (n = 0; n < smp_cpus; n++) {
> -        cpu = OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model));
> +        cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));
>          qemu_register_reset(main_cpu_reset, cpu);
>          main_cpu_reset(cpu);
>      }
> @@ -138,6 +133,7 @@ static void openrisc_sim_machine_init(MachineClass *mc)
>      mc->init = openrisc_sim_init;
>      mc->max_cpus = 1;
>      mc->is_default = 1;
> +    mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200");
>  }
>  
>  DEFINE_MACHINE("or1k-sim", openrisc_sim_machine_init)
> -- 
> 2.7.4
> 

[Qemu-devel] [PATCH v2 19/40] sh4: r2d: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: Magnus Damm <magnus.damm@gmail.com>
CC: Aurelien Jarno <aurelien@aurel32.net>
---
 hw/sh4/r2d.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index 16b9ed2..458ed83 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -225,7 +225,6 @@ static struct QEMU_PACKED
 
 static void r2d_init(MachineState *machine)
 {
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
     const char *initrd_filename = machine->initrd_filename;
@@ -242,11 +241,7 @@ static void r2d_init(MachineState *machine)
     MemoryRegion *address_space_mem = get_system_memory();
     PCIBus *pci_bus;
 
-    if (cpu_model == NULL) {
-        cpu_model = "SH7751R";
-    }
-
-    cpu = SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));
+    cpu = SUPERH_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
 
     reset_info = g_malloc0(sizeof(ResetData));
@@ -365,6 +360,7 @@ static void r2d_machine_init(MachineClass *mc)
     mc->desc = "r2d-plus board";
     mc->init = r2d_init;
     mc->block_default_type = IF_IDE;
+    mc->default_cpu_type = TYPE_SH7751R_CPU;
 }
 
 DEFINE_MACHINE("r2d", r2d_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 20/40] sh4: shix: use generic cpu_model parsing

[Igor Mammedov]

default cpu model 'any' resolves to type TYPE_SH7750R_CPU
in superh_cpu_class_by_name(), so use it directly.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2:
  - Explain in commit message why default cpu model 'any' is
    replaced by TYPE_SH7750R_CPU (Philippe Mathieu-Daudé)

CC: Magnus Damm <magnus.damm@gmail.com>
CC: Aurelien Jarno <aurelien@aurel32.net>
---
 hw/sh4/shix.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c
index 50ee36a..4add230 100644
--- a/hw/sh4/shix.c
+++ b/hw/sh4/shix.c
@@ -45,7 +45,6 @@
 
 static void shix_init(MachineState *machine)
 {
-    const char *cpu_model = machine->cpu_model;
     int ret;
     SuperHCPU *cpu;
     struct SH7750State *s;
@@ -53,10 +52,7 @@ static void shix_init(MachineState *machine)
     MemoryRegion *rom = g_new(MemoryRegion, 1);
     MemoryRegion *sdram = g_new(MemoryRegion, 2);
     
-    if (!cpu_model)
-        cpu_model = "any";
-
-    cpu = SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));
+    cpu = SUPERH_CPU(cpu_create(machine->cpu_type));
 
     /* Allocate memory space */
     memory_region_init_ram(rom, NULL, "shix.rom", 0x4000, &error_fatal);
@@ -89,6 +85,7 @@ static void shix_machine_init(MachineClass *mc)
     mc->desc = "shix card";
     mc->init = shix_init;
     mc->is_default = 1;
+    mc->default_cpu_type = TYPE_SH7750R_CPU;
 }
 
 DEFINE_MACHINE("shix", shix_machine_init)
-- 
2.7.4

Re: [Qemu-devel] [PATCH v2 20/40] sh4: shix: use generic cpu_model parsing

[Philippe Mathieu-Daudé]

On 10/05/2017 10:50 AM, Igor Mammedov wrote:
> default cpu model 'any' resolves to type TYPE_SH7750R_CPU
> in superh_cpu_class_by_name(), so use it directly.
> 
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
> v2:
>   - Explain in commit message why default cpu model 'any' is
>     replaced by TYPE_SH7750R_CPU (Philippe Mathieu-Daudé)
> 
> CC: Magnus Damm <magnus.damm@gmail.com>
> CC: Aurelien Jarno <aurelien@aurel32.net>
> ---
>  hw/sh4/shix.c | 7 ++-----
>  1 file changed, 2 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c
> index 50ee36a..4add230 100644
> --- a/hw/sh4/shix.c
> +++ b/hw/sh4/shix.c
> @@ -45,7 +45,6 @@
>  
>  static void shix_init(MachineState *machine)
>  {
> -    const char *cpu_model = machine->cpu_model;
>      int ret;
>      SuperHCPU *cpu;
>      struct SH7750State *s;
> @@ -53,10 +52,7 @@ static void shix_init(MachineState *machine)
>      MemoryRegion *rom = g_new(MemoryRegion, 1);
>      MemoryRegion *sdram = g_new(MemoryRegion, 2);
>      
> -    if (!cpu_model)
> -        cpu_model = "any";
> -
> -    cpu = SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));
> +    cpu = SUPERH_CPU(cpu_create(machine->cpu_type));
>  
>      /* Allocate memory space */
>      memory_region_init_ram(rom, NULL, "shix.rom", 0x4000, &error_fatal);
> @@ -89,6 +85,7 @@ static void shix_machine_init(MachineClass *mc)
>      mc->desc = "shix card";
>      mc->init = shix_init;
>      mc->is_default = 1;
> +    mc->default_cpu_type = TYPE_SH7750R_CPU;
>  }
>  
>  DEFINE_MACHINE("shix", shix_machine_init)
> 

[Qemu-devel] [PATCH v2 21/40] sh4: cleanup cpu type name composition

[Igor Mammedov]

introduce SUPERH_CPU_TYPE_NAME macro and use it to construct
cpu type names. While at it move cpu type_infos into one
array and register it directly with type_init_from_array()
instead of custom superh_cpu_register_types()

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2:  rename type_init_from_array into DEFINE_TYPES

CC: aurelien@aurel32.net
---
 target/sh4/cpu-qom.h |  6 ++---
 target/sh4/cpu.h     |  3 +++
 target/sh4/cpu.c     | 63 +++++++++++++++++++++-------------------------------
 3 files changed, 31 insertions(+), 41 deletions(-)

diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h
index 01abb20..17deeb6 100644
--- a/target/sh4/cpu-qom.h
+++ b/target/sh4/cpu-qom.h
@@ -24,9 +24,9 @@
 
 #define TYPE_SUPERH_CPU "superh-cpu"
 
-#define TYPE_SH7750R_CPU "sh7750r-" TYPE_SUPERH_CPU
-#define TYPE_SH7751R_CPU "sh7751r-" TYPE_SUPERH_CPU
-#define TYPE_SH7785_CPU "sh7785-" TYPE_SUPERH_CPU
+#define TYPE_SH7750R_CPU SUPERH_CPU_TYPE_NAME("sh7750r")
+#define TYPE_SH7751R_CPU SUPERH_CPU_TYPE_NAME("sh7751r")
+#define TYPE_SH7785_CPU  SUPERH_CPU_TYPE_NAME("sh7785")
 
 #define SUPERH_CPU_CLASS(klass) \
     OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU)
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 79f85d3..a25a3f6 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -270,6 +270,9 @@ void cpu_load_tlb(CPUSH4State * env);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_SUPERH_CPU, cpu_model)
 
+#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
+#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
+
 #define cpu_signal_handler cpu_sh4_signal_handler
 #define cpu_list sh4_cpu_list
 
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 252440e..72f1dec 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -172,13 +172,6 @@ static void sh7750r_class_init(ObjectClass *oc, void *data)
     scc->cvr = 0x00110000;
 }
 
-static const TypeInfo sh7750r_type_info = {
-    .name = TYPE_SH7750R_CPU,
-    .parent = TYPE_SUPERH_CPU,
-    .class_init = sh7750r_class_init,
-    .instance_init = sh7750r_cpu_initfn,
-};
-
 static void sh7751r_cpu_initfn(Object *obj)
 {
     SuperHCPU *cpu = SUPERH_CPU(obj);
@@ -198,13 +191,6 @@ static void sh7751r_class_init(ObjectClass *oc, void *data)
     scc->cvr = 0x00110000; /* Neutered caches, should be 0x20480000 */
 }
 
-static const TypeInfo sh7751r_type_info = {
-    .name = TYPE_SH7751R_CPU,
-    .parent = TYPE_SUPERH_CPU,
-    .class_init = sh7751r_class_init,
-    .instance_init = sh7751r_cpu_initfn,
-};
-
 static void sh7785_cpu_initfn(Object *obj)
 {
     SuperHCPU *cpu = SUPERH_CPU(obj);
@@ -224,13 +210,6 @@ static void sh7785_class_init(ObjectClass *oc, void *data)
     scc->cvr = 0x71440211;
 }
 
-static const TypeInfo sh7785_type_info = {
-    .name = TYPE_SH7785_CPU,
-    .parent = TYPE_SUPERH_CPU,
-    .class_init = sh7785_class_init,
-    .instance_init = sh7785_cpu_initfn,
-};
-
 static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
 {
     CPUState *cs = CPU(dev);
@@ -303,22 +282,30 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
     dc->vmsd = &vmstate_sh_cpu;
 }
 
-static const TypeInfo superh_cpu_type_info = {
-    .name = TYPE_SUPERH_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(SuperHCPU),
-    .instance_init = superh_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(SuperHCPUClass),
-    .class_init = superh_cpu_class_init,
-};
+#define DEFINE_SUPERH_CPU_TYPE(type_name, cinit, initfn) \
+    {                                                    \
+        .name = type_name,                               \
+        .parent = TYPE_SUPERH_CPU,                       \
+        .class_init = cinit,                             \
+        .instance_init = initfn,                         \
+    }
+static const TypeInfo superh_cpu_type_infos[] = {
+    {
+        .name = TYPE_SUPERH_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(SuperHCPU),
+        .instance_init = superh_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(SuperHCPUClass),
+        .class_init = superh_cpu_class_init,
+    },
+    DEFINE_SUPERH_CPU_TYPE(TYPE_SH7750R_CPU, sh7750r_class_init,
+                           sh7750r_cpu_initfn),
+    DEFINE_SUPERH_CPU_TYPE(TYPE_SH7751R_CPU, sh7751r_class_init,
+                           sh7751r_cpu_initfn),
+    DEFINE_SUPERH_CPU_TYPE(TYPE_SH7785_CPU, sh7785_class_init,
+                           sh7785_cpu_initfn),
 
-static void superh_cpu_register_types(void)
-{
-    type_register_static(&superh_cpu_type_info);
-    type_register_static(&sh7750r_type_info);
-    type_register_static(&sh7751r_type_info);
-    type_register_static(&sh7785_type_info);
-}
+};
 
-type_init(superh_cpu_register_types)
+DEFINE_TYPES(superh_cpu_type_infos)
-- 
2.7.4

[Qemu-devel] [PATCH v2 22/40] sh4: simplify superh_cpu_class_by_name()

[Igor Mammedov]

currently for sh4 cpu_model argument for '-cpu' option
could be either 'cpu model' name or cpu_typename.

however typically '-cpu' takes 'cpu model' name and
cpu type for sh4 target isn't advertised publicly
('-cpu help' prints only 'cpu model' names) so we
shouldn't care about this use case (it's more of a bug).

1. Drop '-cpu cpu_typename' to align with the rest of
   targets.
2. Compose searched for typename from cpu model and use
   it with object_class_by_name() directly instead of
   over-complicated
       object_class_get_list()
       g_slist_find_custom() + superh_cpu_name_compare()

With #1 droped, #2 could be used for both lookups which
simplifies superh_cpu_class_by_name() quite a bit.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2:
  - there is no need to NULL-initialize 'oc' in superh_cpu_class_by_name()
    also drop extra ';' (Philippe Mathieu-Daudé)

CC: aurelien@aurel32.net
---
 target/sh4/cpu.c | 34 ++++++++++++----------------------
 1 file changed, 12 insertions(+), 22 deletions(-)

diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 72f1dec..e715560 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -120,36 +120,26 @@ void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
     g_slist_free(list);
 }
 
-static gint superh_cpu_name_compare(gconstpointer a, gconstpointer b)
-{
-    const SuperHCPUClass *scc = SUPERH_CPU_CLASS(a);
-    const char *name = b;
-
-    return strcasecmp(scc->name, name);
-}
-
 static ObjectClass *superh_cpu_class_by_name(const char *cpu_model)
 {
     ObjectClass *oc;
-    GSList *list, *item;
+    char *s, *typename = NULL;
 
-    if (strcasecmp(cpu_model, "any") == 0) {
-        return object_class_by_name(TYPE_SH7750R_CPU);
+    s = g_ascii_strdown(cpu_model, -1);
+    if (strcmp(s, "any") == 0) {
+        oc = object_class_by_name(TYPE_SH7750R_CPU);
+        goto out;
     }
 
-    oc = object_class_by_name(cpu_model);
-    if (oc != NULL && object_class_dynamic_cast(oc, TYPE_SUPERH_CPU) != NULL
-        && !object_class_is_abstract(oc)) {
-        return oc;
+    typename = g_strdup_printf(SUPERH_CPU_TYPE_NAME("%s"), s);
+    oc = object_class_by_name(typename);
+    if (oc != NULL && object_class_is_abstract(oc)) {
+        oc = NULL;
     }
 
-    oc = NULL;
-    list = object_class_get_list(TYPE_SUPERH_CPU, false);
-    item = g_slist_find_custom(list, cpu_model, superh_cpu_name_compare);
-    if (item != NULL) {
-        oc = item->data;
-    }
-    g_slist_free(list);
+out:
+    g_free(s);
+    g_free(typename);
     return oc;
 }
 
-- 
2.7.4

Re: [Qemu-devel] [PATCH v2 22/40] sh4: simplify superh_cpu_class_by_name()

[Philippe Mathieu-Daudé]

On 10/05/2017 10:50 AM, Igor Mammedov wrote:
> currently for sh4 cpu_model argument for '-cpu' option
> could be either 'cpu model' name or cpu_typename.
> 
> however typically '-cpu' takes 'cpu model' name and
> cpu type for sh4 target isn't advertised publicly
> ('-cpu help' prints only 'cpu model' names) so we
> shouldn't care about this use case (it's more of a bug).
> 
> 1. Drop '-cpu cpu_typename' to align with the rest of
>    targets.
> 2. Compose searched for typename from cpu model and use
>    it with object_class_by_name() directly instead of
>    over-complicated
>        object_class_get_list()
>        g_slist_find_custom() + superh_cpu_name_compare()
> 
> With #1 droped, #2 could be used for both lookups which
> simplifies superh_cpu_class_by_name() quite a bit.
> 
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
> v2:
>   - there is no need to NULL-initialize 'oc' in superh_cpu_class_by_name()
>     also drop extra ';' (Philippe Mathieu-Daudé)
> 
> CC: aurelien@aurel32.net
> ---
>  target/sh4/cpu.c | 34 ++++++++++++----------------------
>  1 file changed, 12 insertions(+), 22 deletions(-)
> 
> diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
> index 72f1dec..e715560 100644
> --- a/target/sh4/cpu.c
> +++ b/target/sh4/cpu.c
> @@ -120,36 +120,26 @@ void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
>      g_slist_free(list);
>  }
>  
> -static gint superh_cpu_name_compare(gconstpointer a, gconstpointer b)
> -{
> -    const SuperHCPUClass *scc = SUPERH_CPU_CLASS(a);
> -    const char *name = b;
> -
> -    return strcasecmp(scc->name, name);
> -}
> -
>  static ObjectClass *superh_cpu_class_by_name(const char *cpu_model)
>  {
>      ObjectClass *oc;
> -    GSList *list, *item;
> +    char *s, *typename = NULL;
>  
> -    if (strcasecmp(cpu_model, "any") == 0) {
> -        return object_class_by_name(TYPE_SH7750R_CPU);
> +    s = g_ascii_strdown(cpu_model, -1);
> +    if (strcmp(s, "any") == 0) {
> +        oc = object_class_by_name(TYPE_SH7750R_CPU);
> +        goto out;
>      }
>  
> -    oc = object_class_by_name(cpu_model);
> -    if (oc != NULL && object_class_dynamic_cast(oc, TYPE_SUPERH_CPU) != NULL
> -        && !object_class_is_abstract(oc)) {
> -        return oc;
> +    typename = g_strdup_printf(SUPERH_CPU_TYPE_NAME("%s"), s);
> +    oc = object_class_by_name(typename);
> +    if (oc != NULL && object_class_is_abstract(oc)) {
> +        oc = NULL;
>      }
>  
> -    oc = NULL;
> -    list = object_class_get_list(TYPE_SUPERH_CPU, false);
> -    item = g_slist_find_custom(list, cpu_model, superh_cpu_name_compare);
> -    if (item != NULL) {
> -        oc = item->data;
> -    }
> -    g_slist_free(list);
> +out:
> +    g_free(s);
> +    g_free(typename);
>      return oc;
>  }
>  
> 

[Qemu-devel] [PATCH 22/40] fixup: sh4: simplify superh_cpu_class_by_name()

[Igor Mammedov]

with "sh4: simplify superh_cpu_class_by_name()"
no longer accepts type names as cpu_model but linux-useri/main.c
still uses type name as default, fix it up and use
cpu_model instead

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
CC: Philippe Mathieu-Daudé <f4bug@amsat.org>
CC: Eduardo Habkost <ehabkost@redhat.com>
CC: aurelien@aurel32.net
---
 linux-user/main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/linux-user/main.c b/linux-user/main.c
index 829f974..d3fde19 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -4312,7 +4312,7 @@ int main(int argc, char **argv, char **envp)
         cpu_model = "750";
 # endif
 #elif defined TARGET_SH4
-        cpu_model = TYPE_SH7785_CPU;
+        cpu_model = "sh7785";
 #elif defined TARGET_S390X
         cpu_model = "qemu";
 #else
-- 
2.7.4

[Qemu-devel] [PATCH v2 23/40] sh4: remove SuperHCPUClass::name field

[Igor Mammedov]

the field contains upper-cased cpu model name and is used
for printing supported cpu model names for '-cpu help'.

Considering that cpu model lookup in superh_cpu_class_by_name()
is case-insensitive, we can drop upper-casing when
printing supported cpus list and use cpu type directly
to do the same by cutting out SUPERH_CPU_TYPE_SUFFIX from
typename.

It allows to remove SuperHCPUClass::name, which practically
duplicates names defined by TYPE_SH*_CPU definitions and
simplify sh*_class_init()/SuperHCPUClass a bit.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: aurelien@aurel32.net
---
 target/sh4/cpu-qom.h |  2 --
 target/sh4/cpu.c     | 10 +++-------
 2 files changed, 3 insertions(+), 9 deletions(-)

diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h
index 17deeb6..0f9fb4d 100644
--- a/target/sh4/cpu-qom.h
+++ b/target/sh4/cpu-qom.h
@@ -39,7 +39,6 @@
  * SuperHCPUClass:
  * @parent_realize: The parent class' realize handler.
  * @parent_reset: The parent class' reset handler.
- * @name: The name.
  * @pvr: Processor Version Register
  * @prr: Processor Revision Register
  * @cvr: Cache Version Register
@@ -54,7 +53,6 @@ typedef struct SuperHCPUClass {
     DeviceRealize parent_realize;
     void (*parent_reset)(CPUState *cpu);
 
-    const char *name;
     uint32_t pvr;
     uint32_t prr;
     uint32_t cvr;
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index e715560..9006645 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -98,12 +98,11 @@ static gint superh_cpu_list_compare(gconstpointer a, gconstpointer b)
 
 static void superh_cpu_list_entry(gpointer data, gpointer user_data)
 {
-    ObjectClass *oc = data;
-    SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
     SuperHCPUListState *s = user_data;
+    const char *typename = object_class_get_name(OBJECT_CLASS(data));
+    int len = strlen(typename) - strlen(SUPERH_CPU_TYPE_SUFFIX);
 
-    (*s->cpu_fprintf)(s->file, "%s\n",
-                      scc->name);
+    (*s->cpu_fprintf)(s->file, "%.*s\n", len, typename);
 }
 
 void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
@@ -156,7 +155,6 @@ static void sh7750r_class_init(ObjectClass *oc, void *data)
 {
     SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
 
-    scc->name = "SH7750R";
     scc->pvr = 0x00050000;
     scc->prr = 0x00000100;
     scc->cvr = 0x00110000;
@@ -175,7 +173,6 @@ static void sh7751r_class_init(ObjectClass *oc, void *data)
 {
     SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
 
-    scc->name = "SH7751R";
     scc->pvr = 0x04050005;
     scc->prr = 0x00000113;
     scc->cvr = 0x00110000; /* Neutered caches, should be 0x20480000 */
@@ -194,7 +191,6 @@ static void sh7785_class_init(ObjectClass *oc, void *data)
 {
     SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
 
-    scc->name = "SH7785";
     scc->pvr = 0x10300700;
     scc->prr = 0x00000200;
     scc->cvr = 0x71440211;
-- 
2.7.4

[Qemu-devel] [PATCH v2 24/40] xtensa: cleanup cpu type name composition

[Igor Mammedov]

use new XTENSA_CPU_TYPE_NAME to compose CPU type name
to bring xtensa in line with all other targets that
will similar macro.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: jcmvbkbc@gmail.com
---
 target/xtensa/cpu.h    | 4 ++++
 target/xtensa/cpu.c    | 2 +-
 target/xtensa/helper.c | 2 +-
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 4803331..b17d7d9 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -469,11 +469,15 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
 #define cpu_signal_handler cpu_xtensa_signal_handler
 #define cpu_list xtensa_cpu_list
 
+#define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
+#define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
+
 #ifdef TARGET_WORDS_BIGENDIAN
 #define XTENSA_DEFAULT_CPU_MODEL "fsf"
 #else
 #define XTENSA_DEFAULT_CPU_MODEL "dc232b"
 #endif
+#define XTENSA_DEFAULT_CPU_TYPE XTENSA_CPU_TYPE_NAME(XTENSA_DEFAULT_CPU_MODEL)
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_XTENSA_CPU, cpu_model)
 
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index dcdc765..b5f7079 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -83,7 +83,7 @@ static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_XTENSA_CPU, cpu_model);
+    typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU) ||
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index e8fba20..216f198 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -76,7 +76,7 @@ void xtensa_register_core(XtensaConfigList *node)
 
     node->next = xtensa_cores;
     xtensa_cores = node;
-    type.name = g_strdup_printf("%s-" TYPE_XTENSA_CPU, node->config->name);
+    type.name = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), node->config->name);
     type_register(&type);
     g_free((gpointer)type.name);
 }
-- 
2.7.4

[Qemu-devel] [PATCH v2 25/40] xtensa: sim: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: jcmvbkbc@gmail.com
---
 hw/xtensa/sim.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
index b3580b1..2bb883b 100644
--- a/hw/xtensa/sim.c
+++ b/hw/xtensa/sim.c
@@ -75,16 +75,11 @@ static void xtensa_sim_init(MachineState *machine)
     XtensaCPU *cpu = NULL;
     CPUXtensaState *env = NULL;
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     int n;
 
-    if (!cpu_model) {
-        cpu_model = XTENSA_DEFAULT_CPU_MODEL;
-    }
-
     for (n = 0; n < smp_cpus; n++) {
-        cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));
+        cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
         env = &cpu->env;
 
         env->sregs[PRID] = n;
@@ -133,6 +128,7 @@ static void xtensa_sim_machine_init(MachineClass *mc)
     mc->init = xtensa_sim_init;
     mc->max_cpus = 4;
     mc->no_serial = 1;
+    mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
 }
 
 DEFINE_MACHINE("sim", xtensa_sim_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 26/40] xtensa: lx60/lx200/ml605/kc705: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: jcmvbkbc@gmail.com
---
 hw/xtensa/xtfpga.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index a19cceb..1971ecf 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -220,19 +220,14 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine)
     DriveInfo *dinfo;
     pflash_t *flash = NULL;
     QemuOpts *machine_opts = qemu_get_machine_opts();
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = qemu_opt_get(machine_opts, "kernel");
     const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");
     const char *dtb_filename = qemu_opt_get(machine_opts, "dtb");
     const char *initrd_filename = qemu_opt_get(machine_opts, "initrd");
     int n;
 
-    if (!cpu_model) {
-        cpu_model = XTENSA_DEFAULT_CPU_MODEL;
-    }
-
     for (n = 0; n < smp_cpus; n++) {
-        cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));
+        cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
         env = &cpu->env;
 
         env->sregs[PRID] = n;
@@ -454,6 +449,7 @@ static void xtensa_lx60_class_init(ObjectClass *oc, void *data)
     mc->desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
     mc->init = xtensa_lx60_init;
     mc->max_cpus = 4;
+    mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
 }
 
 static const TypeInfo xtensa_lx60_type = {
@@ -469,6 +465,7 @@ static void xtensa_lx200_class_init(ObjectClass *oc, void *data)
     mc->desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
     mc->init = xtensa_lx200_init;
     mc->max_cpus = 4;
+    mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
 }
 
 static const TypeInfo xtensa_lx200_type = {
@@ -484,6 +481,7 @@ static void xtensa_ml605_class_init(ObjectClass *oc, void *data)
     mc->desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
     mc->init = xtensa_ml605_init;
     mc->max_cpus = 4;
+    mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
 }
 
 static const TypeInfo xtensa_ml605_type = {
@@ -499,6 +497,7 @@ static void xtensa_kc705_class_init(ObjectClass *oc, void *data)
     mc->desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
     mc->init = xtensa_kc705_init;
     mc->max_cpus = 4;
+    mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
 }
 
 static const TypeInfo xtensa_kc705_type = {
-- 
2.7.4

[Qemu-devel] [PATCH v2 27/40] unicore32: cleanup cpu type name composition

[Igor Mammedov]

use new UNICORE32_CPU_TYPE_NAME to compose CPU type
name and get rid of intermediate
   UniCore32CPUInfo/uc32_cpu_register_types()
which is replaced by static TypeInfo array and
type_init_from_array()

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2:  rename type_init_from_array into DEFINE_TYPES

CC: gxt@mprc.pku.edu.cn
---
 target/unicore32/cpu.h |  3 +++
 target/unicore32/cpu.c | 61 +++++++++++++++++---------------------------------
 2 files changed, 23 insertions(+), 41 deletions(-)

diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h
index 7724108..3dc6fbc 100644
--- a/target/unicore32/cpu.h
+++ b/target/unicore32/cpu.h
@@ -167,6 +167,9 @@ static inline int cpu_mmu_index(CPUUniCore32State *env, bool ifetch)
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model)
 
+#define UNICORE32_CPU_TYPE_SUFFIX "-" TYPE_UNICORE32_CPU
+#define UNICORE32_CPU_TYPE_NAME(model) model UNICORE32_CPU_TYPE_SUFFIX
+
 static inline void cpu_get_tb_cpu_state(CPUUniCore32State *env, target_ulong *pc,
                                         target_ulong *cs_base, uint32_t *flags)
 {
diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c
index 138acc9..242ecca 100644
--- a/target/unicore32/cpu.c
+++ b/target/unicore32/cpu.c
@@ -44,7 +44,7 @@ static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_UNICORE32_CPU, cpu_model);
+    typename = g_strdup_printf(UNICORE32_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_UNICORE32_CPU) ||
@@ -54,11 +54,6 @@ static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model)
     return oc;
 }
 
-typedef struct UniCore32CPUInfo {
-    const char *name;
-    void (*instance_init)(Object *obj);
-} UniCore32CPUInfo;
-
 static void unicore_ii_cpu_initfn(Object *obj)
 {
     UniCore32CPU *cpu = UNICORE32_CPU(obj);
@@ -90,11 +85,6 @@ static void uc32_any_cpu_initfn(Object *obj)
     set_snan_bit_is_one(1, &env->ucf64.fp_status);
 }
 
-static const UniCore32CPUInfo uc32_cpus[] = {
-    { .name = "UniCore-II", .instance_init = unicore_ii_cpu_initfn },
-    { .name = "any",        .instance_init = uc32_any_cpu_initfn },
-};
-
 static void uc32_cpu_realizefn(DeviceState *dev, Error **errp)
 {
     CPUState *cs = CPU(dev);
@@ -165,36 +155,25 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data)
     dc->vmsd = &vmstate_uc32_cpu;
 }
 
-static void uc32_register_cpu_type(const UniCore32CPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_UNICORE32_CPU,
-        .instance_init = info->instance_init,
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_UNICORE32_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
+#define DEFINE_UNICORE32_CPU_TYPE(cpu_model, initfn) \
+    {                                                \
+        .parent = TYPE_UNICORE32_CPU,                \
+        .instance_init = initfn,                     \
+        .name = UNICORE32_CPU_TYPE_NAME(cpu_model),  \
+    }
 
-static const TypeInfo uc32_cpu_type_info = {
-    .name = TYPE_UNICORE32_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(UniCore32CPU),
-    .instance_init = uc32_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(UniCore32CPUClass),
-    .class_init = uc32_cpu_class_init,
+static const TypeInfo uc32_cpu_type_infos[] = {
+    {
+        .name = TYPE_UNICORE32_CPU,
+        .parent = TYPE_CPU,
+        .instance_size = sizeof(UniCore32CPU),
+        .instance_init = uc32_cpu_initfn,
+        .abstract = true,
+        .class_size = sizeof(UniCore32CPUClass),
+        .class_init = uc32_cpu_class_init,
+    },
+    DEFINE_UNICORE32_CPU_TYPE("UniCore-II", unicore_ii_cpu_initfn),
+    DEFINE_UNICORE32_CPU_TYPE("any", uc32_any_cpu_initfn),
 };
 
-static void uc32_cpu_register_types(void)
-{
-    int i;
-
-    type_register_static(&uc32_cpu_type_info);
-    for (i = 0; i < ARRAY_SIZE(uc32_cpus); i++) {
-        uc32_register_cpu_type(&uc32_cpus[i]);
-    }
-}
-
-type_init(uc32_cpu_register_types)
+DEFINE_TYPES(uc32_cpu_type_infos)
-- 
2.7.4

[Qemu-devel] [PATCH v2 28/40] unicore32: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: Guan Xuetao <gxt@mprc.pku.edu.cn>
---
 hw/unicore32/puv3.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c
index 504ea46..1b39cc0 100644
--- a/hw/unicore32/puv3.c
+++ b/hw/unicore32/puv3.c
@@ -112,7 +112,6 @@ static void puv3_load_kernel(const char *kernel_filename)
 static void puv3_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     const char *initrd_filename = machine->initrd_filename;
     CPUUniCore32State *env;
@@ -123,11 +122,7 @@ static void puv3_init(MachineState *machine)
         exit(1);
     }
 
-    if (!cpu_model) {
-        cpu_model = "UniCore-II";
-    }
-
-    cpu = UNICORE32_CPU(cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model));
+    cpu = UNICORE32_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
 
     puv3_soc_init(env);
@@ -140,6 +135,7 @@ static void puv3_machine_init(MachineClass *mc)
     mc->desc = "PKUnity Version-3 based on UniCore32";
     mc->init = puv3_init;
     mc->is_default = 1;
+    mc->default_cpu_type = UNICORE32_CPU_TYPE_NAME("UniCore-II");
 }
 
 DEFINE_MACHINE("puv3", puv3_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 29/40] tricore: cleanup cpu type name composition

[Igor Mammedov]

introduce TRICORE_CPU_TYPE_NAME macro and use it to construct
cpu type names. While at it move cpu type_infos into one
array and register it directly with type_init_from_array()
instead of custom tricore_cpu_register_types()/cpu_register()

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2:  rename type_init_from_array into DEFINE_TYPES

CC: kbastian@mail.uni-paderborn.de
---
 target/tricore/cpu.h |  2 ++
 target/tricore/cpu.c | 68 ++++++++++++++++------------------------------------
 2 files changed, 22 insertions(+), 48 deletions(-)

diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index bc53c40..f41d2ce 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -413,6 +413,8 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, target_ulong *pc,
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_TRICORE_CPU, cpu_model)
 
+#define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU
+#define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX
 
 /* helpers.c */
 int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address,
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index 871eb35..ed94dee 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -120,7 +120,7 @@ static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc;
     char *typename;
 
-    typename = g_strdup_printf("%s-" TYPE_TRICORE_CPU, cpu_model);
+    typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
     if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) ||
@@ -151,19 +151,6 @@ static void tc27x_initfn(Object *obj)
     set_feature(&cpu->env, TRICORE_FEATURE_161);
 }
 
-typedef struct TriCoreCPUInfo {
-    const char *name;
-    void (*initfn)(Object *obj);
-    void (*class_init)(ObjectClass *oc, void *data);
-} TriCoreCPUInfo;
-
-static const TriCoreCPUInfo tricore_cpus[] = {
-    { .name = "tc1796",      .initfn = tc1796_initfn },
-    { .name = "tc1797",      .initfn = tc1797_initfn },
-    { .name = "tc27x",       .initfn = tc27x_initfn },
-    { .name = NULL }
-};
-
 static void tricore_cpu_class_init(ObjectClass *c, void *data)
 {
     TriCoreCPUClass *mcc = TRICORE_CPU_CLASS(c);
@@ -184,41 +171,26 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data)
     cc->get_phys_page_attrs_debug = tricore_cpu_get_phys_page_attrs_debug;
 }
 
-static void cpu_register(const TriCoreCPUInfo *info)
-{
-    TypeInfo type_info = {
-        .parent = TYPE_TRICORE_CPU,
+#define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \
+    {                                              \
+        .parent = TYPE_TRICORE_CPU,                \
+        .instance_init = initfn,                   \
+        .name = TRICORE_CPU_TYPE_NAME(cpu_model),  \
+    }
+
+static const TypeInfo tricore_cpu_type_infos[] = {
+    {
+        .name = TYPE_TRICORE_CPU,
+        .parent = TYPE_CPU,
         .instance_size = sizeof(TriCoreCPU),
-        .instance_init = info->initfn,
+        .instance_init = tricore_cpu_initfn,
+        .abstract = true,
         .class_size = sizeof(TriCoreCPUClass),
-        .class_init = info->class_init,
-    };
-
-    type_info.name = g_strdup_printf("%s-" TYPE_TRICORE_CPU, info->name);
-    type_register(&type_info);
-    g_free((void *)type_info.name);
-}
-
-static const TypeInfo tricore_cpu_type_info = {
-    .name = TYPE_TRICORE_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(TriCoreCPU),
-    .instance_init = tricore_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(TriCoreCPUClass),
-    .class_init = tricore_cpu_class_init,
+        .class_init = tricore_cpu_class_init,
+    },
+    DEFINE_TRICORE_CPU_TYPE("tc1796", tc1796_initfn),
+    DEFINE_TRICORE_CPU_TYPE("tc1797", tc1797_initfn),
+    DEFINE_TRICORE_CPU_TYPE("tc27x", tc27x_initfn),
 };
 
-static void tricore_cpu_register_types(void)
-{
-    const TriCoreCPUInfo *info = tricore_cpus;
-
-    type_register_static(&tricore_cpu_type_info);
-
-    while (info->name) {
-        cpu_register(info);
-        info++;
-    }
-}
-
-type_init(tricore_cpu_register_types)
+DEFINE_TYPES(tricore_cpu_type_infos)
-- 
2.7.4

[Qemu-devel] [PATCH v2 30/40] tricore: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
---
 hw/tricore/tricore_testboard.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c
index 0486f8a..ac75eb2 100644
--- a/hw/tricore/tricore_testboard.c
+++ b/hw/tricore/tricore_testboard.c
@@ -71,10 +71,7 @@ static void tricore_testboard_init(MachineState *machine, int board_id)
     MemoryRegion *pcp_data = g_new(MemoryRegion, 1);
     MemoryRegion *pcp_text = g_new(MemoryRegion, 1);
 
-    if (!machine->cpu_model) {
-        machine->cpu_model = "tc1796";
-    }
-    cpu = TRICORE_CPU(cpu_generic_init(TYPE_TRICORE_CPU, machine->cpu_model));
+    cpu = TRICORE_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
     memory_region_init_ram(ext_cram, NULL, "powerlink_ext_c.ram",
                            2 * 1024 * 1024, &error_fatal);
@@ -114,6 +111,7 @@ static void ttb_machine_init(MachineClass *mc)
     mc->desc = "a minimal TriCore board";
     mc->init = tricoreboard_init;
     mc->is_default = 0;
+    mc->default_cpu_type = TRICORE_CPU_TYPE_NAME("tc1796");
 }
 
 DEFINE_MACHINE("tricore_testboard", ttb_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 31/40] sparc: cleanup cpu type name composition

[Igor Mammedov]

introduce SPARC_CPU_TYPE_NAME macro and use it to
construct cpu type names.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
macro will also be used in follow up patches to define
default cpu types per board
---
 target/sparc/cpu.h | 3 +++
 target/sparc/cpu.c | 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 1598f65..7aa45c9 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -658,6 +658,9 @@ int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_SPARC_CPU, cpu_model)
 #endif
 
+#define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
+#define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
+
 #define cpu_signal_handler cpu_sparc_signal_handler
 #define cpu_list sparc_cpu_list
 
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index beab90f..f09ba50 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -712,7 +712,7 @@ static bool sparc_cpu_has_work(CPUState *cs)
 
 static char *sparc_cpu_type_name(const char *cpu_model)
 {
-    char *name = g_strdup_printf("%s-" TYPE_SPARC_CPU, cpu_model);
+    char *name = g_strdup_printf(SPARC_CPU_TYPE_NAME("%s"), cpu_model);
     char *s = name;
 
     /* SPARC cpu model names happen to have whitespaces,
-- 
2.7.4

[Qemu-devel] [PATCH v2 32/40] sparc: sun4u/sun4v/niagara: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: mark.cave-ayland@ilande.co.uk
CC: atar4qemu@gmail.com
---
 include/hw/sparc/sparc64.h | 3 +--
 hw/sparc64/niagara.c       | 4 ++--
 hw/sparc64/sparc64.c       | 8 ++------
 hw/sparc64/sun4u.c         | 8 +++-----
 4 files changed, 8 insertions(+), 15 deletions(-)

diff --git a/include/hw/sparc/sparc64.h b/include/hw/sparc/sparc64.h
index 7748939..ca3bb4b 100644
--- a/include/hw/sparc/sparc64.h
+++ b/include/hw/sparc/sparc64.h
@@ -1,5 +1,4 @@
 
-SPARCCPU *sparc64_cpu_devinit(const char *cpu_model,
-                              const char *dflt_cpu_model, uint64_t prom_addr);
+SPARCCPU *sparc64_cpu_devinit(const char *cpu_type, uint64_t prom_addr);
 
 void sparc64_cpu_set_ivec_irq(void *opaque, int irq, int level);
diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c
index 9a8d610..7a72332 100644
--- a/hw/sparc64/niagara.c
+++ b/hw/sparc64/niagara.c
@@ -106,8 +106,7 @@ static void niagara_init(MachineState *machine)
     MemoryRegion *sysmem = get_system_memory();
 
     /* init CPUs */
-    sparc64_cpu_devinit(machine->cpu_model, "Sun UltraSparc T1",
-                        NIAGARA_PROM_BASE);
+    sparc64_cpu_devinit(machine->cpu_type, NIAGARA_PROM_BASE);
     /* set up devices */
     memory_region_allocate_system_memory(&s->hv_ram, NULL, "sun4v-hv.ram",
                                          NIAGARA_HV_RAM_SIZE);
@@ -174,6 +173,7 @@ static void niagara_class_init(ObjectClass *oc, void *data)
     mc->init = niagara_init;
     mc->max_cpus = 1; /* XXX for now */
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Sun-UltraSparc-T1");
 }
 
 static const TypeInfo niagara_type = {
diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c
index 097d529..9453e2c 100644
--- a/hw/sparc64/sparc64.c
+++ b/hw/sparc64/sparc64.c
@@ -339,8 +339,7 @@ void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit)
     }
 }
 
-SPARCCPU *sparc64_cpu_devinit(const char *cpu_model,
-                              const char *default_cpu_model, uint64_t prom_addr)
+SPARCCPU *sparc64_cpu_devinit(const char *cpu_type, uint64_t prom_addr)
 {
     SPARCCPU *cpu;
     CPUSPARCState *env;
@@ -350,10 +349,7 @@ SPARCCPU *sparc64_cpu_devinit(const char *cpu_model,
     uint32_t  stick_frequency = 100 * 1000000;
     uint32_t hstick_frequency = 100 * 1000000;
 
-    if (cpu_model == NULL) {
-        cpu_model = default_cpu_model;
-    }
-    cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
+    cpu = SPARC_CPU(cpu_create(cpu_type));
     env = &cpu->env;
 
     env->tick = cpu_timer_create("tick", cpu, tick_irq,
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index c3280aa..d53fad8 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -73,7 +73,6 @@
 #define IVEC_MAX             0x40
 
 struct hwdef {
-    const char * const default_cpu_model;
     uint16_t machine_id;
     uint64_t prom_addr;
     uint64_t console_serial_base;
@@ -439,8 +438,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
     int onboard_nic_idx;
 
     /* init CPUs */
-    cpu = sparc64_cpu_devinit(machine->cpu_model, hwdef->default_cpu_model,
-                              hwdef->prom_addr);
+    cpu = sparc64_cpu_devinit(machine->cpu_type, hwdef->prom_addr);
 
     /* set up devices */
     ram_init(0, machine->ram_size);
@@ -569,14 +567,12 @@ enum {
 static const struct hwdef hwdefs[] = {
     /* Sun4u generic PC-like machine */
     {
-        .default_cpu_model = "TI UltraSparc IIi",
         .machine_id = sun4u_id,
         .prom_addr = 0x1fff0000000ULL,
         .console_serial_base = 0,
     },
     /* Sun4v generic PC-like machine */
     {
-        .default_cpu_model = "Sun UltraSparc T1",
         .machine_id = sun4v_id,
         .prom_addr = 0x1fff0000000ULL,
         .console_serial_base = 0,
@@ -605,6 +601,7 @@ static void sun4u_class_init(ObjectClass *oc, void *data)
     mc->max_cpus = 1; /* XXX for now */
     mc->is_default = 1;
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-UltraSparc-IIi");
 }
 
 static const TypeInfo sun4u_type = {
@@ -622,6 +619,7 @@ static void sun4v_class_init(ObjectClass *oc, void *data)
     mc->block_default_type = IF_IDE;
     mc->max_cpus = 1; /* XXX for now */
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Sun-UltraSparc-T1");
 }
 
 static const TypeInfo sun4v_type = {
-- 
2.7.4

Re: [Qemu-devel] [PATCH v2 32/40] sparc: sun4u/sun4v/niagara: use generic cpu_model parsing

[Artyom Tarasenko]

On Thu, Oct 5, 2017 at 3:51 PM, Igor Mammedov <imammedo@redhat.com> wrote:
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>

> ---
> CC: mark.cave-ayland@ilande.co.uk
> CC: atar4qemu@gmail.com
> ---
>  include/hw/sparc/sparc64.h | 3 +--
>  hw/sparc64/niagara.c       | 4 ++--
>  hw/sparc64/sparc64.c       | 8 ++------
>  hw/sparc64/sun4u.c         | 8 +++-----
>  4 files changed, 8 insertions(+), 15 deletions(-)
>
> diff --git a/include/hw/sparc/sparc64.h b/include/hw/sparc/sparc64.h
> index 7748939..ca3bb4b 100644
> --- a/include/hw/sparc/sparc64.h
> +++ b/include/hw/sparc/sparc64.h
> @@ -1,5 +1,4 @@
>
> -SPARCCPU *sparc64_cpu_devinit(const char *cpu_model,
> -                              const char *dflt_cpu_model, uint64_t prom_addr);
> +SPARCCPU *sparc64_cpu_devinit(const char *cpu_type, uint64_t prom_addr);
>
>  void sparc64_cpu_set_ivec_irq(void *opaque, int irq, int level);
> diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c
> index 9a8d610..7a72332 100644
> --- a/hw/sparc64/niagara.c
> +++ b/hw/sparc64/niagara.c
> @@ -106,8 +106,7 @@ static void niagara_init(MachineState *machine)
>      MemoryRegion *sysmem = get_system_memory();
>
>      /* init CPUs */
> -    sparc64_cpu_devinit(machine->cpu_model, "Sun UltraSparc T1",
> -                        NIAGARA_PROM_BASE);
> +    sparc64_cpu_devinit(machine->cpu_type, NIAGARA_PROM_BASE);
>      /* set up devices */
>      memory_region_allocate_system_memory(&s->hv_ram, NULL, "sun4v-hv.ram",
>                                           NIAGARA_HV_RAM_SIZE);
> @@ -174,6 +173,7 @@ static void niagara_class_init(ObjectClass *oc, void *data)
>      mc->init = niagara_init;
>      mc->max_cpus = 1; /* XXX for now */
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Sun-UltraSparc-T1");
>  }
>
>  static const TypeInfo niagara_type = {
> diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c
> index 097d529..9453e2c 100644
> --- a/hw/sparc64/sparc64.c
> +++ b/hw/sparc64/sparc64.c
> @@ -339,8 +339,7 @@ void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit)
>      }
>  }
>
> -SPARCCPU *sparc64_cpu_devinit(const char *cpu_model,
> -                              const char *default_cpu_model, uint64_t prom_addr)
> +SPARCCPU *sparc64_cpu_devinit(const char *cpu_type, uint64_t prom_addr)
>  {
>      SPARCCPU *cpu;
>      CPUSPARCState *env;
> @@ -350,10 +349,7 @@ SPARCCPU *sparc64_cpu_devinit(const char *cpu_model,
>      uint32_t  stick_frequency = 100 * 1000000;
>      uint32_t hstick_frequency = 100 * 1000000;
>
> -    if (cpu_model == NULL) {
> -        cpu_model = default_cpu_model;
> -    }
> -    cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
> +    cpu = SPARC_CPU(cpu_create(cpu_type));
>      env = &cpu->env;
>
>      env->tick = cpu_timer_create("tick", cpu, tick_irq,
> diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
> index c3280aa..d53fad8 100644
> --- a/hw/sparc64/sun4u.c
> +++ b/hw/sparc64/sun4u.c
> @@ -73,7 +73,6 @@
>  #define IVEC_MAX             0x40
>
>  struct hwdef {
> -    const char * const default_cpu_model;
>      uint16_t machine_id;
>      uint64_t prom_addr;
>      uint64_t console_serial_base;
> @@ -439,8 +438,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
>      int onboard_nic_idx;
>
>      /* init CPUs */
> -    cpu = sparc64_cpu_devinit(machine->cpu_model, hwdef->default_cpu_model,
> -                              hwdef->prom_addr);
> +    cpu = sparc64_cpu_devinit(machine->cpu_type, hwdef->prom_addr);
>
>      /* set up devices */
>      ram_init(0, machine->ram_size);
> @@ -569,14 +567,12 @@ enum {
>  static const struct hwdef hwdefs[] = {
>      /* Sun4u generic PC-like machine */
>      {
> -        .default_cpu_model = "TI UltraSparc IIi",
>          .machine_id = sun4u_id,
>          .prom_addr = 0x1fff0000000ULL,
>          .console_serial_base = 0,
>      },
>      /* Sun4v generic PC-like machine */
>      {
> -        .default_cpu_model = "Sun UltraSparc T1",
>          .machine_id = sun4v_id,
>          .prom_addr = 0x1fff0000000ULL,
>          .console_serial_base = 0,
> @@ -605,6 +601,7 @@ static void sun4u_class_init(ObjectClass *oc, void *data)
>      mc->max_cpus = 1; /* XXX for now */
>      mc->is_default = 1;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-UltraSparc-IIi");
>  }
>
>  static const TypeInfo sun4u_type = {
> @@ -622,6 +619,7 @@ static void sun4v_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_IDE;
>      mc->max_cpus = 1; /* XXX for now */
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Sun-UltraSparc-T1");
>  }
>
>  static const TypeInfo sun4v_type = {
> --
> 2.7.4
>



-- 
Regards,
Artyom Tarasenko

SPARC and PPC PReP under qemu blog: http://tyom.blogspot.com/search/label/qemu

[Qemu-devel] [PATCH v2 33/40] sparc: sparc: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: mark.cave-ayland@ilande.co.uk
CC: atar4qemu@gmail.com
---
 hw/sparc/sun4m.c | 29 ++++++++++++-----------------
 1 file changed, 12 insertions(+), 17 deletions(-)

diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index e1bdd48..68b2378 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -94,7 +94,6 @@ struct sun4m_hwdef {
     } vsimm[MAX_VSIMMS];
     hwaddr ecc_base;
     uint64_t max_mem;
-    const char * const default_cpu_model;
     uint32_t ecc_version;
     uint32_t iommu_version;
     uint16_t machine_id;
@@ -790,14 +789,14 @@ static const TypeInfo ram_info = {
     .class_init    = ram_class_init,
 };
 
-static void cpu_devinit(const char *cpu_model, unsigned int id,
+static void cpu_devinit(const char *cpu_type, unsigned int id,
                         uint64_t prom_addr, qemu_irq **cpu_irqs)
 {
     CPUState *cs;
     SPARCCPU *cpu;
     CPUSPARCState *env;
 
-    cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
+    cpu = SPARC_CPU(cpu_create(cpu_type));
     env = &cpu->env;
 
     cpu_sparc_set_id(env, id);
@@ -820,7 +819,6 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
                           MachineState *machine)
 {
     DeviceState *slavio_intctl;
-    const char *cpu_model = machine->cpu_model;
     unsigned int i;
     void *iommu, *espdma, *ledma, *nvram;
     qemu_irq *cpu_irqs[MAX_CPUS], slavio_irq[32], slavio_cpu_irq[MAX_CPUS],
@@ -833,11 +831,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
     unsigned int num_vsimms;
 
     /* init CPUs */
-    if (!cpu_model)
-        cpu_model = hwdef->default_cpu_model;
-
     for(i = 0; i < smp_cpus; i++) {
-        cpu_devinit(cpu_model, i, hwdef->slavio_base, &cpu_irqs[i]);
+        cpu_devinit(machine->cpu_type, i, hwdef->slavio_base, &cpu_irqs[i]);
     }
 
     for (i = smp_cpus; i < MAX_CPUS; i++)
@@ -1074,7 +1069,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
         .machine_id = ss5_id,
         .iommu_version = 0x05000000,
         .max_mem = 0x10000000,
-        .default_cpu_model = "Fujitsu MB86904",
     },
     /* SS-10 */
     {
@@ -1100,7 +1094,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
         .machine_id = ss10_id,
         .iommu_version = 0x03000000,
         .max_mem = 0xf00000000ULL,
-        .default_cpu_model = "TI SuperSparc II",
     },
     /* SS-600MP */
     {
@@ -1124,7 +1117,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
         .machine_id = ss600mp_id,
         .iommu_version = 0x01000000,
         .max_mem = 0xf00000000ULL,
-        .default_cpu_model = "TI SuperSparc II",
     },
     /* SS-20 */
     {
@@ -1166,7 +1158,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
         .machine_id = ss20_id,
         .iommu_version = 0x13000000,
         .max_mem = 0xf00000000ULL,
-        .default_cpu_model = "TI SuperSparc II",
     },
     /* Voyager */
     {
@@ -1190,7 +1181,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
         .machine_id = vger_id,
         .iommu_version = 0x05000000,
         .max_mem = 0x10000000,
-        .default_cpu_model = "Fujitsu MB86904",
     },
     /* LX */
     {
@@ -1215,7 +1205,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
         .machine_id = lx_id,
         .iommu_version = 0x04000000,
         .max_mem = 0x10000000,
-        .default_cpu_model = "TI MicroSparc I",
     },
     /* SS-4 */
     {
@@ -1240,7 +1229,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
         .machine_id = ss4_id,
         .iommu_version = 0x05000000,
         .max_mem = 0x10000000,
-        .default_cpu_model = "Fujitsu MB86904",
     },
     /* SPARCClassic */
     {
@@ -1264,7 +1252,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
         .machine_id = scls_id,
         .iommu_version = 0x05000000,
         .max_mem = 0x10000000,
-        .default_cpu_model = "TI MicroSparc I",
     },
     /* SPARCbook */
     {
@@ -1288,7 +1275,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
         .machine_id = sbook_id,
         .iommu_version = 0x05000000,
         .max_mem = 0x10000000,
-        .default_cpu_model = "TI MicroSparc I",
     },
 };
 
@@ -1355,6 +1341,7 @@ static void ss5_class_init(ObjectClass *oc, void *data)
     mc->block_default_type = IF_SCSI;
     mc->is_default = 1;
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
 }
 
 static const TypeInfo ss5_type = {
@@ -1372,6 +1359,7 @@ static void ss10_class_init(ObjectClass *oc, void *data)
     mc->block_default_type = IF_SCSI;
     mc->max_cpus = 4;
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
 }
 
 static const TypeInfo ss10_type = {
@@ -1389,6 +1377,7 @@ static void ss600mp_class_init(ObjectClass *oc, void *data)
     mc->block_default_type = IF_SCSI;
     mc->max_cpus = 4;
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
 }
 
 static const TypeInfo ss600mp_type = {
@@ -1406,6 +1395,7 @@ static void ss20_class_init(ObjectClass *oc, void *data)
     mc->block_default_type = IF_SCSI;
     mc->max_cpus = 4;
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
 }
 
 static const TypeInfo ss20_type = {
@@ -1422,6 +1412,7 @@ static void voyager_class_init(ObjectClass *oc, void *data)
     mc->init = vger_init;
     mc->block_default_type = IF_SCSI;
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
 }
 
 static const TypeInfo voyager_type = {
@@ -1438,6 +1429,7 @@ static void ss_lx_class_init(ObjectClass *oc, void *data)
     mc->init = ss_lx_init;
     mc->block_default_type = IF_SCSI;
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
 }
 
 static const TypeInfo ss_lx_type = {
@@ -1454,6 +1446,7 @@ static void ss4_class_init(ObjectClass *oc, void *data)
     mc->init = ss4_init;
     mc->block_default_type = IF_SCSI;
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
 }
 
 static const TypeInfo ss4_type = {
@@ -1470,6 +1463,7 @@ static void scls_class_init(ObjectClass *oc, void *data)
     mc->init = scls_init;
     mc->block_default_type = IF_SCSI;
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
 }
 
 static const TypeInfo scls_type = {
@@ -1486,6 +1480,7 @@ static void sbook_class_init(ObjectClass *oc, void *data)
     mc->init = sbook_init;
     mc->block_default_type = IF_SCSI;
     mc->default_boot_order = "c";
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
 }
 
 static const TypeInfo sbook_type = {
-- 
2.7.4

Re: [Qemu-devel] [PATCH v2 33/40] sparc: sparc: use generic cpu_model parsing

[Artyom Tarasenko]

On Thu, Oct 5, 2017 at 3:51 PM, Igor Mammedov <imammedo@redhat.com> wrote:
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>

> ---
> CC: mark.cave-ayland@ilande.co.uk
> CC: atar4qemu@gmail.com
> ---
>  hw/sparc/sun4m.c | 29 ++++++++++++-----------------
>  1 file changed, 12 insertions(+), 17 deletions(-)
>
> diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
> index e1bdd48..68b2378 100644
> --- a/hw/sparc/sun4m.c
> +++ b/hw/sparc/sun4m.c
> @@ -94,7 +94,6 @@ struct sun4m_hwdef {
>      } vsimm[MAX_VSIMMS];
>      hwaddr ecc_base;
>      uint64_t max_mem;
> -    const char * const default_cpu_model;
>      uint32_t ecc_version;
>      uint32_t iommu_version;
>      uint16_t machine_id;
> @@ -790,14 +789,14 @@ static const TypeInfo ram_info = {
>      .class_init    = ram_class_init,
>  };
>
> -static void cpu_devinit(const char *cpu_model, unsigned int id,
> +static void cpu_devinit(const char *cpu_type, unsigned int id,
>                          uint64_t prom_addr, qemu_irq **cpu_irqs)
>  {
>      CPUState *cs;
>      SPARCCPU *cpu;
>      CPUSPARCState *env;
>
> -    cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
> +    cpu = SPARC_CPU(cpu_create(cpu_type));
>      env = &cpu->env;
>
>      cpu_sparc_set_id(env, id);
> @@ -820,7 +819,6 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
>                            MachineState *machine)
>  {
>      DeviceState *slavio_intctl;
> -    const char *cpu_model = machine->cpu_model;
>      unsigned int i;
>      void *iommu, *espdma, *ledma, *nvram;
>      qemu_irq *cpu_irqs[MAX_CPUS], slavio_irq[32], slavio_cpu_irq[MAX_CPUS],
> @@ -833,11 +831,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
>      unsigned int num_vsimms;
>
>      /* init CPUs */
> -    if (!cpu_model)
> -        cpu_model = hwdef->default_cpu_model;
> -
>      for(i = 0; i < smp_cpus; i++) {
> -        cpu_devinit(cpu_model, i, hwdef->slavio_base, &cpu_irqs[i]);
> +        cpu_devinit(machine->cpu_type, i, hwdef->slavio_base, &cpu_irqs[i]);
>      }
>
>      for (i = smp_cpus; i < MAX_CPUS; i++)
> @@ -1074,7 +1069,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = ss5_id,
>          .iommu_version = 0x05000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "Fujitsu MB86904",
>      },
>      /* SS-10 */
>      {
> @@ -1100,7 +1094,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = ss10_id,
>          .iommu_version = 0x03000000,
>          .max_mem = 0xf00000000ULL,
> -        .default_cpu_model = "TI SuperSparc II",
>      },
>      /* SS-600MP */
>      {
> @@ -1124,7 +1117,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = ss600mp_id,
>          .iommu_version = 0x01000000,
>          .max_mem = 0xf00000000ULL,
> -        .default_cpu_model = "TI SuperSparc II",
>      },
>      /* SS-20 */
>      {
> @@ -1166,7 +1158,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = ss20_id,
>          .iommu_version = 0x13000000,
>          .max_mem = 0xf00000000ULL,
> -        .default_cpu_model = "TI SuperSparc II",
>      },
>      /* Voyager */
>      {
> @@ -1190,7 +1181,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = vger_id,
>          .iommu_version = 0x05000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "Fujitsu MB86904",
>      },
>      /* LX */
>      {
> @@ -1215,7 +1205,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = lx_id,
>          .iommu_version = 0x04000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "TI MicroSparc I",
>      },
>      /* SS-4 */
>      {
> @@ -1240,7 +1229,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = ss4_id,
>          .iommu_version = 0x05000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "Fujitsu MB86904",
>      },
>      /* SPARCClassic */
>      {
> @@ -1264,7 +1252,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = scls_id,
>          .iommu_version = 0x05000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "TI MicroSparc I",
>      },
>      /* SPARCbook */
>      {
> @@ -1288,7 +1275,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = sbook_id,
>          .iommu_version = 0x05000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "TI MicroSparc I",
>      },
>  };
>
> @@ -1355,6 +1341,7 @@ static void ss5_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_SCSI;
>      mc->is_default = 1;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
>  }
>
>  static const TypeInfo ss5_type = {
> @@ -1372,6 +1359,7 @@ static void ss10_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_SCSI;
>      mc->max_cpus = 4;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
>  }
>
>  static const TypeInfo ss10_type = {
> @@ -1389,6 +1377,7 @@ static void ss600mp_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_SCSI;
>      mc->max_cpus = 4;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
>  }
>
>  static const TypeInfo ss600mp_type = {
> @@ -1406,6 +1395,7 @@ static void ss20_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_SCSI;
>      mc->max_cpus = 4;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
>  }
>
>  static const TypeInfo ss20_type = {
> @@ -1422,6 +1412,7 @@ static void voyager_class_init(ObjectClass *oc, void *data)
>      mc->init = vger_init;
>      mc->block_default_type = IF_SCSI;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
>  }
>
>  static const TypeInfo voyager_type = {
> @@ -1438,6 +1429,7 @@ static void ss_lx_class_init(ObjectClass *oc, void *data)
>      mc->init = ss_lx_init;
>      mc->block_default_type = IF_SCSI;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
>  }
>
>  static const TypeInfo ss_lx_type = {
> @@ -1454,6 +1446,7 @@ static void ss4_class_init(ObjectClass *oc, void *data)
>      mc->init = ss4_init;
>      mc->block_default_type = IF_SCSI;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
>  }
>
>  static const TypeInfo ss4_type = {
> @@ -1470,6 +1463,7 @@ static void scls_class_init(ObjectClass *oc, void *data)
>      mc->init = scls_init;
>      mc->block_default_type = IF_SCSI;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
>  }
>
>  static const TypeInfo scls_type = {
> @@ -1486,6 +1480,7 @@ static void sbook_class_init(ObjectClass *oc, void *data)
>      mc->init = sbook_init;
>      mc->block_default_type = IF_SCSI;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
>  }
>
>  static const TypeInfo sbook_type = {
> --
> 2.7.4
>



-- 
Regards,
Artyom Tarasenko

SPARC and PPC PReP under qemu blog: http://tyom.blogspot.com/search/label/qemu

Re: [Qemu-devel] [PATCH v2 33/40] sparc: sparc: use generic cpu_model parsing

[Mark Cave-Ayland]

On 05/10/17 14:51, Igor Mammedov wrote:

> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> CC: mark.cave-ayland@ilande.co.uk
> CC: atar4qemu@gmail.com
> ---
>  hw/sparc/sun4m.c | 29 ++++++++++++-----------------
>  1 file changed, 12 insertions(+), 17 deletions(-)
> 
> diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
> index e1bdd48..68b2378 100644
> --- a/hw/sparc/sun4m.c
> +++ b/hw/sparc/sun4m.c
> @@ -94,7 +94,6 @@ struct sun4m_hwdef {
>      } vsimm[MAX_VSIMMS];
>      hwaddr ecc_base;
>      uint64_t max_mem;
> -    const char * const default_cpu_model;
>      uint32_t ecc_version;
>      uint32_t iommu_version;
>      uint16_t machine_id;
> @@ -790,14 +789,14 @@ static const TypeInfo ram_info = {
>      .class_init    = ram_class_init,
>  };
>  
> -static void cpu_devinit(const char *cpu_model, unsigned int id,
> +static void cpu_devinit(const char *cpu_type, unsigned int id,
>                          uint64_t prom_addr, qemu_irq **cpu_irqs)
>  {
>      CPUState *cs;
>      SPARCCPU *cpu;
>      CPUSPARCState *env;
>  
> -    cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
> +    cpu = SPARC_CPU(cpu_create(cpu_type));
>      env = &cpu->env;
>  
>      cpu_sparc_set_id(env, id);
> @@ -820,7 +819,6 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
>                            MachineState *machine)
>  {
>      DeviceState *slavio_intctl;
> -    const char *cpu_model = machine->cpu_model;
>      unsigned int i;
>      void *iommu, *espdma, *ledma, *nvram;
>      qemu_irq *cpu_irqs[MAX_CPUS], slavio_irq[32], slavio_cpu_irq[MAX_CPUS],
> @@ -833,11 +831,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
>      unsigned int num_vsimms;
>  
>      /* init CPUs */
> -    if (!cpu_model)
> -        cpu_model = hwdef->default_cpu_model;
> -
>      for(i = 0; i < smp_cpus; i++) {
> -        cpu_devinit(cpu_model, i, hwdef->slavio_base, &cpu_irqs[i]);
> +        cpu_devinit(machine->cpu_type, i, hwdef->slavio_base, &cpu_irqs[i]);
>      }
>  
>      for (i = smp_cpus; i < MAX_CPUS; i++)
> @@ -1074,7 +1069,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = ss5_id,
>          .iommu_version = 0x05000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "Fujitsu MB86904",
>      },
>      /* SS-10 */
>      {
> @@ -1100,7 +1094,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = ss10_id,
>          .iommu_version = 0x03000000,
>          .max_mem = 0xf00000000ULL,
> -        .default_cpu_model = "TI SuperSparc II",
>      },
>      /* SS-600MP */
>      {
> @@ -1124,7 +1117,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = ss600mp_id,
>          .iommu_version = 0x01000000,
>          .max_mem = 0xf00000000ULL,
> -        .default_cpu_model = "TI SuperSparc II",
>      },
>      /* SS-20 */
>      {
> @@ -1166,7 +1158,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = ss20_id,
>          .iommu_version = 0x13000000,
>          .max_mem = 0xf00000000ULL,
> -        .default_cpu_model = "TI SuperSparc II",
>      },
>      /* Voyager */
>      {
> @@ -1190,7 +1181,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = vger_id,
>          .iommu_version = 0x05000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "Fujitsu MB86904",
>      },
>      /* LX */
>      {
> @@ -1215,7 +1205,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = lx_id,
>          .iommu_version = 0x04000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "TI MicroSparc I",
>      },
>      /* SS-4 */
>      {
> @@ -1240,7 +1229,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = ss4_id,
>          .iommu_version = 0x05000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "Fujitsu MB86904",
>      },
>      /* SPARCClassic */
>      {
> @@ -1264,7 +1252,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = scls_id,
>          .iommu_version = 0x05000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "TI MicroSparc I",
>      },
>      /* SPARCbook */
>      {
> @@ -1288,7 +1275,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
>          .machine_id = sbook_id,
>          .iommu_version = 0x05000000,
>          .max_mem = 0x10000000,
> -        .default_cpu_model = "TI MicroSparc I",
>      },
>  };
>  
> @@ -1355,6 +1341,7 @@ static void ss5_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_SCSI;
>      mc->is_default = 1;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
>  }
>  
>  static const TypeInfo ss5_type = {
> @@ -1372,6 +1359,7 @@ static void ss10_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_SCSI;
>      mc->max_cpus = 4;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
>  }
>  
>  static const TypeInfo ss10_type = {
> @@ -1389,6 +1377,7 @@ static void ss600mp_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_SCSI;
>      mc->max_cpus = 4;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
>  }
>  
>  static const TypeInfo ss600mp_type = {
> @@ -1406,6 +1395,7 @@ static void ss20_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_SCSI;
>      mc->max_cpus = 4;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
>  }
>  
>  static const TypeInfo ss20_type = {
> @@ -1422,6 +1412,7 @@ static void voyager_class_init(ObjectClass *oc, void *data)
>      mc->init = vger_init;
>      mc->block_default_type = IF_SCSI;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
>  }
>  
>  static const TypeInfo voyager_type = {
> @@ -1438,6 +1429,7 @@ static void ss_lx_class_init(ObjectClass *oc, void *data)
>      mc->init = ss_lx_init;
>      mc->block_default_type = IF_SCSI;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
>  }
>  
>  static const TypeInfo ss_lx_type = {
> @@ -1454,6 +1446,7 @@ static void ss4_class_init(ObjectClass *oc, void *data)
>      mc->init = ss4_init;
>      mc->block_default_type = IF_SCSI;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
>  }
>  
>  static const TypeInfo ss4_type = {
> @@ -1470,6 +1463,7 @@ static void scls_class_init(ObjectClass *oc, void *data)
>      mc->init = scls_init;
>      mc->block_default_type = IF_SCSI;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
>  }
>  
>  static const TypeInfo scls_type = {
> @@ -1486,6 +1480,7 @@ static void sbook_class_init(ObjectClass *oc, void *data)
>      mc->init = sbook_init;
>      mc->block_default_type = IF_SCSI;
>      mc->default_boot_order = "c";
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
>  }
>  
>  static const TypeInfo sbook_type = {

No objections to this patch but just to confirm from the previous
discussion that the cpu type gets parsed in a way such that an existing
-cpu "TI SuperSparc II" option gets mapped to the correct
"TI-SuperSparc-II" type? Presumably this is now handled at a different
level?


ATB,

Mark.

Re: [Qemu-devel] [PATCH v2 33/40] sparc: sparc: use generic cpu_model parsing

[Igor Mammedov]

On Thu, 5 Oct 2017 18:25:04 +0100
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> wrote:

> On 05/10/17 14:51, Igor Mammedov wrote:
> 
> > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > ---
> > CC: mark.cave-ayland@ilande.co.uk
> > CC: atar4qemu@gmail.com
> > ---
> >  hw/sparc/sun4m.c | 29 ++++++++++++-----------------
> >  1 file changed, 12 insertions(+), 17 deletions(-)
> > 
> > diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
> > index e1bdd48..68b2378 100644
> > --- a/hw/sparc/sun4m.c
> > +++ b/hw/sparc/sun4m.c
> > @@ -94,7 +94,6 @@ struct sun4m_hwdef {
> >      } vsimm[MAX_VSIMMS];
> >      hwaddr ecc_base;
> >      uint64_t max_mem;
> > -    const char * const default_cpu_model;
> >      uint32_t ecc_version;
> >      uint32_t iommu_version;
> >      uint16_t machine_id;
> > @@ -790,14 +789,14 @@ static const TypeInfo ram_info = {
> >      .class_init    = ram_class_init,
> >  };
> >  
> > -static void cpu_devinit(const char *cpu_model, unsigned int id,
> > +static void cpu_devinit(const char *cpu_type, unsigned int id,
> >                          uint64_t prom_addr, qemu_irq **cpu_irqs)
> >  {
> >      CPUState *cs;
> >      SPARCCPU *cpu;
> >      CPUSPARCState *env;
> >  
> > -    cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
> > +    cpu = SPARC_CPU(cpu_create(cpu_type));
> >      env = &cpu->env;
> >  
> >      cpu_sparc_set_id(env, id);
> > @@ -820,7 +819,6 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
> >                            MachineState *machine)
> >  {
> >      DeviceState *slavio_intctl;
> > -    const char *cpu_model = machine->cpu_model;
> >      unsigned int i;
> >      void *iommu, *espdma, *ledma, *nvram;
> >      qemu_irq *cpu_irqs[MAX_CPUS], slavio_irq[32], slavio_cpu_irq[MAX_CPUS],
> > @@ -833,11 +831,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
> >      unsigned int num_vsimms;
> >  
> >      /* init CPUs */
> > -    if (!cpu_model)
> > -        cpu_model = hwdef->default_cpu_model;
> > -
> >      for(i = 0; i < smp_cpus; i++) {
> > -        cpu_devinit(cpu_model, i, hwdef->slavio_base, &cpu_irqs[i]);
> > +        cpu_devinit(machine->cpu_type, i, hwdef->slavio_base, &cpu_irqs[i]);
> >      }
> >  
> >      for (i = smp_cpus; i < MAX_CPUS; i++)
> > @@ -1074,7 +1069,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
> >          .machine_id = ss5_id,
> >          .iommu_version = 0x05000000,
> >          .max_mem = 0x10000000,
> > -        .default_cpu_model = "Fujitsu MB86904",
> >      },
> >      /* SS-10 */
> >      {
> > @@ -1100,7 +1094,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
> >          .machine_id = ss10_id,
> >          .iommu_version = 0x03000000,
> >          .max_mem = 0xf00000000ULL,
> > -        .default_cpu_model = "TI SuperSparc II",
> >      },
> >      /* SS-600MP */
> >      {
> > @@ -1124,7 +1117,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
> >          .machine_id = ss600mp_id,
> >          .iommu_version = 0x01000000,
> >          .max_mem = 0xf00000000ULL,
> > -        .default_cpu_model = "TI SuperSparc II",
> >      },
> >      /* SS-20 */
> >      {
> > @@ -1166,7 +1158,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
> >          .machine_id = ss20_id,
> >          .iommu_version = 0x13000000,
> >          .max_mem = 0xf00000000ULL,
> > -        .default_cpu_model = "TI SuperSparc II",
> >      },
> >      /* Voyager */
> >      {
> > @@ -1190,7 +1181,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
> >          .machine_id = vger_id,
> >          .iommu_version = 0x05000000,
> >          .max_mem = 0x10000000,
> > -        .default_cpu_model = "Fujitsu MB86904",
> >      },
> >      /* LX */
> >      {
> > @@ -1215,7 +1205,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
> >          .machine_id = lx_id,
> >          .iommu_version = 0x04000000,
> >          .max_mem = 0x10000000,
> > -        .default_cpu_model = "TI MicroSparc I",
> >      },
> >      /* SS-4 */
> >      {
> > @@ -1240,7 +1229,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
> >          .machine_id = ss4_id,
> >          .iommu_version = 0x05000000,
> >          .max_mem = 0x10000000,
> > -        .default_cpu_model = "Fujitsu MB86904",
> >      },
> >      /* SPARCClassic */
> >      {
> > @@ -1264,7 +1252,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
> >          .machine_id = scls_id,
> >          .iommu_version = 0x05000000,
> >          .max_mem = 0x10000000,
> > -        .default_cpu_model = "TI MicroSparc I",
> >      },
> >      /* SPARCbook */
> >      {
> > @@ -1288,7 +1275,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
> >          .machine_id = sbook_id,
> >          .iommu_version = 0x05000000,
> >          .max_mem = 0x10000000,
> > -        .default_cpu_model = "TI MicroSparc I",
> >      },
> >  };
> >  
> > @@ -1355,6 +1341,7 @@ static void ss5_class_init(ObjectClass *oc, void *data)
> >      mc->block_default_type = IF_SCSI;
> >      mc->is_default = 1;
> >      mc->default_boot_order = "c";
> > +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
> >  }
> >  
> >  static const TypeInfo ss5_type = {
> > @@ -1372,6 +1359,7 @@ static void ss10_class_init(ObjectClass *oc, void *data)
> >      mc->block_default_type = IF_SCSI;
> >      mc->max_cpus = 4;
> >      mc->default_boot_order = "c";
> > +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
> >  }
> >  
> >  static const TypeInfo ss10_type = {
> > @@ -1389,6 +1377,7 @@ static void ss600mp_class_init(ObjectClass *oc, void *data)
> >      mc->block_default_type = IF_SCSI;
> >      mc->max_cpus = 4;
> >      mc->default_boot_order = "c";
> > +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
> >  }
> >  
> >  static const TypeInfo ss600mp_type = {
> > @@ -1406,6 +1395,7 @@ static void ss20_class_init(ObjectClass *oc, void *data)
> >      mc->block_default_type = IF_SCSI;
> >      mc->max_cpus = 4;
> >      mc->default_boot_order = "c";
> > +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
> >  }
> >  
> >  static const TypeInfo ss20_type = {
> > @@ -1422,6 +1412,7 @@ static void voyager_class_init(ObjectClass *oc, void *data)
> >      mc->init = vger_init;
> >      mc->block_default_type = IF_SCSI;
> >      mc->default_boot_order = "c";
> > +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
> >  }
> >  
> >  static const TypeInfo voyager_type = {
> > @@ -1438,6 +1429,7 @@ static void ss_lx_class_init(ObjectClass *oc, void *data)
> >      mc->init = ss_lx_init;
> >      mc->block_default_type = IF_SCSI;
> >      mc->default_boot_order = "c";
> > +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
> >  }
> >  
> >  static const TypeInfo ss_lx_type = {
> > @@ -1454,6 +1446,7 @@ static void ss4_class_init(ObjectClass *oc, void *data)
> >      mc->init = ss4_init;
> >      mc->block_default_type = IF_SCSI;
> >      mc->default_boot_order = "c";
> > +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
> >  }
> >  
> >  static const TypeInfo ss4_type = {
> > @@ -1470,6 +1463,7 @@ static void scls_class_init(ObjectClass *oc, void *data)
> >      mc->init = scls_init;
> >      mc->block_default_type = IF_SCSI;
> >      mc->default_boot_order = "c";
> > +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
> >  }
> >  
> >  static const TypeInfo scls_type = {
> > @@ -1486,6 +1480,7 @@ static void sbook_class_init(ObjectClass *oc, void *data)
> >      mc->init = sbook_init;
> >      mc->block_default_type = IF_SCSI;
> >      mc->default_boot_order = "c";
> > +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
> >  }
> >  
> >  static const TypeInfo sbook_type = {  
> 
> No objections to this patch but just to confirm from the previous
> discussion that the cpu type gets parsed in a way such that an existing
> -cpu "TI SuperSparc II" option gets mapped to the correct
> "TI-SuperSparc-II" type? Presumably this is now handled at a different
> level?
old way still works, see sparc_cpu_type_name()

call chain is
 vl.c:
   machine->cpu_type = cpu_parse_cpu_model()
                          -> sparc_cpu_class_by_name()
                               -> sparc_cpu_type_name()
   
> 
> 
> ATB,
> 
> Mark.
> 

Re: [Qemu-devel] [PATCH v2 33/40] sparc: sparc: use generic cpu_model parsing

[Mark Cave-Ayland]

On 06/10/17 08:37, Igor Mammedov wrote:

>> No objections to this patch but just to confirm from the previous
>> discussion that the cpu type gets parsed in a way such that an existing
>> -cpu "TI SuperSparc II" option gets mapped to the correct
>> "TI-SuperSparc-II" type? Presumably this is now handled at a different
>> level?
> old way still works, see sparc_cpu_type_name()
> 
> call chain is
>  vl.c:
>    machine->cpu_type = cpu_parse_cpu_model()
>                           -> sparc_cpu_class_by_name()
>                                -> sparc_cpu_type_name()

Yeah, that's what I was fairly sure the outcome was but couldn't quite
see it in that patchset. In that case:

Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>


ATB,

Mark.

[Qemu-devel] [PATCH v2 34/40] sparc: leon3: use generic cpu_model parsing

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: mark.cave-ayland@ilande.co.uk
CC: atar4qemu@gmail.com
CC: chouteau@adacore.com
---
 hw/sparc/leon3.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
index ec2816b..8c66d5a 100644
--- a/hw/sparc/leon3.c
+++ b/hw/sparc/leon3.c
@@ -107,7 +107,6 @@ static void leon3_set_pil_in(void *opaque, uint32_t pil_in)
 static void leon3_generic_hw_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     SPARCCPU *cpu;
     CPUSPARCState   *env;
@@ -122,11 +121,7 @@ static void leon3_generic_hw_init(MachineState *machine)
     ResetData  *reset_info;
 
     /* Init CPU */
-    if (!cpu_model) {
-        cpu_model = "LEON3";
-    }
-
-    cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
+    cpu = SPARC_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
 
     cpu_sparc_set_id(env, 0);
@@ -222,6 +217,7 @@ static void leon3_generic_machine_init(MachineClass *mc)
 {
     mc->desc = "Leon-3 generic";
     mc->init = leon3_generic_hw_init;
+    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3");
 }
 
 DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init)
-- 
2.7.4

Re: [Qemu-devel] [PATCH v2 34/40] sparc: leon3: use generic cpu_model parsing

[Artyom Tarasenko]

On Thu, Oct 5, 2017 at 3:51 PM, Igor Mammedov <imammedo@redhat.com> wrote:
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>

> ---
> CC: mark.cave-ayland@ilande.co.uk
> CC: atar4qemu@gmail.com
> CC: chouteau@adacore.com
> ---
>  hw/sparc/leon3.c | 8 ++------
>  1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
> index ec2816b..8c66d5a 100644
> --- a/hw/sparc/leon3.c
> +++ b/hw/sparc/leon3.c
> @@ -107,7 +107,6 @@ static void leon3_set_pil_in(void *opaque, uint32_t pil_in)
>  static void leon3_generic_hw_init(MachineState *machine)
>  {
>      ram_addr_t ram_size = machine->ram_size;
> -    const char *cpu_model = machine->cpu_model;
>      const char *kernel_filename = machine->kernel_filename;
>      SPARCCPU *cpu;
>      CPUSPARCState   *env;
> @@ -122,11 +121,7 @@ static void leon3_generic_hw_init(MachineState *machine)
>      ResetData  *reset_info;
>
>      /* Init CPU */
> -    if (!cpu_model) {
> -        cpu_model = "LEON3";
> -    }
> -
> -    cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
> +    cpu = SPARC_CPU(cpu_create(machine->cpu_type));
>      env = &cpu->env;
>
>      cpu_sparc_set_id(env, 0);
> @@ -222,6 +217,7 @@ static void leon3_generic_machine_init(MachineClass *mc)
>  {
>      mc->desc = "Leon-3 generic";
>      mc->init = leon3_generic_hw_init;
> +    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3");
>  }
>
>  DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init)
> --
> 2.7.4
>



-- 
Regards,
Artyom Tarasenko

SPARC and PPC PReP under qemu blog: http://tyom.blogspot.com/search/label/qemu

[Qemu-devel] [PATCH v2 35/40] mips: use object_new() instead of gnew()+object_initialize()

[Igor Mammedov]

object_initialize() is intended for inplace initialization of
objects, but here it's first allocated with g_new0() and then
initialized with object_initialize(). QEMU already has API
to do this (object_new), so do object creation with suitable
for usecase API.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: paul.burton@imgtec.com
CC: aurelien@aurel32.net
CC: yongbok.kim@imgtec.com
---
 hw/mips/boston.c     | 3 +--
 hw/mips/mips_malta.c | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 776ee28..e815be6 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -460,7 +460,6 @@ static void boston_mach_init(MachineState *machine)
 
     s = BOSTON(dev);
     s->mach = machine;
-    s->cps = g_new0(MIPSCPSState, 1);
 
     if (!cpu_supports_cps_smp(cpu_model)) {
         error_report("Boston requires CPUs which support CPS");
@@ -469,7 +468,7 @@ static void boston_mach_init(MachineState *machine)
 
     is_64b = cpu_supports_isa(cpu_model, ISA_MIPS64);
 
-    object_initialize(s->cps, sizeof(MIPSCPSState), TYPE_MIPS_CPS);
+    s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
     qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
 
     object_property_set_str(OBJECT(s->cps), cpu_model, "cpu-model", &err);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 2adb9bc..b6a58c7 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -949,9 +949,8 @@ static void create_cps(MaltaState *s, const char *cpu_model,
                        qemu_irq *cbus_irq, qemu_irq *i8259_irq)
 {
     Error *err = NULL;
-    s->cps = g_new0(MIPSCPSState, 1);
 
-    object_initialize(s->cps, sizeof(MIPSCPSState), TYPE_MIPS_CPS);
+    s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
     qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
 
     object_property_set_str(OBJECT(s->cps), cpu_model, "cpu-model", &err);
-- 
2.7.4

[Qemu-devel] [PATCH v2 36/40] mips: malta/boston: replace cpu_model with cpu_type

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: paul.burton@imgtec.com
CC: aurelien@aurel32.net
CC: yongbok.kim@imgtec.com
---
 include/hw/mips/cps.h        |  2 +-
 target/mips/cpu.h            |  8 ++++++--
 hw/mips/boston.c             | 11 +++++------
 hw/mips/cps.c                |  4 ++--
 hw/mips/mips_malta.c         | 33 +++++++++++++++------------------
 target/mips/cpu.c            |  2 +-
 target/mips/translate.c      | 20 ++++++--------------
 target/mips/translate_init.c | 12 ------------
 8 files changed, 36 insertions(+), 56 deletions(-)

diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h
index 526b8d0..aab1af9 100644
--- a/include/hw/mips/cps.h
+++ b/include/hw/mips/cps.h
@@ -34,7 +34,7 @@ typedef struct MIPSCPSState {
 
     uint32_t num_vp;
     uint32_t num_irq;
-    char *cpu_model;
+    char *cpu_type;
 
     MemoryRegion container;
     MIPSGCRState gcr;
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 66265e4..7f8ba5f 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -740,8 +740,12 @@ enum {
 int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
 
 #define cpu_init(cpu_model) cpu_generic_init(TYPE_MIPS_CPU, cpu_model)
-bool cpu_supports_cps_smp(const char *cpu_model);
-bool cpu_supports_isa(const char *cpu_model, unsigned int isa);
+
+#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
+#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
+
+bool cpu_supports_cps_smp(const char *cpu_type);
+bool cpu_supports_isa(const char *cpu_type, unsigned int isa);
 void cpu_set_exception_base(int vp_index, target_ulong address);
 
 /* mips_int.c */
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index e815be6..1cb4b6a 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -437,7 +437,6 @@ static void boston_mach_init(MachineState *machine)
     DeviceState *dev;
     BostonState *s;
     Error *err = NULL;
-    const char *cpu_model;
     MemoryRegion *flash, *ddr, *ddr_low_alias, *lcd, *platreg;
     MemoryRegion *sys_mem = get_system_memory();
     XilinxPCIEHost *pcie2;
@@ -453,25 +452,24 @@ static void boston_mach_init(MachineState *machine)
         exit(1);
     }
 
-    cpu_model = machine->cpu_model ?: "I6400";
-
     dev = qdev_create(NULL, TYPE_MIPS_BOSTON);
     qdev_init_nofail(dev);
 
     s = BOSTON(dev);
     s->mach = machine;
 
-    if (!cpu_supports_cps_smp(cpu_model)) {
+    if (!cpu_supports_cps_smp(machine->cpu_type)) {
         error_report("Boston requires CPUs which support CPS");
         exit(1);
     }
 
-    is_64b = cpu_supports_isa(cpu_model, ISA_MIPS64);
+    is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64);
 
     s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
     qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
 
-    object_property_set_str(OBJECT(s->cps), cpu_model, "cpu-model", &err);
+    object_property_set_str(OBJECT(s->cps), machine->cpu_type, "cpu-type",
+                            &err);
     object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err);
     object_property_set_bool(OBJECT(s->cps), true, "realized", &err);
 
@@ -571,6 +569,7 @@ static void boston_mach_class_init(MachineClass *mc)
     mc->block_default_type = IF_IDE;
     mc->default_ram_size = 1 * G_BYTE;
     mc->max_cpus = 16;
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("I6400");
 }
 
 DEFINE_MACHINE("boston", boston_mach_class_init)
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index fe5c630..4285d19 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -71,7 +71,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
     bool itu_present = false;
 
     for (i = 0; i < s->num_vp; i++) {
-        cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, s->cpu_model));
+        cpu = MIPS_CPU(cpu_create(s->cpu_type));
 
         /* Init internal devices */
         cpu_mips_irq_init_cpu(cpu);
@@ -160,7 +160,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
 static Property mips_cps_properties[] = {
     DEFINE_PROP_UINT32("num-vp", MIPSCPSState, num_vp, 1),
     DEFINE_PROP_UINT32("num-irq", MIPSCPSState, num_irq, 256),
-    DEFINE_PROP_STRING("cpu-model", MIPSCPSState, cpu_model),
+    DEFINE_PROP_STRING("cpu-type", MIPSCPSState, cpu_type),
     DEFINE_PROP_END_OF_LIST()
 };
 
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index b6a58c7..ec6af4a 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -923,7 +923,7 @@ static void main_cpu_reset(void *opaque)
     }
 }
 
-static void create_cpu_without_cps(const char *cpu_model,
+static void create_cpu_without_cps(const char *cpu_type,
                                    qemu_irq *cbus_irq, qemu_irq *i8259_irq)
 {
     CPUMIPSState *env;
@@ -931,7 +931,7 @@ static void create_cpu_without_cps(const char *cpu_model,
     int i;
 
     for (i = 0; i < smp_cpus; i++) {
-        cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
+        cpu = MIPS_CPU(cpu_create(cpu_type));
 
         /* Init internal devices */
         cpu_mips_irq_init_cpu(cpu);
@@ -945,7 +945,7 @@ static void create_cpu_without_cps(const char *cpu_model,
     *cbus_irq = env->irq[4];
 }
 
-static void create_cps(MaltaState *s, const char *cpu_model,
+static void create_cps(MaltaState *s, const char *cpu_type,
                        qemu_irq *cbus_irq, qemu_irq *i8259_irq)
 {
     Error *err = NULL;
@@ -953,7 +953,7 @@ static void create_cps(MaltaState *s, const char *cpu_model,
     s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
     qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
 
-    object_property_set_str(OBJECT(s->cps), cpu_model, "cpu-model", &err);
+    object_property_set_str(OBJECT(s->cps), cpu_type, "cpu-type", &err);
     object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err);
     object_property_set_bool(OBJECT(s->cps), true, "realized", &err);
     if (err != NULL) {
@@ -967,21 +967,13 @@ static void create_cps(MaltaState *s, const char *cpu_model,
     *cbus_irq = NULL;
 }
 
-static void create_cpu(MaltaState *s, const char *cpu_model,
-                       qemu_irq *cbus_irq, qemu_irq *i8259_irq)
+static void mips_create_cpu(MaltaState *s, const char *cpu_type,
+                            qemu_irq *cbus_irq, qemu_irq *i8259_irq)
 {
-    if (cpu_model == NULL) {
-#ifdef TARGET_MIPS64
-        cpu_model = "20Kc";
-#else
-        cpu_model = "24Kf";
-#endif
-    }
-
-    if ((smp_cpus > 1) && cpu_supports_cps_smp(cpu_model)) {
-        create_cps(s, cpu_model, cbus_irq, i8259_irq);
+    if ((smp_cpus > 1) && cpu_supports_cps_smp(cpu_type)) {
+        create_cps(s, cpu_type, cbus_irq, i8259_irq);
     } else {
-        create_cpu_without_cps(cpu_model, cbus_irq, i8259_irq);
+        create_cpu_without_cps(cpu_type, cbus_irq, i8259_irq);
     }
 }
 
@@ -1038,7 +1030,7 @@ void mips_malta_init(MachineState *machine)
     }
 
     /* create CPU */
-    create_cpu(s, machine->cpu_model, &cbus_irq, &i8259_irq);
+    mips_create_cpu(s, machine->cpu_type, &cbus_irq, &i8259_irq);
 
     /* allocate RAM */
     if (ram_size > (2048u << 20)) {
@@ -1264,6 +1256,11 @@ static void mips_malta_machine_init(MachineClass *mc)
     mc->block_default_type = IF_IDE;
     mc->max_cpus = 16;
     mc->is_default = 1;
+#ifdef TARGET_MIPS64
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("20Kc");
+#else
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
+#endif
 }
 
 DEFINE_MACHINE("malta", mips_malta_machine_init)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index c15b894..24a8907 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -158,7 +158,7 @@ static void mips_cpu_initfn(Object *obj)
 
 static char *mips_cpu_type_name(const char *cpu_model)
 {
-    return g_strdup_printf("%s-" TYPE_MIPS_CPU, cpu_model);
+    return g_strdup_printf(MIPS_CPU_TYPE_NAME("%s"), cpu_model);
 }
 
 static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index d16d879..3d76fc6 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -20523,24 +20523,16 @@ void cpu_mips_realize_env(CPUMIPSState *env)
     mvp_init(env, env->cpu_model);
 }
 
-bool cpu_supports_cps_smp(const char *cpu_model)
+bool cpu_supports_cps_smp(const char *cpu_type)
 {
-    const mips_def_t *def = cpu_mips_find_by_name(cpu_model);
-    if (!def) {
-        return false;
-    }
-
-    return (def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0;
+    const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type));
+    return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0;
 }
 
-bool cpu_supports_isa(const char *cpu_model, unsigned int isa)
+bool cpu_supports_isa(const char *cpu_type, unsigned int isa)
 {
-    const mips_def_t *def = cpu_mips_find_by_name(cpu_model);
-    if (!def) {
-        return false;
-    }
-
-    return (def->insn_flags & isa) != 0;
+    const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type));
+    return (mcc->cpu_def->insn_flags & isa) != 0;
 }
 
 void cpu_set_exception_base(int vp_index, target_ulong address)
diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
index 8bbded4..c7ba6ee 100644
--- a/target/mips/translate_init.c
+++ b/target/mips/translate_init.c
@@ -755,18 +755,6 @@ const mips_def_t mips_defs[] =
 };
 const int mips_defs_number = ARRAY_SIZE(mips_defs);
 
-static const mips_def_t *cpu_mips_find_by_name (const char *name)
-{
-    int i;
-
-    for (i = 0; i < ARRAY_SIZE(mips_defs); i++) {
-        if (strcasecmp(name, mips_defs[i].name) == 0) {
-            return &mips_defs[i];
-        }
-    }
-    return NULL;
-}
-
 void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf)
 {
     int i;
-- 
2.7.4

[Qemu-devel] [PATCH v2 37/40] mips: fulong2e: replace cpu_model with cpu_type

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: yongbok.kim@imgtec.com
CC: aurelien@aurel32.net
---
 hw/mips/mips_fulong2e.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 7531868..146cf0f 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -258,7 +258,6 @@ static void network_init (PCIBus *pci_bus)
 static void mips_fulong2e_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
     const char *initrd_filename = machine->initrd_filename;
@@ -277,10 +276,7 @@ static void mips_fulong2e_init(MachineState *machine)
     CPUMIPSState *env;
 
     /* init CPUs */
-    if (cpu_model == NULL) {
-        cpu_model = "Loongson-2E";
-    }
-    cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
+    cpu = MIPS_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
 
     qemu_register_reset(main_cpu_reset, cpu);
@@ -385,6 +381,7 @@ static void mips_fulong2e_machine_init(MachineClass *mc)
     mc->desc = "Fulong 2e mini pc";
     mc->init = mips_fulong2e_init;
     mc->block_default_type = IF_IDE;
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
 }
 
 DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 38/40] mips: Magnum/Acer Pica 61: replace cpu_model with cpu_type

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Hervé Poussineau <hpoussin@reactos.org>
---
CC: hpoussin@reactos.org
CC: aurelien@aurel32.net
CC: yongbok.kim@imgtec.com
---
 hw/mips/mips_jazz.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index 7e6626d..fe4f173 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -122,7 +122,6 @@ static void mips_jazz_init(MachineState *machine,
                            enum jazz_model_e jazz_model)
 {
     MemoryRegion *address_space = get_system_memory();
-    const char *cpu_model = machine->cpu_model;
     char *filename;
     int bios_size, n;
     MIPSCPU *cpu;
@@ -148,10 +147,7 @@ static void mips_jazz_init(MachineState *machine,
     MemoryRegion *bios2 = g_new(MemoryRegion, 1);
 
     /* init CPUs */
-    if (cpu_model == NULL) {
-        cpu_model = "R4000";
-    }
-    cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
+    cpu = MIPS_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
     qemu_register_reset(main_cpu_reset, cpu);
 
@@ -349,6 +345,7 @@ static void mips_magnum_class_init(ObjectClass *oc, void *data)
     mc->desc = "MIPS Magnum";
     mc->init = mips_magnum_init;
     mc->block_default_type = IF_SCSI;
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000");
 }
 
 static const TypeInfo mips_magnum_type = {
@@ -364,6 +361,7 @@ static void mips_pica61_class_init(ObjectClass *oc, void *data)
     mc->desc = "Acer Pica 61";
     mc->init = mips_pica61_init;
     mc->block_default_type = IF_SCSI;
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000");
 }
 
 static const TypeInfo mips_pica61_type = {
-- 
2.7.4

[Qemu-devel] [PATCH v2 39/40] mips: mipssim: replace cpu_model with cpu_type

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: yongbok.kim@imgtec.com
CC: aurelien@aurel32.net
---
 hw/mips/mips_mipssim.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
index a092072..e5d3654 100644
--- a/hw/mips/mips_mipssim.c
+++ b/hw/mips/mips_mipssim.c
@@ -141,7 +141,6 @@ static void
 mips_mipssim_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
     const char *initrd_filename = machine->initrd_filename;
@@ -156,14 +155,7 @@ mips_mipssim_init(MachineState *machine)
     int bios_size;
 
     /* Init CPUs. */
-    if (cpu_model == NULL) {
-#ifdef TARGET_MIPS64
-        cpu_model = "5Kf";
-#else
-        cpu_model = "24Kf";
-#endif
-    }
-    cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
+    cpu = MIPS_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
 
     reset_info = g_malloc0(sizeof(ResetData));
@@ -235,6 +227,11 @@ static void mips_mipssim_machine_init(MachineClass *mc)
 {
     mc->desc = "MIPS MIPSsim platform";
     mc->init = mips_mipssim_init;
+#ifdef TARGET_MIPS64
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf");
+#else
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
+#endif
 }
 
 DEFINE_MACHINE("mipssim", mips_mipssim_machine_init)
-- 
2.7.4

[Qemu-devel] [PATCH v2 40/40] mips: r4k: replace cpu_model with cpu_type

[Igor Mammedov]

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: aurelien@aurel32.net
CC: yongbok.kim@imgtec.com
---
 hw/mips/mips_r4k.c | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index 1272d4e..3bbb182 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -163,7 +163,6 @@ static
 void mips_r4k_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     const char *kernel_cmdline = machine->kernel_cmdline;
     const char *initrd_filename = machine->initrd_filename;
@@ -186,14 +185,7 @@ void mips_r4k_init(MachineState *machine)
     int be;
 
     /* init CPUs */
-    if (cpu_model == NULL) {
-#ifdef TARGET_MIPS64
-        cpu_model = "R4000";
-#else
-        cpu_model = "24Kf";
-#endif
-    }
-    cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
+    cpu = MIPS_CPU(cpu_create(machine->cpu_type));
     env = &cpu->env;
 
     reset_info = g_malloc0(sizeof(ResetData));
@@ -303,6 +295,12 @@ static void mips_machine_init(MachineClass *mc)
     mc->desc = "mips r4k platform";
     mc->init = mips_r4k_init;
     mc->block_default_type = IF_IDE;
+#ifdef TARGET_MIPS64
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000");
+#else
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
+#endif
+
 }
 
 DEFINE_MACHINE("mips", mips_machine_init)
-- 
2.7.4

Re: [Qemu-devel] [PATCH v2 00/40] generalize parsing of cpu_model (part 2)

[Igor Mammedov]

On Thu,  5 Oct 2017 15:50:34 +0200
Igor Mammedov <imammedo@redhat.com> wrote:

Eduardo,

Could you merge series via machine tree, pls?

> Changelog:
>  v2:
>     - replace "qom: add helper type_init_from_array()" with 3 new patches
>       * qom: update doc comment for type_register[_static]()                           
>       * qom: introduce type_register_static_array()                                    
>       * qom: add helper macro DEFINE_TYPES()
>     - s/type_init_from_array/DEFINE_TYPES/ across series in
>         "FOO: cleanup cpu type name composition" patches
>     - re-add lost DEFINE_CRIS_CPU_TYPE() in
>         "cris: cleanup cpu type name composition"
>     - improve commit message in
>         "sh4: shix: use generic cpu_model parsing"
>     - drop  NULL-initialization in
>         "sh4: simplify superh_cpu_class_by_name()"
>     - pick up Reviewed/Acked-bys from v1
>         I took a liberty to keep all of them because of
>         s/type_init_from_array/DEFINE_TYPES/ renaming in reviewed
>         "FOO: cleanup cpu type name composition" patches was trivial
>         and it passed tests locally so works as expected.
> 
> this series is continuation of effort to remove boards dependency on
> cpu_model parsing and generalizing default cpu type handling.
> For background story look at merged: 
> 
>   [PATCH v2 0/5] generalize parsing of cpu_model (x86/arm)
>   https://lists.gnu.org/archive/html/qemu-devel/2017-09/msg03564.html
> 
> thisi series mostly consist of 3 types of patches:
>  1: unifying cpu type name composing by introdicing 
>         FOO_CPU_TYPE_NAME() macro across targets
>  2: replacing simple static(and needlessly dynamic) cpu type registrations
>     with common pattern where typinfo is put into array which
>     is used to batch register cpu types with new helper DEFINE_TYPES()
>  3: main patches that generalize cpu_model parsing for boards
> 
> I'm releasing independent subset that takes care of all
> targets/boards except null-machine, ppc and *-user targets
> (as they are still work in progress and PPC part is big
> enough to deserve its own series)
> 
> I've tried to test all converted boards but there were a lot
> so I've might have missed some.
> 
> git tree for testing:
>   https://github.com/imammedo/qemu/branches cpu_init_removal_part2_v2
> 
> For reference v1:
>   https://lists.nongnu.org/archive/html/qemu-devel/2017-10/msg00036.html
> 
> PS:
>  rebased on top of ehabkost/machine-next tree to avoid resolve conflicts with
>  queued "qom/cpu: move cpu_model null check to  cpu_class_by_name()"
> 
> CC: Philippe Mathieu-Daudé <f4bug@amsat.org>
> 
> Igor Mammedov (40):
>   qom: update doc comment for type_register[_static]()
>   qom: introduce type_register_static_array()
>   qom: add helper macro DEFINE_TYPES()
>   alpha: cleanup cpu type name composition
>   alpha: use generic cpu_model parsing
>   cris: cleanup cpu type name composition
>   cris: use generic cpu_model parsing
>   lm32: cleanup cpu type name composition
>   lm32: milkymist: use generic cpu_model parsing
>   lm32: lm32_boards: use generic cpu_model parsing
>   m68k: cleanup cpu type name composition
>   m68k: an5206: use generic cpu_model parsing
>   m68k: mcf5208: use generic cpu_model parsing
>   moxie: fix qemu-system-moxie failing to start with CLI "-cpu
>     MoxieLite"
>   moxie: cleanup cpu type name composition
>   moxie: use generic cpu_model parsing
>   openrisc: cleanup cpu type name composition
>   openrisc: use generic cpu_model parsing
>   sh4: r2d: use generic cpu_model parsing
>   sh4: shix: use generic cpu_model parsing
>   sh4: cleanup cpu type name composition
>   sh4: simplify superh_cpu_class_by_name()
>   sh4: remove SuperHCPUClass::name field
>   xtensa: cleanup cpu type name composition
>   xtensa: sim: use generic cpu_model parsing
>   xtensa: lx60/lx200/ml605/kc705: use generic cpu_model parsing
>   unicore32: cleanup cpu type name composition
>   unicore32: use generic cpu_model parsing
>   tricore: cleanup cpu type name composition
>   tricore: use generic cpu_model parsing
>   sparc: cleanup cpu type name composition
>   sparc: sun4u/sun4v/niagara: use generic cpu_model parsing
>   sparc: sparc: use generic cpu_model parsing
>   sparc: leon3: use generic cpu_model parsing
>   mips: use object_new() instead of gnew()+object_initialize()
>   mips: malta/boston: replace cpu_model with cpu_type
>   mips: fulong2e: replace cpu_model with cpu_type
>   mips: Magnum/Acer Pica 61: replace cpu_model with cpu_type
>   mips: mipssim: replace cpu_model with cpu_type
>   mips: r4k: replace cpu_model with cpu_type
> 
>  include/hw/mips/cps.h          |   2 +-
>  include/hw/sparc/sparc64.h     |   3 +-
>  include/qom/object.h           |  50 ++++++++++++++++++-
>  target/alpha/cpu.h             |   3 ++
>  target/cris/cpu.h              |   3 ++
>  target/lm32/cpu.h              |   3 ++
>  target/m68k/cpu.h              |   3 ++
>  target/mips/cpu.h              |   8 ++-
>  target/moxie/cpu.h             |   3 ++
>  target/openrisc/cpu.h          |   3 ++
>  target/sh4/cpu-qom.h           |   8 ++-
>  target/sh4/cpu.h               |   3 ++
>  target/sparc/cpu.h             |   3 ++
>  target/tricore/cpu.h           |   2 +
>  target/unicore32/cpu.h         |   3 ++
>  target/xtensa/cpu.h            |   4 ++
>  hw/alpha/dp264.c               |   4 +-
>  hw/cris/axis_dev88.c           |   7 +--
>  hw/lm32/lm32_boards.c          |  14 ++----
>  hw/lm32/milkymist.c            |   7 +--
>  hw/m68k/an5206.c               |   7 +--
>  hw/m68k/mcf5208.c              |   7 +--
>  hw/mips/boston.c               |  14 +++---
>  hw/mips/cps.c                  |   4 +-
>  hw/mips/mips_fulong2e.c        |   7 +--
>  hw/mips/mips_jazz.c            |   8 ++-
>  hw/mips/mips_malta.c           |  36 ++++++--------
>  hw/mips/mips_mipssim.c         |  15 +++---
>  hw/mips/mips_r4k.c             |  16 +++---
>  hw/moxie/moxiesim.c            |   7 +--
>  hw/openrisc/openrisc_sim.c     |   8 +--
>  hw/sh4/r2d.c                   |   8 +--
>  hw/sh4/shix.c                  |   7 +--
>  hw/sparc/leon3.c               |   8 +--
>  hw/sparc/sun4m.c               |  29 +++++------
>  hw/sparc64/niagara.c           |   4 +-
>  hw/sparc64/sparc64.c           |   8 +--
>  hw/sparc64/sun4u.c             |   8 ++-
>  hw/tricore/tricore_testboard.c |   6 +--
>  hw/unicore32/puv3.c            |   8 +--
>  hw/xtensa/sim.c                |   8 +--
>  hw/xtensa/xtfpga.c             |  11 ++---
>  qom/object.c                   |   9 ++++
>  target/alpha/cpu.c             | 107 +++++++++++++----------------------------
>  target/cris/cpu.c              |  81 +++++++++++--------------------
>  target/lm32/cpu.c              |  74 +++++++++-------------------
>  target/m68k/cpu.c              |  75 +++++++++++------------------
>  target/mips/cpu.c              |   2 +-
>  target/mips/translate.c        |  20 +++-----
>  target/mips/translate_init.c   |  12 -----
>  target/moxie/cpu.c             |  61 +++++++++--------------
>  target/openrisc/cpu.c          |  69 +++++++++-----------------
>  target/sh4/cpu.c               | 107 +++++++++++++++--------------------------
>  target/sparc/cpu.c             |   2 +-
>  target/tricore/cpu.c           |  68 ++++++++------------------
>  target/unicore32/cpu.c         |  61 ++++++++---------------
>  target/xtensa/cpu.c            |   2 +-
>  target/xtensa/helper.c         |   2 +-
>  58 files changed, 442 insertions(+), 680 deletions(-)
> 

Re: [Qemu-devel] [PATCH v2 00/40] generalize parsing of cpu_model (part 2)

[Eduardo Habkost]

On Thu, Oct 12, 2017 at 06:27:46PM +0200, Igor Mammedov wrote:
> On Thu,  5 Oct 2017 15:50:34 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
> 
> Eduardo,
> 
> Could you merge series via machine tree, pls?

I just queued it on machine-next.  Pull request will be sent only
next week, though.

-- 
Eduardo

Re: [Qemu-devel] [PATCH v2 00/40] generalize parsing of cpu_model (part 2)

[Igor Mammedov]

On Fri, 13 Oct 2017 16:13:16 -0300
Eduardo Habkost <ehabkost@redhat.com> wrote:

> On Thu, Oct 12, 2017 at 06:27:46PM +0200, Igor Mammedov wrote:
> > On Thu,  5 Oct 2017 15:50:34 +0200
> > Igor Mammedov <imammedo@redhat.com> wrote:
> > 
> > Eduardo,
> > 
> > Could you merge series via machine tree, pls?  
> 
> I just queued it on machine-next.  Pull request will be sent only
> next week, though.
> 

Thanks!