From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Richard Henderson <rth@twiddle.net>, patches@linaro.org
Subject: [Qemu-devel] [PATCH 1/9] target/arm: Add M profile secure MMU index values to get_a32_user_mem_index()
Date: Mon, 9 Oct 2017 14:48:31 +0100 [thread overview]
Message-ID: <1507556919-24992-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1507556919-24992-1-git-send-email-peter.maydell@linaro.org>
Add the M profile secure MMU index values to the switch in
get_a32_user_mem_index() so that LDRT/STRT work correctly
rather than asserting at translate time.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index ab1a12a..e1b83b7 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -165,6 +165,10 @@ static inline int get_a32_user_mem_index(DisasContext *s)
case ARMMMUIdx_MPriv:
case ARMMMUIdx_MNegPri:
return arm_to_core_mmu_idx(ARMMMUIdx_MUser);
+ case ARMMMUIdx_MSUser:
+ case ARMMMUIdx_MSPriv:
+ case ARMMMUIdx_MSNegPri:
+ return arm_to_core_mmu_idx(ARMMMUIdx_MSUser);
case ARMMMUIdx_S2NS:
default:
g_assert_not_reached();
--
2.7.4
next prev parent reply other threads:[~2017-10-09 13:49 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-09 13:48 [Qemu-devel] [PATCH 0/9] v8M: BLXNS, SG, secure function return Peter Maydell
2017-10-09 13:48 ` Peter Maydell [this message]
2017-10-10 23:36 ` [Qemu-devel] [PATCH 1/9] target/arm: Add M profile secure MMU index values to get_a32_user_mem_index() Richard Henderson
2017-10-09 13:48 ` [Qemu-devel] [PATCH 2/9] target/arm: Implement SG instruction Peter Maydell
2017-10-11 0:27 ` Richard Henderson
2017-10-09 13:48 ` [Qemu-devel] [PATCH 3/9] target/arm: Implement BLXNS Peter Maydell
2017-10-09 13:48 ` [Qemu-devel] [PATCH 4/9] target/arm: Implement secure function return Peter Maydell
2017-10-09 13:48 ` [Qemu-devel] [PATCH 5/9] target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1 Peter Maydell
2017-10-11 0:29 ` Richard Henderson
2017-10-09 13:48 ` [Qemu-devel] [PATCH 6/9] target/arm: Pull Thumb insn word loads up to top level Peter Maydell
2017-10-11 2:18 ` Richard Henderson
2017-10-11 9:55 ` Peter Maydell
2017-10-09 13:48 ` [Qemu-devel] [PATCH 7/9] target-arm: Simplify insn_crosses_page() Peter Maydell
2017-10-11 2:26 ` Richard Henderson
2017-10-09 13:48 ` [Qemu-devel] [PATCH 8/9] target/arm: Support some Thumb insns being always unconditional Peter Maydell
2017-10-11 2:52 ` Richard Henderson
2017-10-11 9:57 ` Peter Maydell
2017-10-11 14:14 ` Richard Henderson
2017-10-09 13:48 ` [Qemu-devel] [PATCH 9/9] target/arm: Implement SG instruction corner cases Peter Maydell
2017-10-11 2:57 ` Richard Henderson
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