* [Qemu-devel] [PATCH v2 01/24] qom: update doc comment for type_register[_static]()
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 02/24] qom: introduce type_register_static_array() Igor Mammedov
` (23 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
type_register()/type_register_static() functions in current impl.
can't fail returning 0, also none of the users check for error
so update doc comment to reflect current behaviour.
Suggested-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
---
include/qom/object.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/qom/object.h b/include/qom/object.h
index e0d9824..a707b67 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -773,7 +773,7 @@ const char *object_get_typename(const Object *obj);
* @info and all of the strings it points to should exist for the life time
* that the type is registered.
*
- * Returns: 0 on failure, the new #Type on success.
+ * Returns: the new #Type.
*/
Type type_register_static(const TypeInfo *info);
@@ -784,7 +784,7 @@ Type type_register_static(const TypeInfo *info);
* Unlike type_register_static(), this call does not require @info or its
* string members to continue to exist after the call returns.
*
- * Returns: 0 on failure, the new #Type on success.
+ * Returns: the new #Type.
*/
Type type_register(const TypeInfo *info);
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 02/24] qom: introduce type_register_static_array()
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 01/24] qom: update doc comment for type_register[_static]() Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 03/24] qom: add helper macro DEFINE_TYPES() Igor Mammedov
` (22 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
it will help to remove code duplication of registration
static types in places that have open coded loop to
perform batch type registering.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
---
include/qom/object.h | 10 ++++++++++
qom/object.c | 9 +++++++++
2 files changed, 19 insertions(+)
diff --git a/include/qom/object.h b/include/qom/object.h
index a707b67..9a2369c 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -789,6 +789,16 @@ Type type_register_static(const TypeInfo *info);
Type type_register(const TypeInfo *info);
/**
+ * type_register_static_array:
+ * @infos: The array of the new type #TypeInfo structures.
+ * @nr_infos: number of entries in @infos
+ *
+ * @infos and all of the strings it points to should exist for the life time
+ * that the type is registered.
+ */
+void type_register_static_array(const TypeInfo *infos, int nr_infos);
+
+/**
* object_class_dynamic_cast_assert:
* @klass: The #ObjectClass to attempt to cast.
* @typename: The QOM typename of the class to cast to.
diff --git a/qom/object.c b/qom/object.c
index 6a7bd92..c58c52d 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -151,6 +151,15 @@ TypeImpl *type_register_static(const TypeInfo *info)
return type_register(info);
}
+void type_register_static_array(const TypeInfo *infos, int nr_infos)
+{
+ int i;
+
+ for (i = 0; i < nr_infos; i++) {
+ type_register_static(&infos[i]);
+ }
+}
+
static TypeImpl *type_get_by_name(const char *name)
{
if (name == NULL) {
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 03/24] qom: add helper macro DEFINE_TYPES()
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 01/24] qom: update doc comment for type_register[_static]() Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 02/24] qom: introduce type_register_static_array() Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 04/24] ppc: mpc8544ds/e500plat: use generic cpu_model parsing Igor Mammedov
` (21 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
DEFINE_TYPES() will help to simplify following routine patterns:
static void foo_register_types(void)
{
type_register_static(&foo1_type_info);
type_register_static(&foo2_type_info);
...
}
type_init(foo_register_types)
or
static void foo_register_types(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(type_infos); i++) {
type_register_static(&type_infos[i]);
}
}
type_init(foo_register_types)
with a single line
DEFINE_TYPES(type_infos)
where types have static definition which could be consolidated in
a single array of TypeInfo structures.
It saves us ~6-10LOC per use case and would help to replace
imperative foo_register_types() there with declarative style of
type registration.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
---
include/qom/object.h | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/include/qom/object.h b/include/qom/object.h
index 9a2369c..dc73d59 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -79,6 +79,28 @@ typedef struct InterfaceInfo InterfaceInfo;
* #TypeInfo describes information about the type including what it inherits
* from, the instance and class size, and constructor/destructor hooks.
*
+ * Alternatively several static types could be registered using helper macro
+ * DEFINE_TYPES()
+ *
+ * <example>
+ * <programlisting>
+ * static const TypeInfo device_types_info[] = {
+ * {
+ * .name = TYPE_MY_DEVICE_A,
+ * .parent = TYPE_DEVICE,
+ * .instance_size = sizeof(MyDeviceA),
+ * },
+ * {
+ * .name = TYPE_MY_DEVICE_B,
+ * .parent = TYPE_DEVICE,
+ * .instance_size = sizeof(MyDeviceB),
+ * },
+ * };
+ *
+ * DEFINE_TYPES(device_types_info)
+ * </programlisting>
+ * </example>
+ *
* Every type has an #ObjectClass associated with it. #ObjectClass derivatives
* are instantiated dynamically but there is only ever one instance for any
* given type. The #ObjectClass typically holds a table of function pointers
@@ -799,6 +821,20 @@ Type type_register(const TypeInfo *info);
void type_register_static_array(const TypeInfo *infos, int nr_infos);
/**
+ * DEFINE_TYPES:
+ * @type_array: The array containing #TypeInfo structures to register
+ *
+ * @type_array should be static constant that exists for the life time
+ * that the type is registered.
+ */
+#define DEFINE_TYPES(type_array) \
+static void do_qemu_init_ ## type_array(void) \
+{ \
+ type_register_static_array(type_array, ARRAY_SIZE(type_array)); \
+} \
+type_init(do_qemu_init_ ## type_array)
+
+/**
* object_class_dynamic_cast_assert:
* @klass: The #ObjectClass to attempt to cast.
* @typename: The QOM typename of the class to cast to.
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 04/24] ppc: mpc8544ds/e500plat: use generic cpu_model parsing
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (2 preceding siblings ...)
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 03/24] qom: add helper macro DEFINE_TYPES() Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 05/24] ppc: mac_newworld: " Igor Mammedov
` (20 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/e500.c | 8 +-------
hw/ppc/e500plat.c | 1 +
hw/ppc/mpc8544ds.c | 2 ++
3 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index db0e49a..9178e70 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -803,11 +803,6 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
SysBusDevice *s;
PPCE500CCSRState *ccsr;
- /* Setup CPUs */
- if (machine->cpu_model == NULL) {
- machine->cpu_model = "e500v2_v30";
- }
-
irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
irqs[0] = g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
for (i = 0; i < smp_cpus; i++) {
@@ -815,8 +810,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
CPUState *cs;
qemu_irq *input;
- cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
- machine->cpu_model));
+ cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
cs = CPU(cpu);
diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c
index 94b4545..e59e80f 100644
--- a/hw/ppc/e500plat.c
+++ b/hw/ppc/e500plat.c
@@ -64,6 +64,7 @@ static void e500plat_machine_init(MachineClass *mc)
mc->init = e500plat_init;
mc->max_cpus = 32;
mc->has_dynamic_sysbus = true;
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
}
DEFINE_MACHINE("ppce500", e500plat_machine_init)
diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c
index 27b8289..1717953 100644
--- a/hw/ppc/mpc8544ds.c
+++ b/hw/ppc/mpc8544ds.c
@@ -16,6 +16,7 @@
#include "sysemu/device_tree.h"
#include "hw/ppc/openpic.h"
#include "qemu/error-report.h"
+#include "cpu.h"
static void mpc8544ds_fixup_devtree(PPCE500Params *params, void *fdt)
{
@@ -55,6 +56,7 @@ static void ppce500_machine_init(MachineClass *mc)
mc->desc = "mpc8544ds";
mc->init = mpc8544ds_init;
mc->max_cpus = 15;
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
}
DEFINE_MACHINE("mpc8544ds", ppce500_machine_init)
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 05/24] ppc: mac_newworld: use generic cpu_model parsing
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (3 preceding siblings ...)
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 04/24] ppc: mpc8544ds/e500plat: use generic cpu_model parsing Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 06/24] ppc: mac_oldworld: " Igor Mammedov
` (19 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/mac_newworld.c | 15 ++++++---------
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 6d0ace2..3fa7c42 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -174,16 +174,8 @@ static void ppc_core99_init(MachineState *machine)
linux_boot = (kernel_filename != NULL);
/* init CPUs */
- if (machine->cpu_model == NULL) {
-#ifdef TARGET_PPC64
- machine->cpu_model = "970fx";
-#else
- machine->cpu_model = "G4";
-#endif
- }
for (i = 0; i < smp_cpus; i++) {
- cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
- machine->cpu_model));
+ cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
/* Set time-base frequency to 100 Mhz */
@@ -520,6 +512,11 @@ static void core99_machine_class_init(ObjectClass *oc, void *data)
mc->max_cpus = MAX_CPUS;
mc->default_boot_order = "cd";
mc->kvm_type = core99_kvm_type;
+#ifdef TARGET_PPC64
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
+#else
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
+#endif
}
static const TypeInfo core99_machine_info = {
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 06/24] ppc: mac_oldworld: use generic cpu_model parsing
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (4 preceding siblings ...)
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 05/24] ppc: mac_newworld: " Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 07/24] ppc: bamboo: " Igor Mammedov
` (18 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/mac_oldworld.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index bc7c8b7..010ea36 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -108,11 +108,8 @@ static void ppc_heathrow_init(MachineState *machine)
linux_boot = (kernel_filename != NULL);
/* init CPUs */
- if (machine->cpu_model == NULL)
- machine->cpu_model = "G3";
for (i = 0; i < smp_cpus; i++) {
- cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
- machine->cpu_model));
+ cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
/* Set time-base frequency to 16.6 Mhz */
@@ -385,6 +382,7 @@ static void heathrow_class_init(ObjectClass *oc, void *data)
/* TOFIX "cad" when Mac floppy is implemented */
mc->default_boot_order = "cd";
mc->kvm_type = heathrow_kvm_type;
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
}
static const TypeInfo ppc_heathrow_machine_info = {
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 07/24] ppc: bamboo: use generic cpu_model parsing
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (5 preceding siblings ...)
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 06/24] ppc: mac_oldworld: " Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 08/24] ppc: replace cpu_model with cpu_type on ref405ep, taihu boards Igor Mammedov
` (17 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/ppc440_bamboo.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index f92d47f..693c215 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
@@ -182,11 +182,7 @@ static void bamboo_init(MachineState *machine)
int success;
int i;
- /* Setup CPU. */
- if (machine->cpu_model == NULL) {
- machine->cpu_model = "440EP";
- }
- cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model));
+ cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
if (env->mmu_model != POWERPC_MMU_BOOKE) {
@@ -297,6 +293,7 @@ static void bamboo_machine_init(MachineClass *mc)
{
mc->desc = "bamboo";
mc->init = bamboo_init;
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440epb");
}
DEFINE_MACHINE("bamboo", bamboo_machine_init)
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 08/24] ppc: replace cpu_model with cpu_type on ref405ep, taihu boards
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (6 preceding siblings ...)
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 07/24] ppc: bamboo: " Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 09/24] ppc: virtex-ml507: replace cpu_model with cpu_type Igor Mammedov
` (16 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/ppc405_uc.c | 6 ++++--
hw/ppc/ppc4xx_devs.c | 4 ++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index 8e58065..205ebce 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -1629,7 +1629,8 @@ CPUPPCState *ppc405cr_init(MemoryRegion *address_space_mem,
qemu_irq *pic, *irqs;
memset(clk_setup, 0, sizeof(clk_setup));
- cpu = ppc4xx_init("405cr", &clk_setup[PPC405CR_CPU_CLK],
+ cpu = ppc4xx_init(POWERPC_CPU_TYPE_NAME("405crc"),
+ &clk_setup[PPC405CR_CPU_CLK],
&clk_setup[PPC405CR_TMR_CLK], sysclk);
env = &cpu->env;
/* Memory mapped devices registers */
@@ -1981,7 +1982,8 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem,
memset(clk_setup, 0, sizeof(clk_setup));
/* init CPUs */
- cpu = ppc4xx_init("405ep", &clk_setup[PPC405EP_CPU_CLK],
+ cpu = ppc4xx_init(POWERPC_CPU_TYPE_NAME("405ep"),
+ &clk_setup[PPC405EP_CPU_CLK],
&tlb_clk_setup, sysclk);
env = &cpu->env;
clk_setup[PPC405EP_CPU_CLK].cb = tlb_clk_setup.cb;
diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
index 6d7f785..2e96389 100644
--- a/hw/ppc/ppc4xx_devs.c
+++ b/hw/ppc/ppc4xx_devs.c
@@ -48,7 +48,7 @@ static void ppc4xx_reset(void *opaque)
/*****************************************************************************/
/* Generic PowerPC 4xx processor instantiation */
-PowerPCCPU *ppc4xx_init(const char *cpu_model,
+PowerPCCPU *ppc4xx_init(const char *cpu_type,
clk_setup_t *cpu_clk, clk_setup_t *tb_clk,
uint32_t sysclk)
{
@@ -56,7 +56,7 @@ PowerPCCPU *ppc4xx_init(const char *cpu_model,
CPUPPCState *env;
/* init CPUs */
- cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
+ cpu = POWERPC_CPU(cpu_create(cpu_type));
env = &cpu->env;
cpu_clk->cb = NULL; /* We don't care about CPU clock frequency changes */
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 09/24] ppc: virtex-ml507: replace cpu_model with cpu_type
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (7 preceding siblings ...)
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 08/24] ppc: replace cpu_model with cpu_type on ref405ep, taihu boards Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 10/24] ppc: 40p/prep: " Igor Mammedov
` (15 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/virtex_ml507.c | 11 ++++-------
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index ed9b406..5ac4f76 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -89,14 +89,14 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env,
static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,
int do_init,
- const char *cpu_model,
+ const char *cpu_type,
uint32_t sysclk)
{
PowerPCCPU *cpu;
CPUPPCState *env;
qemu_irq *irqs;
- cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
+ cpu = POWERPC_CPU(cpu_create(cpu_type));
env = &cpu->env;
ppc_booke_timers_init(cpu, sysclk, 0/* no flags */);
@@ -211,11 +211,7 @@ static void virtex_init(MachineState *machine)
int i;
/* init CPUs */
- if (machine->cpu_model == NULL) {
- machine->cpu_model = "440-Xilinx";
- }
-
- cpu = ppc440_init_xilinx(&ram_size, 1, machine->cpu_model, 400000000);
+ cpu = ppc440_init_xilinx(&ram_size, 1, machine->cpu_type, 400000000);
env = &cpu->env;
if (env->mmu_model != POWERPC_MMU_BOOKE) {
@@ -307,6 +303,7 @@ static void virtex_machine_init(MachineClass *mc)
{
mc->desc = "Xilinx Virtex ML507 reference design";
mc->init = virtex_init;
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440-xilinx");
}
DEFINE_MACHINE("virtex-ml507", virtex_machine_init)
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 10/24] ppc: 40p/prep: replace cpu_model with cpu_type
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (8 preceding siblings ...)
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 09/24] ppc: virtex-ml507: replace cpu_model with cpu_type Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 11/24] ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model() Igor Mammedov
` (14 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/prep.c | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 94138a4..6f8accc 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -517,11 +517,8 @@ static void ppc_prep_init(MachineState *machine)
linux_boot = (kernel_filename != NULL);
/* init CPUs */
- if (machine->cpu_model == NULL)
- machine->cpu_model = "602";
for (i = 0; i < smp_cpus; i++) {
- cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
- machine->cpu_model));
+ cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
if (env->flags & POWERPC_FLAG_RTC_CLK) {
@@ -684,6 +681,7 @@ static void prep_machine_init(MachineClass *mc)
mc->block_default_type = IF_IDE;
mc->max_cpus = MAX_CPUS;
mc->default_boot_order = "cad";
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("602");
}
static int prep_set_cmos_checksum(DeviceState *dev, void *opaque)
@@ -718,10 +716,7 @@ static void ibm_40p_init(MachineState *machine)
char boot_device;
/* init CPU */
- if (!machine->cpu_model) {
- machine->cpu_model = "604";
- }
- cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model));
+ cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
error_report("only 6xx bus is supported on this machine");
@@ -894,6 +889,7 @@ static void ibm_40p_machine_init(MachineClass *mc)
mc->default_ram_size = 128 * M_BYTE;
mc->block_default_type = IF_SCSI;
mc->default_boot_order = "c";
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("604");
}
DEFINE_MACHINE("40p", ibm_40p_machine_init)
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 11/24] ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model()
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (9 preceding siblings ...)
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 10/24] ppc: 40p/prep: " Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 12/24] ppc: move '-cpu foo, compat=xxx' parsing into ppc_cpu_parse_featurestr() Igor Mammedov
` (13 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
ppc_cpu_parse_features() is doing practically the same thing as
generic cpu_parse_cpu_model(). So remove duplicated impl. and
reuse generic one.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
include/hw/ppc/ppc.h | 2 --
hw/ppc/ppc.c | 25 -------------------------
hw/ppc/spapr_cpu_core.c | 9 ++++-----
3 files changed, 4 insertions(+), 32 deletions(-)
diff --git a/include/hw/ppc/ppc.h b/include/hw/ppc/ppc.h
index 4e7fe11..ff0ac30 100644
--- a/include/hw/ppc/ppc.h
+++ b/include/hw/ppc/ppc.h
@@ -105,6 +105,4 @@ enum {
/* ppc_booke.c */
void ppc_booke_timers_init(PowerPCCPU *cpu, uint32_t freq, uint32_t flags);
-
-void ppc_cpu_parse_features(const char *cpu_model);
#endif
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index 05da316..7ec35de 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -1359,28 +1359,3 @@ void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val)
break;
}
}
-
-void ppc_cpu_parse_features(const char *cpu_model)
-{
- CPUClass *cc;
- ObjectClass *oc;
- const char *typename;
- gchar **model_pieces;
-
- model_pieces = g_strsplit(cpu_model, ",", 2);
- if (!model_pieces[0]) {
- error_report("Invalid/empty CPU model name");
- exit(1);
- }
-
- oc = cpu_class_by_name(TYPE_POWERPC_CPU, model_pieces[0]);
- if (oc == NULL) {
- error_report("Unable to find CPU definition: %s", model_pieces[0]);
- exit(1);
- }
-
- typename = object_class_get_name(oc);
- cc = CPU_CLASS(oc);
- cc->parse_features(typename, model_pieces[1], &error_fatal);
- g_strfreev(model_pieces);
-}
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 37beb56..79a9615 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -34,6 +34,7 @@ void spapr_cpu_parse_features(sPAPRMachineState *spapr)
* before passing it on to the cpu level parser.
*/
gchar **inpieces;
+ gchar *newprops;
int i, j;
gchar *compat_str = NULL;
@@ -58,17 +59,15 @@ void spapr_cpu_parse_features(sPAPRMachineState *spapr)
if (compat_str) {
char *val = compat_str + strlen("compat=");
- gchar *newprops = g_strjoinv(",", inpieces);
object_property_set_str(OBJECT(spapr), val, "max-cpu-compat",
&error_fatal);
- ppc_cpu_parse_features(newprops);
- g_free(newprops);
- } else {
- ppc_cpu_parse_features(MACHINE(spapr)->cpu_model);
}
+ newprops = g_strjoinv(",", inpieces);
+ cpu_parse_cpu_model(TYPE_POWERPC_CPU, newprops);
+ g_free(newprops);
g_strfreev(inpieces);
}
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 12/24] ppc: move '-cpu foo, compat=xxx' parsing into ppc_cpu_parse_featurestr()
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (10 preceding siblings ...)
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 11/24] ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model() Igor Mammedov
@ 2017-10-09 19:50 ` Igor Mammedov
2017-10-10 2:02 ` David Gibson
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 13/24] ppc: spapr: define core types statically Igor Mammedov
` (12 subsequent siblings)
24 siblings, 1 reply; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:50 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
there is a dedicated callback CPUClass::parse_features
which purpose is to convert -cpu features into a set of
global properties AND deal with compat/legacy features
that couldn't be directly translated into CPU's properties.
Create ppc variant of it (ppc_cpu_parse_featurestr) and
move 'compat=val' handling from spapr_cpu_core.c into it.
That removes a dependency of board/core code on cpu_model
parsing and would let to reuse common -cpu parsing
introduced by 6063d4c0
Set "max-cpu-compat" property only if it exists, in practice
it should limit 'compat' hack to spapr machine and allow
to avoid including machine/spapr headers in target/ppc/cpu.c
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
v2:
- set "max-cpu-compat" property only if it exists,
in practice it should limit 'compat' hack to spapr
and allow to avoid including machine/spapr headers
in target/ppc/cpu.c
- do compat= parsing only if machine."max-cpu-compat" exists
that would match what current code does.
- add newline before ppc_cpu_parse_featurestr() definition
---
include/hw/ppc/spapr.h | 1 -
target/ppc/cpu-qom.h | 1 +
hw/ppc/spapr.c | 2 +-
hw/ppc/spapr_cpu_core.c | 50 ---------------------------------------
target/ppc/translate_init.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
5 files changed, 59 insertions(+), 52 deletions(-)
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index c1b365f..8ca4f94 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -659,7 +659,6 @@ void spapr_hotplug_req_add_by_count_indexed(sPAPRDRConnectorType drc_type,
uint32_t count, uint32_t index);
void spapr_hotplug_req_remove_by_count_indexed(sPAPRDRConnectorType drc_type,
uint32_t count, uint32_t index);
-void spapr_cpu_parse_features(sPAPRMachineState *spapr);
int spapr_hpt_shift_for_ramsize(uint64_t ramsize);
void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
Error **errp);
diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
index d0cf6ca..429b47f 100644
--- a/target/ppc/cpu-qom.h
+++ b/target/ppc/cpu-qom.h
@@ -181,6 +181,7 @@ typedef struct PowerPCCPUClass {
DeviceRealize parent_realize;
DeviceUnrealize parent_unrealize;
void (*parent_reset)(CPUState *cpu);
+ void (*parent_parse_features)(const char *type, char *str, Error **errp);
uint32_t pvr;
bool (*pvr_match)(struct PowerPCCPUClass *pcc, uint32_t pvr);
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 1a2ca8a..c7a0310 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2373,7 +2373,7 @@ static void ppc_spapr_init(MachineState *machine)
machine->cpu_model = kvm_enabled() ? "host" : smc->tcg_default_cpu;
}
- spapr_cpu_parse_features(spapr);
+ cpu_parse_cpu_model(TYPE_POWERPC_CPU, machine->cpu_model);
spapr_set_vsmt_mode(spapr, &error_fatal);
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 79a9615..b6610dd 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -21,56 +21,6 @@
#include "sysemu/hw_accel.h"
#include "qemu/error-report.h"
-void spapr_cpu_parse_features(sPAPRMachineState *spapr)
-{
- /*
- * Backwards compatibility hack:
- *
- * CPUs had a "compat=" property which didn't make sense for
- * anything except pseries. It was replaced by "max-cpu-compat"
- * machine option. This supports old command lines like
- * -cpu POWER8,compat=power7
- * By stripping the compat option and applying it to the machine
- * before passing it on to the cpu level parser.
- */
- gchar **inpieces;
- gchar *newprops;
- int i, j;
- gchar *compat_str = NULL;
-
- inpieces = g_strsplit(MACHINE(spapr)->cpu_model, ",", 0);
-
- /* inpieces[0] is the actual model string */
- i = 1;
- j = 1;
- while (inpieces[i]) {
- if (g_str_has_prefix(inpieces[i], "compat=")) {
- /* in case of multiple compat= options */
- g_free(compat_str);
- compat_str = inpieces[i];
- } else {
- j++;
- }
-
- i++;
- /* Excise compat options from list */
- inpieces[j] = inpieces[i];
- }
-
- if (compat_str) {
- char *val = compat_str + strlen("compat=");
-
- object_property_set_str(OBJECT(spapr), val, "max-cpu-compat",
- &error_fatal);
-
- }
-
- newprops = g_strjoinv(",", inpieces);
- cpu_parse_cpu_model(TYPE_POWERPC_CPU, newprops);
- g_free(newprops);
- g_strfreev(inpieces);
-}
-
static void spapr_cpu_reset(void *opaque)
{
PowerPCCPU *cpu = opaque;
diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index 0d6379f..3d16481 100644
--- a/target/ppc/translate_init.c
+++ b/target/ppc/translate_init.c
@@ -10097,6 +10097,61 @@ static ObjectClass *ppc_cpu_class_by_name(const char *name)
return NULL;
}
+static void ppc_cpu_parse_featurestr(const char *type, char *features,
+ Error **errp)
+{
+ Object *machine = qdev_get_machine();
+ const PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(object_class_by_name(type));
+
+ if (!features) {
+ return;
+ }
+
+ if (object_property_find(machine, "max-cpu-compat", NULL)) {
+ int i;
+ char **inpieces;
+ char *s = features;
+ Error *local_err = NULL;
+ char *compat_str = NULL;
+
+ /*
+ * Backwards compatibility hack:
+ *
+ * CPUs had a "compat=" property which didn't make sense for
+ * anything except pseries. It was replaced by "max-cpu-compat"
+ * machine option. This supports old command lines like
+ * -cpu POWER8,compat=power7
+ * By stripping the compat option and applying it to the machine
+ * before passing it on to the cpu level parser.
+ */
+ inpieces = g_strsplit(features, ",", 0);
+ *s = '\0';
+ for (i = 0; inpieces[i]; i++) {
+ if (g_str_has_prefix(inpieces[i], "compat=")) {
+ compat_str = inpieces[i];
+ continue;
+ }
+ if ((i != 0) && (s != features)) {
+ s = g_stpcpy(s, ",");
+ }
+ s = g_stpcpy(s, inpieces[i]);
+ }
+
+ if (compat_str) {
+ char *v = compat_str + strlen("compat=");
+ object_property_set_str(machine, v, "max-cpu-compat", &local_err);
+ }
+ g_strfreev(inpieces);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
+ }
+
+ /* do property processing with generic handler */
+ pcc->parent_parse_features(type, features, errp);
+}
+
const char *ppc_cpu_lookup_alias(const char *alias)
{
int ai;
@@ -10489,6 +10544,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
cc->reset = ppc_cpu_reset;
cc->class_by_name = ppc_cpu_class_by_name;
+ pcc->parent_parse_features = cc->parse_features;
+ cc->parse_features = ppc_cpu_parse_featurestr;
cc->has_work = ppc_cpu_has_work;
cc->do_interrupt = ppc_cpu_do_interrupt;
cc->cpu_exec_interrupt = ppc_cpu_exec_interrupt;
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 12/24] ppc: move '-cpu foo, compat=xxx' parsing into ppc_cpu_parse_featurestr()
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 12/24] ppc: move '-cpu foo, compat=xxx' parsing into ppc_cpu_parse_featurestr() Igor Mammedov
@ 2017-10-10 2:02 ` David Gibson
0 siblings, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-10-10 2:02 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Alexander Graf, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
[-- Attachment #1: Type: text/plain, Size: 8281 bytes --]
On Mon, Oct 09, 2017 at 09:50:59PM +0200, Igor Mammedov wrote:
> there is a dedicated callback CPUClass::parse_features
> which purpose is to convert -cpu features into a set of
> global properties AND deal with compat/legacy features
> that couldn't be directly translated into CPU's properties.
>
> Create ppc variant of it (ppc_cpu_parse_featurestr) and
> move 'compat=val' handling from spapr_cpu_core.c into it.
> That removes a dependency of board/core code on cpu_model
> parsing and would let to reuse common -cpu parsing
> introduced by 6063d4c0
>
> Set "max-cpu-compat" property only if it exists, in practice
> it should limit 'compat' hack to spapr machine and allow
> to avoid including machine/spapr headers in target/ppc/cpu.c
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> v2:
> - set "max-cpu-compat" property only if it exists,
> in practice it should limit 'compat' hack to spapr
> and allow to avoid including machine/spapr headers
> in target/ppc/cpu.c
> - do compat= parsing only if machine."max-cpu-compat" exists
> that would match what current code does.
> - add newline before ppc_cpu_parse_featurestr() definition
> ---
> include/hw/ppc/spapr.h | 1 -
> target/ppc/cpu-qom.h | 1 +
> hw/ppc/spapr.c | 2 +-
> hw/ppc/spapr_cpu_core.c | 50 ---------------------------------------
> target/ppc/translate_init.c | 57 +++++++++++++++++++++++++++++++++++++++++++++
> 5 files changed, 59 insertions(+), 52 deletions(-)
>
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index c1b365f..8ca4f94 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -659,7 +659,6 @@ void spapr_hotplug_req_add_by_count_indexed(sPAPRDRConnectorType drc_type,
> uint32_t count, uint32_t index);
> void spapr_hotplug_req_remove_by_count_indexed(sPAPRDRConnectorType drc_type,
> uint32_t count, uint32_t index);
> -void spapr_cpu_parse_features(sPAPRMachineState *spapr);
> int spapr_hpt_shift_for_ramsize(uint64_t ramsize);
> void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
> Error **errp);
> diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
> index d0cf6ca..429b47f 100644
> --- a/target/ppc/cpu-qom.h
> +++ b/target/ppc/cpu-qom.h
> @@ -181,6 +181,7 @@ typedef struct PowerPCCPUClass {
> DeviceRealize parent_realize;
> DeviceUnrealize parent_unrealize;
> void (*parent_reset)(CPUState *cpu);
> + void (*parent_parse_features)(const char *type, char *str, Error **errp);
>
> uint32_t pvr;
> bool (*pvr_match)(struct PowerPCCPUClass *pcc, uint32_t pvr);
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 1a2ca8a..c7a0310 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -2373,7 +2373,7 @@ static void ppc_spapr_init(MachineState *machine)
> machine->cpu_model = kvm_enabled() ? "host" : smc->tcg_default_cpu;
> }
>
> - spapr_cpu_parse_features(spapr);
> + cpu_parse_cpu_model(TYPE_POWERPC_CPU, machine->cpu_model);
>
> spapr_set_vsmt_mode(spapr, &error_fatal);
>
> diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> index 79a9615..b6610dd 100644
> --- a/hw/ppc/spapr_cpu_core.c
> +++ b/hw/ppc/spapr_cpu_core.c
> @@ -21,56 +21,6 @@
> #include "sysemu/hw_accel.h"
> #include "qemu/error-report.h"
>
> -void spapr_cpu_parse_features(sPAPRMachineState *spapr)
> -{
> - /*
> - * Backwards compatibility hack:
> - *
> - * CPUs had a "compat=" property which didn't make sense for
> - * anything except pseries. It was replaced by "max-cpu-compat"
> - * machine option. This supports old command lines like
> - * -cpu POWER8,compat=power7
> - * By stripping the compat option and applying it to the machine
> - * before passing it on to the cpu level parser.
> - */
> - gchar **inpieces;
> - gchar *newprops;
> - int i, j;
> - gchar *compat_str = NULL;
> -
> - inpieces = g_strsplit(MACHINE(spapr)->cpu_model, ",", 0);
> -
> - /* inpieces[0] is the actual model string */
> - i = 1;
> - j = 1;
> - while (inpieces[i]) {
> - if (g_str_has_prefix(inpieces[i], "compat=")) {
> - /* in case of multiple compat= options */
> - g_free(compat_str);
> - compat_str = inpieces[i];
> - } else {
> - j++;
> - }
> -
> - i++;
> - /* Excise compat options from list */
> - inpieces[j] = inpieces[i];
> - }
> -
> - if (compat_str) {
> - char *val = compat_str + strlen("compat=");
> -
> - object_property_set_str(OBJECT(spapr), val, "max-cpu-compat",
> - &error_fatal);
> -
> - }
> -
> - newprops = g_strjoinv(",", inpieces);
> - cpu_parse_cpu_model(TYPE_POWERPC_CPU, newprops);
> - g_free(newprops);
> - g_strfreev(inpieces);
> -}
> -
> static void spapr_cpu_reset(void *opaque)
> {
> PowerPCCPU *cpu = opaque;
> diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> index 0d6379f..3d16481 100644
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -10097,6 +10097,61 @@ static ObjectClass *ppc_cpu_class_by_name(const char *name)
> return NULL;
> }
>
> +static void ppc_cpu_parse_featurestr(const char *type, char *features,
> + Error **errp)
> +{
> + Object *machine = qdev_get_machine();
> + const PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(object_class_by_name(type));
> +
> + if (!features) {
> + return;
> + }
> +
> + if (object_property_find(machine, "max-cpu-compat", NULL)) {
> + int i;
> + char **inpieces;
> + char *s = features;
> + Error *local_err = NULL;
> + char *compat_str = NULL;
> +
> + /*
> + * Backwards compatibility hack:
> + *
> + * CPUs had a "compat=" property which didn't make sense for
> + * anything except pseries. It was replaced by "max-cpu-compat"
> + * machine option. This supports old command lines like
> + * -cpu POWER8,compat=power7
> + * By stripping the compat option and applying it to the machine
> + * before passing it on to the cpu level parser.
> + */
> + inpieces = g_strsplit(features, ",", 0);
> + *s = '\0';
> + for (i = 0; inpieces[i]; i++) {
> + if (g_str_has_prefix(inpieces[i], "compat=")) {
> + compat_str = inpieces[i];
> + continue;
> + }
> + if ((i != 0) && (s != features)) {
> + s = g_stpcpy(s, ",");
> + }
> + s = g_stpcpy(s, inpieces[i]);
> + }
> +
> + if (compat_str) {
> + char *v = compat_str + strlen("compat=");
> + object_property_set_str(machine, v, "max-cpu-compat", &local_err);
> + }
> + g_strfreev(inpieces);
> + if (local_err) {
> + error_propagate(errp, local_err);
> + return;
> + }
> + }
> +
> + /* do property processing with generic handler */
> + pcc->parent_parse_features(type, features, errp);
> +}
> +
> const char *ppc_cpu_lookup_alias(const char *alias)
> {
> int ai;
> @@ -10489,6 +10544,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
> cc->reset = ppc_cpu_reset;
>
> cc->class_by_name = ppc_cpu_class_by_name;
> + pcc->parent_parse_features = cc->parse_features;
> + cc->parse_features = ppc_cpu_parse_featurestr;
> cc->has_work = ppc_cpu_has_work;
> cc->do_interrupt = ppc_cpu_do_interrupt;
> cc->cpu_exec_interrupt = ppc_cpu_exec_interrupt;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 47+ messages in thread
* [Qemu-devel] [PATCH v2 13/24] ppc: spapr: define core types statically
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (11 preceding siblings ...)
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 12/24] ppc: move '-cpu foo, compat=xxx' parsing into ppc_cpu_parse_featurestr() Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-10 2:04 ` David Gibson
` (2 more replies)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 14/24] ppc: spapr: use cpu type name directly Igor Mammedov
` (11 subsequent siblings)
24 siblings, 3 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
spapr core type definition doesn't have any fields that
require it to be defined at runtime. So replace code
that fills in TypeInfo at runtime with static TypeInfo
array that does the same at complie time.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
v2:
- fix rebase conflict: add newly added power9_v2 core
---
include/hw/ppc/spapr_cpu_core.h | 2 +
hw/ppc/spapr_cpu_core.c | 87 +++++++++++++----------------------------
2 files changed, 30 insertions(+), 59 deletions(-)
diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
index 93051e9..66dcf52 100644
--- a/include/hw/ppc/spapr_cpu_core.h
+++ b/include/hw/ppc/spapr_cpu_core.h
@@ -21,6 +21,8 @@
#define SPAPR_CPU_CORE_GET_CLASS(obj) \
OBJECT_GET_CLASS(sPAPRCPUCoreClass, (obj), TYPE_SPAPR_CPU_CORE)
+#define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE
+
typedef struct sPAPRCPUCore {
/*< private >*/
CPUCore parent_obj;
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index b6610dd..550d320 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -217,37 +217,6 @@ err:
error_propagate(errp, local_err);
}
-static const char *spapr_core_models[] = {
- /* 970 */
- "970_v2.2",
-
- /* 970MP variants */
- "970mp_v1.0",
- "970mp_v1.1",
-
- /* POWER5+ */
- "power5+_v2.1",
-
- /* POWER7 */
- "power7_v2.3",
-
- /* POWER7+ */
- "power7+_v2.1",
-
- /* POWER8 */
- "power8_v2.0",
-
- /* POWER8E */
- "power8e_v2.1",
-
- /* POWER8NVL */
- "power8nvl_v1.0",
-
- /* POWER9 */
- "power9_v1.0",
- "power9_v2.0",
-};
-
static Property spapr_cpu_core_properties[] = {
DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
DEFINE_PROP_END_OF_LIST()
@@ -265,33 +234,33 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
g_assert(scc->cpu_class);
}
-static const TypeInfo spapr_cpu_core_type_info = {
- .name = TYPE_SPAPR_CPU_CORE,
- .parent = TYPE_CPU_CORE,
- .abstract = true,
- .instance_size = sizeof(sPAPRCPUCore),
- .class_size = sizeof(sPAPRCPUCoreClass),
-};
-
-static void spapr_cpu_core_register_types(void)
-{
- int i;
-
- type_register_static(&spapr_cpu_core_type_info);
-
- for (i = 0; i < ARRAY_SIZE(spapr_core_models); i++) {
- TypeInfo type_info = {
- .parent = TYPE_SPAPR_CPU_CORE,
- .instance_size = sizeof(sPAPRCPUCore),
- .class_init = spapr_cpu_core_class_init,
- .class_data = (void *) spapr_core_models[i],
- };
-
- type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE,
- spapr_core_models[i]);
- type_register(&type_info);
- g_free((void *)type_info.name);
+#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
+ { \
+ .parent = TYPE_SPAPR_CPU_CORE, \
+ .class_data = (void *) cpu_model, \
+ .class_init = spapr_cpu_core_class_init, \
+ .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
}
-}
-type_init(spapr_cpu_core_register_types)
+static const TypeInfo spapr_cpu_core_type_infos[] = {
+ {
+ .name = TYPE_SPAPR_CPU_CORE,
+ .parent = TYPE_CPU_CORE,
+ .abstract = true,
+ .instance_size = sizeof(sPAPRCPUCore),
+ .class_size = sizeof(sPAPRCPUCoreClass),
+ },
+ DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
+};
+
+DEFINE_TYPES(spapr_cpu_core_type_infos)
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 13/24] ppc: spapr: define core types statically
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 13/24] ppc: spapr: define core types statically Igor Mammedov
@ 2017-10-10 2:04 ` David Gibson
2017-10-10 7:29 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2017-10-11 17:21 ` [Qemu-devel] " Philippe Mathieu-Daudé
2 siblings, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-10-10 2:04 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Alexander Graf, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
[-- Attachment #1: Type: text/plain, Size: 4761 bytes --]
On Mon, Oct 09, 2017 at 09:51:00PM +0200, Igor Mammedov wrote:
> spapr core type definition doesn't have any fields that
> require it to be defined at runtime. So replace code
> that fills in TypeInfo at runtime with static TypeInfo
> array that does the same at complie time.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> v2:
> - fix rebase conflict: add newly added power9_v2 core
> ---
> include/hw/ppc/spapr_cpu_core.h | 2 +
> hw/ppc/spapr_cpu_core.c | 87 +++++++++++++----------------------------
> 2 files changed, 30 insertions(+), 59 deletions(-)
>
> diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
> index 93051e9..66dcf52 100644
> --- a/include/hw/ppc/spapr_cpu_core.h
> +++ b/include/hw/ppc/spapr_cpu_core.h
> @@ -21,6 +21,8 @@
> #define SPAPR_CPU_CORE_GET_CLASS(obj) \
> OBJECT_GET_CLASS(sPAPRCPUCoreClass, (obj), TYPE_SPAPR_CPU_CORE)
>
> +#define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE
> +
> typedef struct sPAPRCPUCore {
> /*< private >*/
> CPUCore parent_obj;
> diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> index b6610dd..550d320 100644
> --- a/hw/ppc/spapr_cpu_core.c
> +++ b/hw/ppc/spapr_cpu_core.c
> @@ -217,37 +217,6 @@ err:
> error_propagate(errp, local_err);
> }
>
> -static const char *spapr_core_models[] = {
> - /* 970 */
> - "970_v2.2",
> -
> - /* 970MP variants */
> - "970mp_v1.0",
> - "970mp_v1.1",
> -
> - /* POWER5+ */
> - "power5+_v2.1",
> -
> - /* POWER7 */
> - "power7_v2.3",
> -
> - /* POWER7+ */
> - "power7+_v2.1",
> -
> - /* POWER8 */
> - "power8_v2.0",
> -
> - /* POWER8E */
> - "power8e_v2.1",
> -
> - /* POWER8NVL */
> - "power8nvl_v1.0",
> -
> - /* POWER9 */
> - "power9_v1.0",
> - "power9_v2.0",
> -};
> -
> static Property spapr_cpu_core_properties[] = {
> DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
> DEFINE_PROP_END_OF_LIST()
> @@ -265,33 +234,33 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
> g_assert(scc->cpu_class);
> }
>
> -static const TypeInfo spapr_cpu_core_type_info = {
> - .name = TYPE_SPAPR_CPU_CORE,
> - .parent = TYPE_CPU_CORE,
> - .abstract = true,
> - .instance_size = sizeof(sPAPRCPUCore),
> - .class_size = sizeof(sPAPRCPUCoreClass),
> -};
> -
> -static void spapr_cpu_core_register_types(void)
> -{
> - int i;
> -
> - type_register_static(&spapr_cpu_core_type_info);
> -
> - for (i = 0; i < ARRAY_SIZE(spapr_core_models); i++) {
> - TypeInfo type_info = {
> - .parent = TYPE_SPAPR_CPU_CORE,
> - .instance_size = sizeof(sPAPRCPUCore),
> - .class_init = spapr_cpu_core_class_init,
> - .class_data = (void *) spapr_core_models[i],
> - };
> -
> - type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE,
> - spapr_core_models[i]);
> - type_register(&type_info);
> - g_free((void *)type_info.name);
> +#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
> + { \
> + .parent = TYPE_SPAPR_CPU_CORE, \
> + .class_data = (void *) cpu_model, \
> + .class_init = spapr_cpu_core_class_init, \
> + .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
> }
> -}
>
> -type_init(spapr_cpu_core_register_types)
> +static const TypeInfo spapr_cpu_core_type_infos[] = {
> + {
> + .name = TYPE_SPAPR_CPU_CORE,
> + .parent = TYPE_CPU_CORE,
> + .abstract = true,
> + .instance_size = sizeof(sPAPRCPUCore),
> + .class_size = sizeof(sPAPRCPUCoreClass),
> + },
> + DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
> +};
> +
> +DEFINE_TYPES(spapr_cpu_core_type_infos)
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 13/24] ppc: spapr: define core types statically
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 13/24] ppc: spapr: define core types statically Igor Mammedov
2017-10-10 2:04 ` David Gibson
@ 2017-10-10 7:29 ` Greg Kurz
2017-10-12 13:10 ` Greg Kurz
2017-10-11 17:21 ` [Qemu-devel] " Philippe Mathieu-Daudé
2 siblings, 1 reply; 47+ messages in thread
From: Greg Kurz @ 2017-10-10 7:29 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, open list:ppce500, Hervé Poussineau,
David Gibson
On Mon, 9 Oct 2017 21:51:00 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> spapr core type definition doesn't have any fields that
> require it to be defined at runtime. So replace code
> that fills in TypeInfo at runtime with static TypeInfo
> array that does the same at complie time.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> ---
> v2:
> - fix rebase conflict: add newly added power9_v2 core
> ---
Reviewed-by: Greg Kurz <groug@kaod.org>
> include/hw/ppc/spapr_cpu_core.h | 2 +
> hw/ppc/spapr_cpu_core.c | 87 +++++++++++++----------------------------
> 2 files changed, 30 insertions(+), 59 deletions(-)
>
> diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
> index 93051e9..66dcf52 100644
> --- a/include/hw/ppc/spapr_cpu_core.h
> +++ b/include/hw/ppc/spapr_cpu_core.h
> @@ -21,6 +21,8 @@
> #define SPAPR_CPU_CORE_GET_CLASS(obj) \
> OBJECT_GET_CLASS(sPAPRCPUCoreClass, (obj), TYPE_SPAPR_CPU_CORE)
>
> +#define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE
> +
> typedef struct sPAPRCPUCore {
> /*< private >*/
> CPUCore parent_obj;
> diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> index b6610dd..550d320 100644
> --- a/hw/ppc/spapr_cpu_core.c
> +++ b/hw/ppc/spapr_cpu_core.c
> @@ -217,37 +217,6 @@ err:
> error_propagate(errp, local_err);
> }
>
> -static const char *spapr_core_models[] = {
> - /* 970 */
> - "970_v2.2",
> -
> - /* 970MP variants */
> - "970mp_v1.0",
> - "970mp_v1.1",
> -
> - /* POWER5+ */
> - "power5+_v2.1",
> -
> - /* POWER7 */
> - "power7_v2.3",
> -
> - /* POWER7+ */
> - "power7+_v2.1",
> -
> - /* POWER8 */
> - "power8_v2.0",
> -
> - /* POWER8E */
> - "power8e_v2.1",
> -
> - /* POWER8NVL */
> - "power8nvl_v1.0",
> -
> - /* POWER9 */
> - "power9_v1.0",
> - "power9_v2.0",
> -};
> -
> static Property spapr_cpu_core_properties[] = {
> DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
> DEFINE_PROP_END_OF_LIST()
> @@ -265,33 +234,33 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
> g_assert(scc->cpu_class);
> }
>
> -static const TypeInfo spapr_cpu_core_type_info = {
> - .name = TYPE_SPAPR_CPU_CORE,
> - .parent = TYPE_CPU_CORE,
> - .abstract = true,
> - .instance_size = sizeof(sPAPRCPUCore),
> - .class_size = sizeof(sPAPRCPUCoreClass),
> -};
> -
> -static void spapr_cpu_core_register_types(void)
> -{
> - int i;
> -
> - type_register_static(&spapr_cpu_core_type_info);
> -
> - for (i = 0; i < ARRAY_SIZE(spapr_core_models); i++) {
> - TypeInfo type_info = {
> - .parent = TYPE_SPAPR_CPU_CORE,
> - .instance_size = sizeof(sPAPRCPUCore),
> - .class_init = spapr_cpu_core_class_init,
> - .class_data = (void *) spapr_core_models[i],
> - };
> -
> - type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE,
> - spapr_core_models[i]);
> - type_register(&type_info);
> - g_free((void *)type_info.name);
> +#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
> + { \
> + .parent = TYPE_SPAPR_CPU_CORE, \
> + .class_data = (void *) cpu_model, \
> + .class_init = spapr_cpu_core_class_init, \
> + .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
> }
> -}
>
> -type_init(spapr_cpu_core_register_types)
> +static const TypeInfo spapr_cpu_core_type_infos[] = {
> + {
> + .name = TYPE_SPAPR_CPU_CORE,
> + .parent = TYPE_CPU_CORE,
> + .abstract = true,
> + .instance_size = sizeof(sPAPRCPUCore),
> + .class_size = sizeof(sPAPRCPUCoreClass),
> + },
> + DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
> +};
> +
> +DEFINE_TYPES(spapr_cpu_core_type_infos)
^ permalink raw reply [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 13/24] ppc: spapr: define core types statically
2017-10-10 7:29 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
@ 2017-10-12 13:10 ` Greg Kurz
2017-10-12 14:58 ` Igor Mammedov
0 siblings, 1 reply; 47+ messages in thread
From: Greg Kurz @ 2017-10-12 13:10 UTC (permalink / raw)
To: Igor Mammedov
Cc: Hervé Poussineau, open list:ppce500, qemu-devel,
David Gibson
On Tue, 10 Oct 2017 09:29:46 +0200
Greg Kurz <groug@kaod.org> wrote:
> On Mon, 9 Oct 2017 21:51:00 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
>
> > spapr core type definition doesn't have any fields that
> > require it to be defined at runtime. So replace code
> > that fills in TypeInfo at runtime with static TypeInfo
> > array that does the same at complie time.
> >
> > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > ---
> > v2:
> > - fix rebase conflict: add newly added power9_v2 core
> > ---
>
> Reviewed-by: Greg Kurz <groug@kaod.org>
>
Oops, this patch causes a regression when you try to pass a sPAPR core to
a non-pseries machine.
Without this patch:
$ ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
qemu-system-ppc64: -device host-spapr-cpu-core:
'host-spapr-cpu-core' is not a valid device model name
With this patch:
$ ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
**
ERROR:qom/object.c:217:object_type_get_instance_size:
assertion failed: (type != NULL)
Aborted
#0 0x00007ffff760eff0 in raise () from /lib64/libc.so.6
#1 0x00007ffff761136c in abort () from /lib64/libc.so.6
#2 0x00007ffff78caa04 in g_assertion_message () from /lib64/libglib-2.0.so.0
#3 0x00007ffff78cab0c in g_assertion_message_expr () from /lib64/libglib-2.0.so.0
#4 0x00000000106abaac in object_type_get_instance_size (typename=0x108a3ac0 "host-powerpc64-cpu") at qom/object.c:217
#5 0x00000000101bb018 in spapr_cpu_core_realize (dev=0x111bcc10, errp=0x7fffffffe730) at hw/ppc/spapr_cpu_core.c:154
#6 0x000000001043e8b4 in device_set_realized (obj=0x111bcc10, value=true, errp=0x7fffffffe9f0) at hw/core/qdev.c:914
#7 0x00000000106b1390 in property_set_bool (obj=0x111bcc10, v=0x111c16a0, name=0x108cd520 "realized", opaque=0x111bcb60, errp=0x7fffffffe9f0) at qom/object.c:1906
#8 0x00000000106aeab8 in object_property_set (obj=0x111bcc10, v=0x111c16a0, name=0x108cd520 "realized", errp=0x7fffffffe9f0) at qom/object.c:1102
#9 0x00000000106b3068 in object_property_set_qobject (obj=0x111bcc10, value=0x111c1660, name=0x108cd520 "realized", errp=0x7fffffffe9f0) at qom/qom-qobject.c:27
#10 0x00000000106aee5c in object_property_set_bool (obj=0x111bcc10, value=true, name=0x108cd520 "realized", errp=0x7fffffffe9f0) at qom/object.c:1171
#11 0x000000001036b8cc in qdev_device_add (opts=0x110f4b30, errp=0x7fffffffea78) at qdev-monitor.c:630
#12 0x0000000010378e40 in device_init_func (opaque=0x0, opts=0x110f4b30, errp=0x0) at vl.c:2432
#13 0x0000000010850464 in qemu_opts_foreach (list=0x10abbaa8 <qemu_device_opts>, func=0x10378df4 <device_init_func>, opaque=0x0, errp=0x0) at util/qemu-option.c:1104
#14 0x000000001037fe0c in main (argc=5, argv=0x7ffffffff298, envp=0x7ffffffff2c8) at vl.c:4767
We're crashing because the host CPU type wasn't registered... Before, we would
gently fail to add the CPU core because its type wouldn't be registered either.
There's a strong correlation between the CPU type and CPU core type. I don't
believe we can handle this cleanly in the sPAPR code.
So I only see two options here: either drop this patch, or find a way to register
the host CPU type at QOM init time as well. It would be really unfortunate to bury
Igor's cleanup... I'd rather go forward so I started looking at the latter.
As explained in another mail recently, we cannot rely on the object class hierarchy
to do that since object_class_get_list() cannot be safely called during the QOM init
phase. It really needs all the parent types to be registered, because it will try
to initialize them at some point (look for type_initialize in qom/object.c).
https://lists.nongnu.org/archive/html/qemu-ppc/2017-09/msg00794.html
But since we only need CPU model names to register CPU types, building a PVR<->CPU model
table in the PPC code seem to be enough. Some more tweaking in the POWERPC_FAMILY() magic
is also needed to support migration on heterogeneous-but-compatible HW (eg, POWER8 <->
POWER8E).
I think that this patch should be reverted from David's staging tree for now, I'll
repost it when I have a proposal for the host CPU.
Cheers,
--
Greg
> > include/hw/ppc/spapr_cpu_core.h | 2 +
> > hw/ppc/spapr_cpu_core.c | 87 +++++++++++++----------------------------
> > 2 files changed, 30 insertions(+), 59 deletions(-)
> >
> > diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
> > index 93051e9..66dcf52 100644
> > --- a/include/hw/ppc/spapr_cpu_core.h
> > +++ b/include/hw/ppc/spapr_cpu_core.h
> > @@ -21,6 +21,8 @@
> > #define SPAPR_CPU_CORE_GET_CLASS(obj) \
> > OBJECT_GET_CLASS(sPAPRCPUCoreClass, (obj), TYPE_SPAPR_CPU_CORE)
> >
> > +#define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE
> > +
> > typedef struct sPAPRCPUCore {
> > /*< private >*/
> > CPUCore parent_obj;
> > diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> > index b6610dd..550d320 100644
> > --- a/hw/ppc/spapr_cpu_core.c
> > +++ b/hw/ppc/spapr_cpu_core.c
> > @@ -217,37 +217,6 @@ err:
> > error_propagate(errp, local_err);
> > }
> >
> > -static const char *spapr_core_models[] = {
> > - /* 970 */
> > - "970_v2.2",
> > -
> > - /* 970MP variants */
> > - "970mp_v1.0",
> > - "970mp_v1.1",
> > -
> > - /* POWER5+ */
> > - "power5+_v2.1",
> > -
> > - /* POWER7 */
> > - "power7_v2.3",
> > -
> > - /* POWER7+ */
> > - "power7+_v2.1",
> > -
> > - /* POWER8 */
> > - "power8_v2.0",
> > -
> > - /* POWER8E */
> > - "power8e_v2.1",
> > -
> > - /* POWER8NVL */
> > - "power8nvl_v1.0",
> > -
> > - /* POWER9 */
> > - "power9_v1.0",
> > - "power9_v2.0",
> > -};
> > -
> > static Property spapr_cpu_core_properties[] = {
> > DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
> > DEFINE_PROP_END_OF_LIST()
> > @@ -265,33 +234,33 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
> > g_assert(scc->cpu_class);
> > }
> >
> > -static const TypeInfo spapr_cpu_core_type_info = {
> > - .name = TYPE_SPAPR_CPU_CORE,
> > - .parent = TYPE_CPU_CORE,
> > - .abstract = true,
> > - .instance_size = sizeof(sPAPRCPUCore),
> > - .class_size = sizeof(sPAPRCPUCoreClass),
> > -};
> > -
> > -static void spapr_cpu_core_register_types(void)
> > -{
> > - int i;
> > -
> > - type_register_static(&spapr_cpu_core_type_info);
> > -
> > - for (i = 0; i < ARRAY_SIZE(spapr_core_models); i++) {
> > - TypeInfo type_info = {
> > - .parent = TYPE_SPAPR_CPU_CORE,
> > - .instance_size = sizeof(sPAPRCPUCore),
> > - .class_init = spapr_cpu_core_class_init,
> > - .class_data = (void *) spapr_core_models[i],
> > - };
> > -
> > - type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE,
> > - spapr_core_models[i]);
> > - type_register(&type_info);
> > - g_free((void *)type_info.name);
> > +#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
> > + { \
> > + .parent = TYPE_SPAPR_CPU_CORE, \587
> > + .class_data = (void *) cpu_model, \
> > + .class_init = spapr_cpu_core_class_init, \
> > + .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
> > }
> > -}
> >
> > -type_init(spapr_cpu_core_register_types)
> > +static const TypeInfo spapr_cpu_core_type_infos[] = {
> > + {
> > + .name = TYPE_SPAPR_CPU_CORE,
> > + .parent = TYPE_CPU_CORE,
> > + .abstract = true,
> > + .instance_size = sizeof(sPAPRCPUCore),
> > + .class_size = sizeof(sPAPRCPUCoreClass),
> > + },
> > + DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
> > + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
> > + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
> > + DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
> > + DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
> > + DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
> > + DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
> > + DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
> > + DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
> > + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
> > + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
> > +};
> > +
> > +DEFINE_TYPES(spapr_cpu_core_type_infos)
>
>
^ permalink raw reply [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 13/24] ppc: spapr: define core types statically
2017-10-12 13:10 ` Greg Kurz
@ 2017-10-12 14:58 ` Igor Mammedov
2017-10-12 15:20 ` Greg Kurz
0 siblings, 1 reply; 47+ messages in thread
From: Igor Mammedov @ 2017-10-12 14:58 UTC (permalink / raw)
To: Greg Kurz
Cc: Hervé Poussineau, open list:ppce500, qemu-devel,
David Gibson
On Thu, 12 Oct 2017 15:10:30 +0200
Greg Kurz <groug@kaod.org> wrote:
> On Tue, 10 Oct 2017 09:29:46 +0200
> Greg Kurz <groug@kaod.org> wrote:
>
> > On Mon, 9 Oct 2017 21:51:00 +0200
> > Igor Mammedov <imammedo@redhat.com> wrote:
> >
> > > spapr core type definition doesn't have any fields that
> > > require it to be defined at runtime. So replace code
> > > that fills in TypeInfo at runtime with static TypeInfo
> > > array that does the same at complie time.
> > >
> > > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > > ---
> > > v2:
> > > - fix rebase conflict: add newly added power9_v2 core
> > > ---
> >
> > Reviewed-by: Greg Kurz <groug@kaod.org>
> >
>
> Oops, this patch causes a regression when you try to pass a sPAPR core to
> a non-pseries machine.
>
> Without this patch:
>
> $ ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
> qemu-system-ppc64: -device host-spapr-cpu-core:
> 'host-spapr-cpu-core' is not a valid device model name
>
> With this patch:
>
> $ ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
> **
> ERROR:qom/object.c:217:object_type_get_instance_size:
> assertion failed: (type != NULL)
> Aborted
there shouldn't be type host-spapr-cpu-core with this patch since you don't have -enable-kvm on CLI
maybe you are talking about
[PATCH v2 15/24] ppc: spapr: register 'host' core type along with the rest of core types
[...]
> I think that this patch should be reverted from David's staging tree for now, I'll
> repost it when I have a proposal for the host CPU.
let me find ppc host and look into it before reverting,
maybe there is easier way around this 'very corner' case.
>
> Cheers,
>
> --
> Greg
>
> > > include/hw/ppc/spapr_cpu_core.h | 2 +
> > > hw/ppc/spapr_cpu_core.c | 87 +++++++++++++----------------------------
> > > 2 files changed, 30 insertions(+), 59 deletions(-)
> > >
> > > diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
> > > index 93051e9..66dcf52 100644
> > > --- a/include/hw/ppc/spapr_cpu_core.h
> > > +++ b/include/hw/ppc/spapr_cpu_core.h
> > > @@ -21,6 +21,8 @@
> > > #define SPAPR_CPU_CORE_GET_CLASS(obj) \
> > > OBJECT_GET_CLASS(sPAPRCPUCoreClass, (obj), TYPE_SPAPR_CPU_CORE)
> > >
> > > +#define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE
> > > +
> > > typedef struct sPAPRCPUCore {
> > > /*< private >*/
> > > CPUCore parent_obj;
> > > diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> > > index b6610dd..550d320 100644
> > > --- a/hw/ppc/spapr_cpu_core.c
> > > +++ b/hw/ppc/spapr_cpu_core.c
> > > @@ -217,37 +217,6 @@ err:
> > > error_propagate(errp, local_err);
> > > }
> > >
> > > -static const char *spapr_core_models[] = {
> > > - /* 970 */
> > > - "970_v2.2",
> > > -
> > > - /* 970MP variants */
> > > - "970mp_v1.0",
> > > - "970mp_v1.1",
> > > -
> > > - /* POWER5+ */
> > > - "power5+_v2.1",
> > > -
> > > - /* POWER7 */
> > > - "power7_v2.3",
> > > -
> > > - /* POWER7+ */
> > > - "power7+_v2.1",
> > > -
> > > - /* POWER8 */
> > > - "power8_v2.0",
> > > -
> > > - /* POWER8E */
> > > - "power8e_v2.1",
> > > -
> > > - /* POWER8NVL */
> > > - "power8nvl_v1.0",
> > > -
> > > - /* POWER9 */
> > > - "power9_v1.0",
> > > - "power9_v2.0",
> > > -};
> > > -
> > > static Property spapr_cpu_core_properties[] = {
> > > DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
> > > DEFINE_PROP_END_OF_LIST()
> > > @@ -265,33 +234,33 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
> > > g_assert(scc->cpu_class);
> > > }
> > >
> > > -static const TypeInfo spapr_cpu_core_type_info = {
> > > - .name = TYPE_SPAPR_CPU_CORE,
> > > - .parent = TYPE_CPU_CORE,
> > > - .abstract = true,
> > > - .instance_size = sizeof(sPAPRCPUCore),
> > > - .class_size = sizeof(sPAPRCPUCoreClass),
> > > -};
> > > -
> > > -static void spapr_cpu_core_register_types(void)
> > > -{
> > > - int i;
> > > -
> > > - type_register_static(&spapr_cpu_core_type_info);
> > > -
> > > - for (i = 0; i < ARRAY_SIZE(spapr_core_models); i++) {
> > > - TypeInfo type_info = {
> > > - .parent = TYPE_SPAPR_CPU_CORE,
> > > - .instance_size = sizeof(sPAPRCPUCore),
> > > - .class_init = spapr_cpu_core_class_init,
> > > - .class_data = (void *) spapr_core_models[i],
> > > - };
> > > -
> > > - type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE,
> > > - spapr_core_models[i]);
> > > - type_register(&type_info);
> > > - g_free((void *)type_info.name);
> > > +#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
> > > + { \
> > > + .parent = TYPE_SPAPR_CPU_CORE, \587
> > > + .class_data = (void *) cpu_model, \
> > > + .class_init = spapr_cpu_core_class_init, \
> > > + .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
> > > }
> > > -}
> > >
> > > -type_init(spapr_cpu_core_register_types)
> > > +static const TypeInfo spapr_cpu_core_type_infos[] = {
> > > + {
> > > + .name = TYPE_SPAPR_CPU_CORE,
> > > + .parent = TYPE_CPU_CORE,
> > > + .abstract = true,
> > > + .instance_size = sizeof(sPAPRCPUCore),
> > > + .class_size = sizeof(sPAPRCPUCoreClass),
> > > + },
> > > + DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
> > > + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
> > > + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
> > > + DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
> > > + DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
> > > + DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
> > > + DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
> > > + DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
> > > + DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
> > > + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
> > > + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
> > > +};
> > > +
> > > +DEFINE_TYPES(spapr_cpu_core_type_infos)
> >
> >
>
^ permalink raw reply [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 13/24] ppc: spapr: define core types statically
2017-10-12 14:58 ` Igor Mammedov
@ 2017-10-12 15:20 ` Greg Kurz
2017-10-12 16:01 ` Igor Mammedov
0 siblings, 1 reply; 47+ messages in thread
From: Greg Kurz @ 2017-10-12 15:20 UTC (permalink / raw)
To: Igor Mammedov
Cc: Hervé Poussineau, open list:ppce500, qemu-devel,
David Gibson
On Thu, 12 Oct 2017 16:58:39 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> On Thu, 12 Oct 2017 15:10:30 +0200
> Greg Kurz <groug@kaod.org> wrote:
>
> > On Tue, 10 Oct 2017 09:29:46 +0200
> > Greg Kurz <groug@kaod.org> wrote:
> >
> > > On Mon, 9 Oct 2017 21:51:00 +0200
> > > Igor Mammedov <imammedo@redhat.com> wrote:
> > >
> > > > spapr core type definition doesn't have any fields that
> > > > require it to be defined at runtime. So replace code
> > > > that fills in TypeInfo at runtime with static TypeInfo
> > > > array that does the same at complie time.
> > > >
> > > > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > > > ---
> > > > v2:
> > > > - fix rebase conflict: add newly added power9_v2 core
> > > > ---
> > >
> > > Reviewed-by: Greg Kurz <groug@kaod.org>
> > >
> >
> > Oops, this patch causes a regression when you try to pass a sPAPR core to
> > a non-pseries machine.
> >
> > Without this patch:
> >
> > $ ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
> > qemu-system-ppc64: -device host-spapr-cpu-core:
> > 'host-spapr-cpu-core' is not a valid device model name
> >
> > With this patch:
> >
> > $ ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
> > **
> > ERROR:qom/object.c:217:object_type_get_instance_size:
> > assertion failed: (type != NULL)
> > Aborted
> there shouldn't be type host-spapr-cpu-core with this patch since you don't have -enable-kvm on CLI
> maybe you are talking about
> [PATCH v2 15/24] ppc: spapr: register 'host' core type along with the rest of core types
>
Oops you're right, I replied to the wrong mail... of course, I meant the
following commit in David's staging tree:
https://github.com/dgibson/qemu/commit/c18165144076cef0c17206f5231cf9787c944037
>
> [...]
>
>
> > I think that this patch should be reverted from David's staging tree for now, I'll
> > repost it when I have a proposal for the host CPU.
> let me find ppc host and look into it before reverting,
> maybe there is easier way around this 'very corner' case.
>
Matter of personal opinion. It's not my call anyway :)
>
> >
> > Cheers,
> >
> > --
> > Greg
> >
> > > > include/hw/ppc/spapr_cpu_core.h | 2 +
> > > > hw/ppc/spapr_cpu_core.c | 87 +++++++++++++----------------------------
> > > > 2 files changed, 30 insertions(+), 59 deletions(-)
> > > >
> > > > diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
> > > > index 93051e9..66dcf52 100644
> > > > --- a/include/hw/ppc/spapr_cpu_core.h
> > > > +++ b/include/hw/ppc/spapr_cpu_core.h
> > > > @@ -21,6 +21,8 @@
> > > > #define SPAPR_CPU_CORE_GET_CLASS(obj) \
> > > > OBJECT_GET_CLASS(sPAPRCPUCoreClass, (obj), TYPE_SPAPR_CPU_CORE)
> > > >
> > > > +#define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE
> > > > +
> > > > typedef struct sPAPRCPUCore {
> > > > /*< private >*/
> > > > CPUCore parent_obj;
> > > > diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> > > > index b6610dd..550d320 100644
> > > > --- a/hw/ppc/spapr_cpu_core.c
> > > > +++ b/hw/ppc/spapr_cpu_core.c
> > > > @@ -217,37 +217,6 @@ err:
> > > > error_propagate(errp, local_err);
> > > > }
> > > >
> > > > -static const char *spapr_core_models[] = {
> > > > - /* 970 */
> > > > - "970_v2.2",
> > > > -
> > > > - /* 970MP variants */
> > > > - "970mp_v1.0",
> > > > - "970mp_v1.1",
> > > > -
> > > > - /* POWER5+ */
> > > > - "power5+_v2.1",
> > > > -
> > > > - /* POWER7 */
> > > > - "power7_v2.3",
> > > > -
> > > > - /* POWER7+ */
> > > > - "power7+_v2.1",
> > > > -
> > > > - /* POWER8 */
> > > > - "power8_v2.0",
> > > > -
> > > > - /* POWER8E */
> > > > - "power8e_v2.1",
> > > > -
> > > > - /* POWER8NVL */
> > > > - "power8nvl_v1.0",
> > > > -
> > > > - /* POWER9 */
> > > > - "power9_v1.0",
> > > > - "power9_v2.0",
> > > > -};
> > > > -
> > > > static Property spapr_cpu_core_properties[] = {
> > > > DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
> > > > DEFINE_PROP_END_OF_LIST()
> > > > @@ -265,33 +234,33 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
> > > > g_assert(scc->cpu_class);
> > > > }
> > > >
> > > > -static const TypeInfo spapr_cpu_core_type_info = {
> > > > - .name = TYPE_SPAPR_CPU_CORE,
> > > > - .parent = TYPE_CPU_CORE,
> > > > - .abstract = true,
> > > > - .instance_size = sizeof(sPAPRCPUCore),
> > > > - .class_size = sizeof(sPAPRCPUCoreClass),
> > > > -};
> > > > -
> > > > -static void spapr_cpu_core_register_types(void)
> > > > -{
> > > > - int i;
> > > > -
> > > > - type_register_static(&spapr_cpu_core_type_info);
> > > > -
> > > > - for (i = 0; i < ARRAY_SIZE(spapr_core_models); i++) {
> > > > - TypeInfo type_info = {
> > > > - .parent = TYPE_SPAPR_CPU_CORE,
> > > > - .instance_size = sizeof(sPAPRCPUCore),
> > > > - .class_init = spapr_cpu_core_class_init,
> > > > - .class_data = (void *) spapr_core_models[i],
> > > > - };
> > > > -
> > > > - type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE,
> > > > - spapr_core_models[i]);
> > > > - type_register(&type_info);
> > > > - g_free((void *)type_info.name);
> > > > +#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
> > > > + { \
> > > > + .parent = TYPE_SPAPR_CPU_CORE, \587
> > > > + .class_data = (void *) cpu_model, \
> > > > + .class_init = spapr_cpu_core_class_init, \
> > > > + .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
> > > > }
> > > > -}
> > > >
> > > > -type_init(spapr_cpu_core_register_types)
> > > > +static const TypeInfo spapr_cpu_core_type_infos[] = {
> > > > + {
> > > > + .name = TYPE_SPAPR_CPU_CORE,
> > > > + .parent = TYPE_CPU_CORE,
> > > > + .abstract = true,
> > > > + .instance_size = sizeof(sPAPRCPUCore),
> > > > + .class_size = sizeof(sPAPRCPUCoreClass),
> > > > + },
> > > > + DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
> > > > + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
> > > > + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
> > > > + DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
> > > > + DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
> > > > + DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
> > > > + DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
> > > > + DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
> > > > + DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
> > > > + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
> > > > + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
> > > > +};
> > > > +
> > > > +DEFINE_TYPES(spapr_cpu_core_type_infos)
> > >
> > >
> >
>
^ permalink raw reply [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 13/24] ppc: spapr: define core types statically
2017-10-12 15:20 ` Greg Kurz
@ 2017-10-12 16:01 ` Igor Mammedov
0 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-12 16:01 UTC (permalink / raw)
To: Greg Kurz
Cc: open list:ppce500, Hervé Poussineau, qemu-devel,
David Gibson
On Thu, 12 Oct 2017 17:20:51 +0200
Greg Kurz <groug@kaod.org> wrote:
> On Thu, 12 Oct 2017 16:58:39 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
>
> > On Thu, 12 Oct 2017 15:10:30 +0200
> > Greg Kurz <groug@kaod.org> wrote:
> >
> > > On Tue, 10 Oct 2017 09:29:46 +0200
> > > Greg Kurz <groug@kaod.org> wrote:
> > >
> > > > On Mon, 9 Oct 2017 21:51:00 +0200
> > > > Igor Mammedov <imammedo@redhat.com> wrote:
> > > >
> > > > > spapr core type definition doesn't have any fields that
> > > > > require it to be defined at runtime. So replace code
> > > > > that fills in TypeInfo at runtime with static TypeInfo
> > > > > array that does the same at complie time.
> > > > >
> > > > > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > > > > ---
> > > > > v2:
> > > > > - fix rebase conflict: add newly added power9_v2 core
> > > > > ---
> > > >
> > > > Reviewed-by: Greg Kurz <groug@kaod.org>
> > > >
> > >
> > > Oops, this patch causes a regression when you try to pass a sPAPR core to
> > > a non-pseries machine.
> > >
> > > Without this patch:
> > >
> > > $ ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
> > > qemu-system-ppc64: -device host-spapr-cpu-core:
> > > 'host-spapr-cpu-core' is not a valid device model name
> > >
> > > With this patch:
> > >
> > > $ ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
> > > **
> > > ERROR:qom/object.c:217:object_type_get_instance_size:
> > > assertion failed: (type != NULL)
> > > Aborted
> > there shouldn't be type host-spapr-cpu-core with this patch since you don't have -enable-kvm on CLI
> > maybe you are talking about
> > [PATCH v2 15/24] ppc: spapr: register 'host' core type along with the rest of core types
> >
>
> Oops you're right, I replied to the wrong mail... of course, I meant the
> following commit in David's staging tree:
>
> https://github.com/dgibson/qemu/commit/c18165144076cef0c17206f5231cf9787c944037
fixed by:
[PATCH v2 14/24] fixup! ppc: spapr: use cpu type name directly
also I've stumbled upon another issue, fixup also posted:
[PATCH v2 18/24] fixup! ppc: spapr: use generic cpu_model parsing
fixup well localized and didn't cause conflicts so there is no need to respin series
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [PATCH v2 13/24] ppc: spapr: define core types statically
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 13/24] ppc: spapr: define core types statically Igor Mammedov
2017-10-10 2:04 ` David Gibson
2017-10-10 7:29 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
@ 2017-10-11 17:21 ` Philippe Mathieu-Daudé
2 siblings, 0 replies; 47+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-10-11 17:21 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: open list:ppce500, Edgar E. Iglesias, Hervé Poussineau,
Alexander Graf, David Gibson
On 10/09/2017 04:51 PM, Igor Mammedov wrote:
> spapr core type definition doesn't have any fields that
> require it to be defined at runtime. So replace code
> that fills in TypeInfo at runtime with static TypeInfo
> array that does the same at complie time.
"compile"
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> v2:
> - fix rebase conflict: add newly added power9_v2 core
> ---
> include/hw/ppc/spapr_cpu_core.h | 2 +
> hw/ppc/spapr_cpu_core.c | 87 +++++++++++++----------------------------
> 2 files changed, 30 insertions(+), 59 deletions(-)
>
> diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
> index 93051e9..66dcf52 100644
> --- a/include/hw/ppc/spapr_cpu_core.h
> +++ b/include/hw/ppc/spapr_cpu_core.h
> @@ -21,6 +21,8 @@
> #define SPAPR_CPU_CORE_GET_CLASS(obj) \
> OBJECT_GET_CLASS(sPAPRCPUCoreClass, (obj), TYPE_SPAPR_CPU_CORE)
>
> +#define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE
> +
> typedef struct sPAPRCPUCore {
> /*< private >*/
> CPUCore parent_obj;
> diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> index b6610dd..550d320 100644
> --- a/hw/ppc/spapr_cpu_core.c
> +++ b/hw/ppc/spapr_cpu_core.c
> @@ -217,37 +217,6 @@ err:
> error_propagate(errp, local_err);
> }
>
> -static const char *spapr_core_models[] = {
> - /* 970 */
> - "970_v2.2",
> -
> - /* 970MP variants */
> - "970mp_v1.0",
> - "970mp_v1.1",
> -
> - /* POWER5+ */
> - "power5+_v2.1",
> -
> - /* POWER7 */
> - "power7_v2.3",
> -
> - /* POWER7+ */
> - "power7+_v2.1",
> -
> - /* POWER8 */
> - "power8_v2.0",
> -
> - /* POWER8E */
> - "power8e_v2.1",
> -
> - /* POWER8NVL */
> - "power8nvl_v1.0",
> -
> - /* POWER9 */
> - "power9_v1.0",
> - "power9_v2.0",
> -};
> -
> static Property spapr_cpu_core_properties[] = {
> DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
> DEFINE_PROP_END_OF_LIST()
> @@ -265,33 +234,33 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
> g_assert(scc->cpu_class);
> }
>
> -static const TypeInfo spapr_cpu_core_type_info = {
> - .name = TYPE_SPAPR_CPU_CORE,
> - .parent = TYPE_CPU_CORE,
> - .abstract = true,
> - .instance_size = sizeof(sPAPRCPUCore),
> - .class_size = sizeof(sPAPRCPUCoreClass),
> -};
> -
> -static void spapr_cpu_core_register_types(void)
> -{
> - int i;
> -
> - type_register_static(&spapr_cpu_core_type_info);
> -
> - for (i = 0; i < ARRAY_SIZE(spapr_core_models); i++) {
> - TypeInfo type_info = {
> - .parent = TYPE_SPAPR_CPU_CORE,
> - .instance_size = sizeof(sPAPRCPUCore),
> - .class_init = spapr_cpu_core_class_init,
> - .class_data = (void *) spapr_core_models[i],
> - };
> -
> - type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE,
> - spapr_core_models[i]);
> - type_register(&type_info);
> - g_free((void *)type_info.name);
> +#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
> + { \
> + .parent = TYPE_SPAPR_CPU_CORE, \
> + .class_data = (void *) cpu_model, \
> + .class_init = spapr_cpu_core_class_init, \
> + .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
> }
> -}
>
> -type_init(spapr_cpu_core_register_types)
> +static const TypeInfo spapr_cpu_core_type_infos[] = {
> + {
> + .name = TYPE_SPAPR_CPU_CORE,
> + .parent = TYPE_CPU_CORE,
> + .abstract = true,
> + .instance_size = sizeof(sPAPRCPUCore),
> + .class_size = sizeof(sPAPRCPUCoreClass),
> + },
> + DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
> + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
> +};
> +
> +DEFINE_TYPES(spapr_cpu_core_type_infos)
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [Qemu-devel] [PATCH v2 14/24] ppc: spapr: use cpu type name directly
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (12 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 13/24] ppc: spapr: define core types statically Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-12 15:48 ` [Qemu-devel] [PATCH v2 14/24] fixup! " Igor Mammedov
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 15/24] ppc: spapr: register 'host' core type along with the rest of core types Igor Mammedov
` (10 subsequent siblings)
24 siblings, 1 reply; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
replace sPAPRCPUCoreClass::cpu_class with cpu type name
since it were needed just to get that at points it were
accessed.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
include/hw/ppc/spapr_cpu_core.h | 2 +-
hw/ppc/spapr.c | 6 ++----
hw/ppc/spapr_cpu_core.c | 13 +++++--------
target/ppc/kvm.c | 2 +-
4 files changed, 9 insertions(+), 14 deletions(-)
diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
index 66dcf52..264ce68 100644
--- a/include/hw/ppc/spapr_cpu_core.h
+++ b/include/hw/ppc/spapr_cpu_core.h
@@ -34,7 +34,7 @@ typedef struct sPAPRCPUCore {
typedef struct sPAPRCPUCoreClass {
DeviceClass parent_class;
- ObjectClass *cpu_class;
+ const char *cpu_type;
} sPAPRCPUCoreClass;
char *spapr_get_cpu_core_type(const char *model);
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index c7a0310..fda2bbe 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3149,8 +3149,7 @@ void spapr_core_release(DeviceState *dev)
if (smc->pre_2_10_has_unused_icps) {
sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc));
- const char *typename = object_class_get_name(scc->cpu_class);
- size_t size = object_type_get_instance_size(typename);
+ size_t size = object_type_get_instance_size(scc->cpu_type);
int i;
for (i = 0; i < cc->nr_threads; i++) {
@@ -3246,8 +3245,7 @@ static void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
if (smc->pre_2_10_has_unused_icps) {
sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc));
- const char *typename = object_class_get_name(scc->cpu_class);
- size_t size = object_type_get_instance_size(typename);
+ size_t size = object_type_get_instance_size(scc->cpu_type);
int i;
for (i = 0; i < cc->nr_threads; i++) {
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 550d320..a008056 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -90,8 +90,7 @@ static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp)
{
sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev));
- const char *typename = object_class_get_name(scc->cpu_class);
- size_t size = object_type_get_instance_size(typename);
+ size_t size = object_type_get_instance_size(scc->cpu_type);
CPUCore *cc = CPU_CORE(dev);
int i;
@@ -152,8 +151,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev));
CPUCore *cc = CPU_CORE(OBJECT(dev));
- const char *typename = object_class_get_name(scc->cpu_class);
- size_t size = object_type_get_instance_size(typename);
+ size_t size = object_type_get_instance_size(scc->cpu_type);
Error *local_err = NULL;
void *obj;
int i, j;
@@ -172,7 +170,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
obj = sc->threads + i * size;
- object_initialize(obj, size, typename);
+ object_initialize(obj, size, scc->cpu_type);
cs = CPU(obj);
cpu = POWERPC_CPU(cs);
cs->cpu_index = cc->core_id + i;
@@ -230,14 +228,13 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
dc->realize = spapr_cpu_core_realize;
dc->unrealize = spapr_cpu_core_unrealizefn;
dc->props = spapr_cpu_core_properties;
- scc->cpu_class = cpu_class_by_name(TYPE_POWERPC_CPU, data);
- g_assert(scc->cpu_class);
+ scc->cpu_type = data;
}
#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
{ \
.parent = TYPE_SPAPR_CPU_CORE, \
- .class_data = (void *) cpu_model, \
+ .class_data = (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \
.class_init = spapr_cpu_core_class_init, \
.name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
}
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 171d3d8..c2152ed 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -2514,7 +2514,7 @@ static int kvm_ppc_register_host_cpu_type(void)
type_info.instance_size = sizeof(sPAPRCPUCore);
type_info.instance_init = NULL;
type_info.class_init = spapr_cpu_core_class_init;
- type_info.class_data = (void *) "host";
+ type_info.class_data = (void *) POWERPC_CPU_TYPE_NAME("host");
type_register(&type_info);
g_free((void *)type_info.name);
#endif
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 14/24] fixup! ppc: spapr: use cpu type name directly
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 14/24] ppc: spapr: use cpu type name directly Igor Mammedov
@ 2017-10-12 15:48 ` Igor Mammedov
2017-10-13 7:26 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
0 siblings, 1 reply; 47+ messages in thread
From: Igor Mammedov @ 2017-10-12 15:48 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-ppc, agraf, david, groug
follow up commit that registers host-spapr-cpu-core type unconditionally
"ppc: spapr: register 'host' core type along with the rest of core types"
makes 'non' machine crash
ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
ERROR:qom/object.c:217:object_type_get_instance_size: assertion failed: (type != NULL)
Aborted
before it qemu fails cleanly with
ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
qemu-system-ppc64: -device host-spapr-cpu-core: 'host-spapr-cpu-core' is not a valid device model name
spapr_cpu_core_realize() already has explicit check for pseries machine,
so move access to host cpu type after it so 'none' machine would fail
cleanly as expected.
Reported-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/ppc/spapr_cpu_core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index b5bbb6a..7dbf9c3 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -151,7 +151,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev));
CPUCore *cc = CPU_CORE(OBJECT(dev));
- size_t size = object_type_get_instance_size(scc->cpu_type);
+ size_t size;
Error *local_err = NULL;
void *obj;
int i, j;
@@ -162,6 +162,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
return;
}
+ size = object_type_get_instance_size(scc->cpu_type);
sc->threads = g_malloc0(size * cc->nr_threads);
for (i = 0; i < cc->nr_threads; i++) {
char id[32];
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 14/24] fixup! ppc: spapr: use cpu type name directly
2017-10-12 15:48 ` [Qemu-devel] [PATCH v2 14/24] fixup! " Igor Mammedov
@ 2017-10-13 7:26 ` Greg Kurz
0 siblings, 0 replies; 47+ messages in thread
From: Greg Kurz @ 2017-10-13 7:26 UTC (permalink / raw)
To: Igor Mammedov; +Cc: qemu-devel, qemu-ppc, david
On Thu, 12 Oct 2017 17:48:19 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> follow up commit that registers host-spapr-cpu-core type unconditionally
> "ppc: spapr: register 'host' core type along with the rest of core types"
>
> makes 'non' machine crash
> ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
> ERROR:qom/object.c:217:object_type_get_instance_size: assertion failed: (type != NULL)
> Aborted
>
> before it qemu fails cleanly with
> ppc64-softmmu/qemu-system-ppc64 -M none -device host-spapr-cpu-core
> qemu-system-ppc64: -device host-spapr-cpu-core: 'host-spapr-cpu-core' is not a valid device model name
>
> spapr_cpu_core_realize() already has explicit check for pseries machine,
> so move access to host cpu type after it so 'none' machine would fail
> cleanly as expected.
>
> Reported-by: Greg Kurz <groug@kaod.org>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> ---
That's much simpler indeed than trying to register the host CPU type at
QOM init... which turns out to be quite hairy compared to the gain :)
> hw/ppc/spapr_cpu_core.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> index b5bbb6a..7dbf9c3 100644
> --- a/hw/ppc/spapr_cpu_core.c
> +++ b/hw/ppc/spapr_cpu_core.c
> @@ -151,7 +151,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
> sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
> sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev));
> CPUCore *cc = CPU_CORE(OBJECT(dev));
> - size_t size = object_type_get_instance_size(scc->cpu_type);
> + size_t size;
> Error *local_err = NULL;
> void *obj;
> int i, j;
> @@ -162,6 +162,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
> return;
> }
>
> + size = object_type_get_instance_size(scc->cpu_type);
> sc->threads = g_malloc0(size * cc->nr_threads);
> for (i = 0; i < cc->nr_threads; i++) {
> char id[32];
^ permalink raw reply [flat|nested] 47+ messages in thread
* [Qemu-devel] [PATCH v2 15/24] ppc: spapr: register 'host' core type along with the rest of core types
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (13 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 14/24] ppc: spapr: use cpu type name directly Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 16/24] ppc: spapr: use cpu model names as tcg defaults instead of aliases Igor Mammedov
` (9 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
consolidate 'host' core type registration by moving it from
KVM specific code into spapr_cpu_core.c, similar like it's
done in x86 target.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
v2:
- fix rebase conflict due to new
DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0")
entry in hw/ppc/spapr_cpu_core.c, no functional change
---
include/hw/ppc/spapr_cpu_core.h | 1 -
hw/ppc/spapr_cpu_core.c | 5 ++++-
target/ppc/kvm.c | 11 -----------
3 files changed, 4 insertions(+), 13 deletions(-)
diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
index 264ce68..42765de 100644
--- a/include/hw/ppc/spapr_cpu_core.h
+++ b/include/hw/ppc/spapr_cpu_core.h
@@ -38,5 +38,4 @@ typedef struct sPAPRCPUCoreClass {
} sPAPRCPUCoreClass;
char *spapr_get_cpu_core_type(const char *model);
-void spapr_cpu_core_class_init(ObjectClass *oc, void *data);
#endif
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index a008056..b5bbb6a 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -220,7 +220,7 @@ static Property spapr_cpu_core_properties[] = {
DEFINE_PROP_END_OF_LIST()
};
-void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
+static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc);
@@ -258,6 +258,9 @@ static const TypeInfo spapr_cpu_core_type_infos[] = {
DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
+#ifdef CONFIG_KVM
+ DEFINE_SPAPR_CPU_CORE_TYPE("host"),
+#endif
};
DEFINE_TYPES(spapr_cpu_core_type_infos)
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index c2152ed..cb5777a 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -2508,17 +2508,6 @@ static int kvm_ppc_register_host_cpu_type(void)
oc = object_class_by_name(type_info.name);
g_assert(oc);
-#if defined(TARGET_PPC64)
- type_info.name = g_strdup_printf("%s-"TYPE_SPAPR_CPU_CORE, "host");
- type_info.parent = TYPE_SPAPR_CPU_CORE,
- type_info.instance_size = sizeof(sPAPRCPUCore);
- type_info.instance_init = NULL;
- type_info.class_init = spapr_cpu_core_class_init;
- type_info.class_data = (void *) POWERPC_CPU_TYPE_NAME("host");
- type_register(&type_info);
- g_free((void *)type_info.name);
-#endif
-
/*
* Update generic CPU family class alias (e.g. on a POWER8NVL host,
* we want "POWER8" to be a "family" alias that points to the current
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 16/24] ppc: spapr: use cpu model names as tcg defaults instead of aliases
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (14 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 15/24] ppc: spapr: register 'host' core type along with the rest of core types Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 17/24] ppc: move ppc_cpu_lookup_alias() before its first user Igor Mammedov
` (8 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
---
PS:
- patch is made separate to reduce noise in follow up patch
"ppc: spapr: use generic cpu_model parsing"
---
hw/ppc/spapr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index fda2bbe..30b4934 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3610,7 +3610,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
hc->unplug_request = spapr_machine_device_unplug_request;
smc->dr_lmb_enabled = true;
- smc->tcg_default_cpu = "POWER8";
+ smc->tcg_default_cpu = "power8_v2.0";
mc->has_hotpluggable_cpus = true;
smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED;
fwc->get_dev_path = spapr_get_fw_dev_path;
@@ -3856,7 +3856,7 @@ static void spapr_machine_2_7_class_options(MachineClass *mc)
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
spapr_machine_2_8_class_options(mc);
- smc->tcg_default_cpu = "POWER7";
+ smc->tcg_default_cpu = "power7_v2.3";
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_7);
smc->phb_placement = phb_placement_2_7;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 17/24] ppc: move ppc_cpu_lookup_alias() before its first user
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (15 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 16/24] ppc: spapr: use cpu model names as tcg defaults instead of aliases Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-10 2:05 ` David Gibson
2017-10-11 17:15 ` Philippe Mathieu-Daudé
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 18/24] ppc: spapr: use generic cpu_model parsing Igor Mammedov
` (7 subsequent siblings)
24 siblings, 2 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
next commit will drop ppc_cpu_lookup_alias() declaration from header
and make it static which will break its last user ppc_cpu_class_by_name()
since ppc_cpu_class_by_name() defined before ppc_cpu_lookup_alias().
To avoid this move ppc_cpu_lookup_alias() right before
ppc_cpu_class_by_name().
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
v2:
- split from "ppc: spapr: use generic cpu_model parsing"
were asked by David, it makes the next patch a little
smaller
---
target/ppc/translate_init.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index 3d16481..17ac95b 100644
--- a/target/ppc/translate_init.c
+++ b/target/ppc/translate_init.c
@@ -10060,6 +10060,19 @@ PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr)
return pcc;
}
+const char *ppc_cpu_lookup_alias(const char *alias)
+{
+ int ai;
+
+ for (ai = 0; ppc_cpu_aliases[ai].alias != NULL; ai++) {
+ if (strcmp(ppc_cpu_aliases[ai].alias, alias) == 0) {
+ return ppc_cpu_aliases[ai].model;
+ }
+ }
+
+ return NULL;
+}
+
static ObjectClass *ppc_cpu_class_by_name(const char *name)
{
char *cpu_model, *typename;
@@ -10152,19 +10165,6 @@ static void ppc_cpu_parse_featurestr(const char *type, char *features,
pcc->parent_parse_features(type, features, errp);
}
-const char *ppc_cpu_lookup_alias(const char *alias)
-{
- int ai;
-
- for (ai = 0; ppc_cpu_aliases[ai].alias != NULL; ai++) {
- if (strcmp(ppc_cpu_aliases[ai].alias, alias) == 0) {
- return ppc_cpu_aliases[ai].model;
- }
- }
-
- return NULL;
-}
-
PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc)
{
ObjectClass *oc = OBJECT_CLASS(pcc);
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 17/24] ppc: move ppc_cpu_lookup_alias() before its first user
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 17/24] ppc: move ppc_cpu_lookup_alias() before its first user Igor Mammedov
@ 2017-10-10 2:05 ` David Gibson
2017-10-11 17:15 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-10-10 2:05 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Alexander Graf, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
[-- Attachment #1: Type: text/plain, Size: 2304 bytes --]
On Mon, Oct 09, 2017 at 09:51:04PM +0200, Igor Mammedov wrote:
> next commit will drop ppc_cpu_lookup_alias() declaration from header
> and make it static which will break its last user ppc_cpu_class_by_name()
> since ppc_cpu_class_by_name() defined before ppc_cpu_lookup_alias().
>
> To avoid this move ppc_cpu_lookup_alias() right before
> ppc_cpu_class_by_name().
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> v2:
> - split from "ppc: spapr: use generic cpu_model parsing"
> were asked by David, it makes the next patch a little
> smaller
> ---
> target/ppc/translate_init.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> index 3d16481..17ac95b 100644
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -10060,6 +10060,19 @@ PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr)
> return pcc;
> }
>
> +const char *ppc_cpu_lookup_alias(const char *alias)
> +{
> + int ai;
> +
> + for (ai = 0; ppc_cpu_aliases[ai].alias != NULL; ai++) {
> + if (strcmp(ppc_cpu_aliases[ai].alias, alias) == 0) {
> + return ppc_cpu_aliases[ai].model;
> + }
> + }
> +
> + return NULL;
> +}
> +
> static ObjectClass *ppc_cpu_class_by_name(const char *name)
> {
> char *cpu_model, *typename;
> @@ -10152,19 +10165,6 @@ static void ppc_cpu_parse_featurestr(const char *type, char *features,
> pcc->parent_parse_features(type, features, errp);
> }
>
> -const char *ppc_cpu_lookup_alias(const char *alias)
> -{
> - int ai;
> -
> - for (ai = 0; ppc_cpu_aliases[ai].alias != NULL; ai++) {
> - if (strcmp(ppc_cpu_aliases[ai].alias, alias) == 0) {
> - return ppc_cpu_aliases[ai].model;
> - }
> - }
> -
> - return NULL;
> -}
> -
> PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc)
> {
> ObjectClass *oc = OBJECT_CLASS(pcc);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 17/24] ppc: move ppc_cpu_lookup_alias() before its first user
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 17/24] ppc: move ppc_cpu_lookup_alias() before its first user Igor Mammedov
2017-10-10 2:05 ` David Gibson
@ 2017-10-11 17:15 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 47+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-10-11 17:15 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: open list:ppce500, Edgar E. Iglesias, Hervé Poussineau,
Alexander Graf, David Gibson
On 10/09/2017 04:51 PM, Igor Mammedov wrote:
> next commit will drop ppc_cpu_lookup_alias() declaration from header
> and make it static which will break its last user ppc_cpu_class_by_name()
> since ppc_cpu_class_by_name() defined before ppc_cpu_lookup_alias().
>
> To avoid this move ppc_cpu_lookup_alias() right before
> ppc_cpu_class_by_name().
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> v2:
> - split from "ppc: spapr: use generic cpu_model parsing"
> were asked by David, it makes the next patch a little
> smaller
> ---
> target/ppc/translate_init.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> index 3d16481..17ac95b 100644
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -10060,6 +10060,19 @@ PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr)
> return pcc;
> }
>
> +const char *ppc_cpu_lookup_alias(const char *alias)
> +{
> + int ai;
> +
> + for (ai = 0; ppc_cpu_aliases[ai].alias != NULL; ai++) {
> + if (strcmp(ppc_cpu_aliases[ai].alias, alias) == 0) {
> + return ppc_cpu_aliases[ai].model;
> + }
> + }
> +
> + return NULL;
> +}
> +
> static ObjectClass *ppc_cpu_class_by_name(const char *name)
> {
> char *cpu_model, *typename;
> @@ -10152,19 +10165,6 @@ static void ppc_cpu_parse_featurestr(const char *type, char *features,
> pcc->parent_parse_features(type, features, errp);
> }
>
> -const char *ppc_cpu_lookup_alias(const char *alias)
> -{
> - int ai;
> -
> - for (ai = 0; ppc_cpu_aliases[ai].alias != NULL; ai++) {
> - if (strcmp(ppc_cpu_aliases[ai].alias, alias) == 0) {
> - return ppc_cpu_aliases[ai].model;
> - }
> - }
> -
> - return NULL;
> -}
> -
> PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc)
> {
> ObjectClass *oc = OBJECT_CLASS(pcc);
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [Qemu-devel] [PATCH v2 18/24] ppc: spapr: use generic cpu_model parsing
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (16 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 17/24] ppc: move ppc_cpu_lookup_alias() before its first user Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-10 2:07 ` David Gibson
2017-10-12 15:50 ` [Qemu-devel] [PATCH v2 18/24] fixup! " Igor Mammedov
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 19/24] ppc: pnv: " Igor Mammedov
` (6 subsequent siblings)
24 siblings, 2 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
use generic cpu_model parsing introduced by
(6063d4c0f vl.c: convert cpu_model to cpu type and set of global properties before machine_init())
it allows to:
* replace sPAPRMachineClass::tcg_default_cpu with
MachineClass::default_cpu_type
* drop cpu_parse_cpu_model() from hw/ppc/spapr.c and reuse
one in vl.c
* simplify spapr_get_cpu_core_type() by removing
not needed anymore recurrsion since alias look up
happens earlier at vl.c and spapr_get_cpu_core_type()
works only with resulted from that cpu type.
* spapr no more needs to parse/depend on being phased out
MachineState::cpu_model, all tha parsing done by generic
code and target specific callback.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
PS:
patch is a little bit big but it's hard to split it due
to dependencies, so pls bear with it.
v2:
- limit setting default cpu type to 'host' type only for spapr machine
- split out ppc_cpu_lookup_alias() movement into separate patch
---
include/hw/ppc/spapr.h | 1 -
include/hw/ppc/spapr_cpu_core.h | 2 +-
target/ppc/cpu.h | 1 -
hw/ppc/spapr.c | 16 ++++------------
hw/ppc/spapr_cpu_core.c | 30 ++++++++++--------------------
target/ppc/kvm.c | 11 ++++++++---
target/ppc/translate_init.c | 2 +-
7 files changed, 24 insertions(+), 39 deletions(-)
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 8ca4f94..9d21ca9 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -60,7 +60,6 @@ struct sPAPRMachineClass {
/*< public >*/
bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */
bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */
- const char *tcg_default_cpu; /* which (TCG) CPU to simulate by default */
bool pre_2_10_has_unused_icps;
void (*phb_placement)(sPAPRMachineState *spapr, uint32_t index,
uint64_t *buid, hwaddr *pio,
diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
index 42765de..f2d48d6 100644
--- a/include/hw/ppc/spapr_cpu_core.h
+++ b/include/hw/ppc/spapr_cpu_core.h
@@ -37,5 +37,5 @@ typedef struct sPAPRCPUCoreClass {
const char *cpu_type;
} sPAPRCPUCoreClass;
-char *spapr_get_cpu_core_type(const char *model);
+const char *spapr_get_cpu_core_type(const char *cpu_type);
#endif
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 64aef17..989761b 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1278,7 +1278,6 @@ extern const struct VMStateDescription vmstate_ppc_cpu;
/*****************************************************************************/
void ppc_translate_init(void);
-const char *ppc_cpu_lookup_alias(const char *alias);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU. */
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 30b4934..355f216 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2129,7 +2129,7 @@ static void spapr_init_cpus(sPAPRMachineState *spapr)
{
MachineState *machine = MACHINE(spapr);
MachineClass *mc = MACHINE_GET_CLASS(machine);
- char *type = spapr_get_cpu_core_type(machine->cpu_model);
+ const char *type = spapr_get_cpu_core_type(machine->cpu_type);
int smt = kvmppc_smt_threads();
const CPUArchIdList *possible_cpus;
int boot_cores_nr = smp_cpus / smp_threads;
@@ -2184,7 +2184,6 @@ static void spapr_init_cpus(sPAPRMachineState *spapr)
object_property_set_bool(core, true, "realized", &error_fatal);
}
}
- g_free(type);
}
static void spapr_set_vsmt_mode(sPAPRMachineState *spapr, Error **errp)
@@ -2369,12 +2368,6 @@ static void ppc_spapr_init(MachineState *machine)
}
/* init CPUs */
- if (machine->cpu_model == NULL) {
- machine->cpu_model = kvm_enabled() ? "host" : smc->tcg_default_cpu;
- }
-
- cpu_parse_cpu_model(TYPE_POWERPC_CPU, machine->cpu_model);
-
spapr_set_vsmt_mode(spapr, &error_fatal);
spapr_init_cpus(spapr);
@@ -3265,7 +3258,7 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev);
Error *local_err = NULL;
CPUCore *cc = CPU_CORE(dev);
- char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model);
+ const char *base_core_type = spapr_get_cpu_core_type(machine->cpu_type);
const char *type = object_get_typename(OBJECT(dev));
CPUArchId *core_slot;
int index;
@@ -3311,7 +3304,6 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
numa_cpu_pre_plug(core_slot, dev, &local_err);
out:
- g_free(base_core_type);
error_propagate(errp, local_err);
}
@@ -3610,7 +3602,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
hc->unplug_request = spapr_machine_device_unplug_request;
smc->dr_lmb_enabled = true;
- smc->tcg_default_cpu = "power8_v2.0";
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
mc->has_hotpluggable_cpus = true;
smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED;
fwc->get_dev_path = spapr_get_fw_dev_path;
@@ -3856,7 +3848,7 @@ static void spapr_machine_2_7_class_options(MachineClass *mc)
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
spapr_machine_2_8_class_options(mc);
- smc->tcg_default_cpu = "power7_v2.3";
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power7_v2.3");
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_7);
smc->phb_placement = phb_placement_2_7;
}
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index b5bbb6a..6c176c8 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -61,29 +61,19 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu,
* Return the sPAPR CPU core type for @model which essentially is the CPU
* model specified with -cpu cmdline option.
*/
-char *spapr_get_cpu_core_type(const char *model)
+const char *spapr_get_cpu_core_type(const char *cpu_type)
{
- char *core_type;
- gchar **model_pieces = g_strsplit(model, ",", 2);
- gchar *cpu_model = g_ascii_strdown(model_pieces[0], -1);
- g_strfreev(model_pieces);
-
- core_type = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, cpu_model);
-
- /* Check whether it exists or whether we have to look up an alias name */
- if (!object_class_by_name(core_type)) {
- const char *realmodel;
-
- g_free(core_type);
- core_type = NULL;
- realmodel = ppc_cpu_lookup_alias(cpu_model);
- if (realmodel) {
- core_type = spapr_get_cpu_core_type(realmodel);
- }
+ int len = strlen(cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX);
+ char *core_type = g_strdup_printf(SPAPR_CPU_CORE_TYPE_NAME("%.*s"),
+ len, cpu_type);
+ ObjectClass *oc = object_class_by_name(core_type);
+
+ g_free(core_type);
+ if (!oc) {
+ return NULL;
}
- g_free(cpu_model);
- return core_type;
+ return object_class_get_name(oc);
}
static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp)
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index cb5777a..48dc3f7 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -123,7 +123,7 @@ static bool kvmppc_is_pr(KVMState *ks)
return kvm_vm_check_extension(ks, KVM_CAP_PPC_GET_PVINFO) != 0;
}
-static int kvm_ppc_register_host_cpu_type(void);
+static int kvm_ppc_register_host_cpu_type(MachineState *ms);
int kvm_arch_init(MachineState *ms, KVMState *s)
{
@@ -163,7 +163,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
"VM to stall at times!\n");
}
- kvm_ppc_register_host_cpu_type();
+ kvm_ppc_register_host_cpu_type(ms);
return 0;
}
@@ -2487,12 +2487,13 @@ PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void)
return pvr_pcc;
}
-static int kvm_ppc_register_host_cpu_type(void)
+static int kvm_ppc_register_host_cpu_type(MachineState *ms)
{
TypeInfo type_info = {
.name = TYPE_HOST_POWERPC_CPU,
.class_init = kvmppc_host_cpu_class_init,
};
+ MachineClass *mc = MACHINE_GET_CLASS(ms);
PowerPCCPUClass *pvr_pcc;
ObjectClass *oc;
DeviceClass *dc;
@@ -2504,6 +2505,10 @@ static int kvm_ppc_register_host_cpu_type(void)
}
type_info.parent = object_class_get_name(OBJECT_CLASS(pvr_pcc));
type_register(&type_info);
+ if (object_dynamic_cast(ms, TYPE_SPAPR_MACHINE)) {
+ /* override TCG default cpu type with 'host' cpu model */
+ mc->default_cpu_type = TYPE_HOST_POWERPC_CPU;
+ }
oc = object_class_by_name(type_info.name);
g_assert(oc);
diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index 17ac95b..7b9bf6a 100644
--- a/target/ppc/translate_init.c
+++ b/target/ppc/translate_init.c
@@ -10060,7 +10060,7 @@ PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr)
return pcc;
}
-const char *ppc_cpu_lookup_alias(const char *alias)
+static const char *ppc_cpu_lookup_alias(const char *alias)
{
int ai;
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 18/24] ppc: spapr: use generic cpu_model parsing
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 18/24] ppc: spapr: use generic cpu_model parsing Igor Mammedov
@ 2017-10-10 2:07 ` David Gibson
2017-10-12 15:50 ` [Qemu-devel] [PATCH v2 18/24] fixup! " Igor Mammedov
1 sibling, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-10-10 2:07 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Alexander Graf, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
[-- Attachment #1: Type: text/plain, Size: 10280 bytes --]
On Mon, Oct 09, 2017 at 09:51:05PM +0200, Igor Mammedov wrote:
> use generic cpu_model parsing introduced by
> (6063d4c0f vl.c: convert cpu_model to cpu type and set of global properties before machine_init())
>
> it allows to:
> * replace sPAPRMachineClass::tcg_default_cpu with
> MachineClass::default_cpu_type
> * drop cpu_parse_cpu_model() from hw/ppc/spapr.c and reuse
> one in vl.c
> * simplify spapr_get_cpu_core_type() by removing
> not needed anymore recurrsion since alias look up
> happens earlier at vl.c and spapr_get_cpu_core_type()
> works only with resulted from that cpu type.
> * spapr no more needs to parse/depend on being phased out
> MachineState::cpu_model, all tha parsing done by generic
> code and target specific callback.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> PS:
> patch is a little bit big but it's hard to split it due
> to dependencies, so pls bear with it.
>
> v2:
> - limit setting default cpu type to 'host' type only for spapr machine
> - split out ppc_cpu_lookup_alias() movement into separate patch
> ---
> include/hw/ppc/spapr.h | 1 -
> include/hw/ppc/spapr_cpu_core.h | 2 +-
> target/ppc/cpu.h | 1 -
> hw/ppc/spapr.c | 16 ++++------------
> hw/ppc/spapr_cpu_core.c | 30 ++++++++++--------------------
> target/ppc/kvm.c | 11 ++++++++---
> target/ppc/translate_init.c | 2 +-
> 7 files changed, 24 insertions(+), 39 deletions(-)
>
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index 8ca4f94..9d21ca9 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -60,7 +60,6 @@ struct sPAPRMachineClass {
> /*< public >*/
> bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */
> bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */
> - const char *tcg_default_cpu; /* which (TCG) CPU to simulate by default */
> bool pre_2_10_has_unused_icps;
> void (*phb_placement)(sPAPRMachineState *spapr, uint32_t index,
> uint64_t *buid, hwaddr *pio,
> diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
> index 42765de..f2d48d6 100644
> --- a/include/hw/ppc/spapr_cpu_core.h
> +++ b/include/hw/ppc/spapr_cpu_core.h
> @@ -37,5 +37,5 @@ typedef struct sPAPRCPUCoreClass {
> const char *cpu_type;
> } sPAPRCPUCoreClass;
>
> -char *spapr_get_cpu_core_type(const char *model);
> +const char *spapr_get_cpu_core_type(const char *cpu_type);
> #endif
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 64aef17..989761b 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1278,7 +1278,6 @@ extern const struct VMStateDescription vmstate_ppc_cpu;
>
> /*****************************************************************************/
> void ppc_translate_init(void);
> -const char *ppc_cpu_lookup_alias(const char *alias);
> /* you can call this signal handler from your SIGBUS and SIGSEGV
> signal handlers to inform the virtual CPU of exceptions. non zero
> is returned if the signal was handled by the virtual CPU. */
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 30b4934..355f216 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -2129,7 +2129,7 @@ static void spapr_init_cpus(sPAPRMachineState *spapr)
> {
> MachineState *machine = MACHINE(spapr);
> MachineClass *mc = MACHINE_GET_CLASS(machine);
> - char *type = spapr_get_cpu_core_type(machine->cpu_model);
> + const char *type = spapr_get_cpu_core_type(machine->cpu_type);
> int smt = kvmppc_smt_threads();
> const CPUArchIdList *possible_cpus;
> int boot_cores_nr = smp_cpus / smp_threads;
> @@ -2184,7 +2184,6 @@ static void spapr_init_cpus(sPAPRMachineState *spapr)
> object_property_set_bool(core, true, "realized", &error_fatal);
> }
> }
> - g_free(type);
> }
>
> static void spapr_set_vsmt_mode(sPAPRMachineState *spapr, Error **errp)
> @@ -2369,12 +2368,6 @@ static void ppc_spapr_init(MachineState *machine)
> }
>
> /* init CPUs */
> - if (machine->cpu_model == NULL) {
> - machine->cpu_model = kvm_enabled() ? "host" : smc->tcg_default_cpu;
> - }
> -
> - cpu_parse_cpu_model(TYPE_POWERPC_CPU, machine->cpu_model);
> -
> spapr_set_vsmt_mode(spapr, &error_fatal);
>
> spapr_init_cpus(spapr);
> @@ -3265,7 +3258,7 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
> MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev);
> Error *local_err = NULL;
> CPUCore *cc = CPU_CORE(dev);
> - char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model);
> + const char *base_core_type = spapr_get_cpu_core_type(machine->cpu_type);
> const char *type = object_get_typename(OBJECT(dev));
> CPUArchId *core_slot;
> int index;
> @@ -3311,7 +3304,6 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
> numa_cpu_pre_plug(core_slot, dev, &local_err);
>
> out:
> - g_free(base_core_type);
> error_propagate(errp, local_err);
> }
>
> @@ -3610,7 +3602,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
> hc->unplug_request = spapr_machine_device_unplug_request;
>
> smc->dr_lmb_enabled = true;
> - smc->tcg_default_cpu = "power8_v2.0";
> + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
> mc->has_hotpluggable_cpus = true;
> smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED;
> fwc->get_dev_path = spapr_get_fw_dev_path;
> @@ -3856,7 +3848,7 @@ static void spapr_machine_2_7_class_options(MachineClass *mc)
> sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
>
> spapr_machine_2_8_class_options(mc);
> - smc->tcg_default_cpu = "power7_v2.3";
> + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power7_v2.3");
> SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_7);
> smc->phb_placement = phb_placement_2_7;
> }
> diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> index b5bbb6a..6c176c8 100644
> --- a/hw/ppc/spapr_cpu_core.c
> +++ b/hw/ppc/spapr_cpu_core.c
> @@ -61,29 +61,19 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu,
> * Return the sPAPR CPU core type for @model which essentially is the CPU
> * model specified with -cpu cmdline option.
> */
> -char *spapr_get_cpu_core_type(const char *model)
> +const char *spapr_get_cpu_core_type(const char *cpu_type)
> {
> - char *core_type;
> - gchar **model_pieces = g_strsplit(model, ",", 2);
> - gchar *cpu_model = g_ascii_strdown(model_pieces[0], -1);
> - g_strfreev(model_pieces);
> -
> - core_type = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, cpu_model);
> -
> - /* Check whether it exists or whether we have to look up an alias name */
> - if (!object_class_by_name(core_type)) {
> - const char *realmodel;
> -
> - g_free(core_type);
> - core_type = NULL;
> - realmodel = ppc_cpu_lookup_alias(cpu_model);
> - if (realmodel) {
> - core_type = spapr_get_cpu_core_type(realmodel);
> - }
> + int len = strlen(cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX);
> + char *core_type = g_strdup_printf(SPAPR_CPU_CORE_TYPE_NAME("%.*s"),
> + len, cpu_type);
> + ObjectClass *oc = object_class_by_name(core_type);
> +
> + g_free(core_type);
> + if (!oc) {
> + return NULL;
> }
> - g_free(cpu_model);
>
> - return core_type;
> + return object_class_get_name(oc);
> }
>
> static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp)
> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> index cb5777a..48dc3f7 100644
> --- a/target/ppc/kvm.c
> +++ b/target/ppc/kvm.c
> @@ -123,7 +123,7 @@ static bool kvmppc_is_pr(KVMState *ks)
> return kvm_vm_check_extension(ks, KVM_CAP_PPC_GET_PVINFO) != 0;
> }
>
> -static int kvm_ppc_register_host_cpu_type(void);
> +static int kvm_ppc_register_host_cpu_type(MachineState *ms);
>
> int kvm_arch_init(MachineState *ms, KVMState *s)
> {
> @@ -163,7 +163,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
> "VM to stall at times!\n");
> }
>
> - kvm_ppc_register_host_cpu_type();
> + kvm_ppc_register_host_cpu_type(ms);
>
> return 0;
> }
> @@ -2487,12 +2487,13 @@ PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void)
> return pvr_pcc;
> }
>
> -static int kvm_ppc_register_host_cpu_type(void)
> +static int kvm_ppc_register_host_cpu_type(MachineState *ms)
> {
> TypeInfo type_info = {
> .name = TYPE_HOST_POWERPC_CPU,
> .class_init = kvmppc_host_cpu_class_init,
> };
> + MachineClass *mc = MACHINE_GET_CLASS(ms);
> PowerPCCPUClass *pvr_pcc;
> ObjectClass *oc;
> DeviceClass *dc;
> @@ -2504,6 +2505,10 @@ static int kvm_ppc_register_host_cpu_type(void)
> }
> type_info.parent = object_class_get_name(OBJECT_CLASS(pvr_pcc));
> type_register(&type_info);
> + if (object_dynamic_cast(ms, TYPE_SPAPR_MACHINE)) {
> + /* override TCG default cpu type with 'host' cpu model */
> + mc->default_cpu_type = TYPE_HOST_POWERPC_CPU;
> + }
>
> oc = object_class_by_name(type_info.name);
> g_assert(oc);
> diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> index 17ac95b..7b9bf6a 100644
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -10060,7 +10060,7 @@ PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr)
> return pcc;
> }
>
> -const char *ppc_cpu_lookup_alias(const char *alias)
> +static const char *ppc_cpu_lookup_alias(const char *alias)
> {
> int ai;
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 18/24] fixup! ppc: spapr: use generic cpu_model parsing
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 18/24] ppc: spapr: use generic cpu_model parsing Igor Mammedov
2017-10-10 2:07 ` David Gibson
@ 2017-10-12 15:50 ` Igor Mammedov
2017-10-12 22:24 ` David Gibson
1 sibling, 1 reply; 47+ messages in thread
From: Igor Mammedov @ 2017-10-12 15:50 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-ppc, agraf, david
inot sure how it managed to compile locally and on travis
but build fails with type mismatch on PPC host, fixup it
by casting to expected type
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
target/ppc/kvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 48dc3f7..9d57deb 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -2505,7 +2505,7 @@ static int kvm_ppc_register_host_cpu_type(MachineState *ms)
}
type_info.parent = object_class_get_name(OBJECT_CLASS(pvr_pcc));
type_register(&type_info);
- if (object_dynamic_cast(ms, TYPE_SPAPR_MACHINE)) {
+ if (object_dynamic_cast(OBJECT(ms), TYPE_SPAPR_MACHINE)) {
/* override TCG default cpu type with 'host' cpu model */
mc->default_cpu_type = TYPE_HOST_POWERPC_CPU;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 18/24] fixup! ppc: spapr: use generic cpu_model parsing
2017-10-12 15:50 ` [Qemu-devel] [PATCH v2 18/24] fixup! " Igor Mammedov
@ 2017-10-12 22:24 ` David Gibson
2017-10-23 4:43 ` Alexey Kardashevskiy
0 siblings, 1 reply; 47+ messages in thread
From: David Gibson @ 2017-10-12 22:24 UTC (permalink / raw)
To: Igor Mammedov; +Cc: qemu-devel, qemu-ppc, agraf
[-- Attachment #1: Type: text/plain, Size: 1281 bytes --]
On Thu, Oct 12, 2017 at 05:50:08PM +0200, Igor Mammedov wrote:
> inot sure how it managed to compile locally and on travis
Because target/ppc/kvm.c is only compiled on a ppc _host_.
> but build fails with type mismatch on PPC host, fixup it
> by casting to expected type
I already hit this one and fixed it up in place.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> ---
> target/ppc/kvm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> index 48dc3f7..9d57deb 100644
> --- a/target/ppc/kvm.c
> +++ b/target/ppc/kvm.c
> @@ -2505,7 +2505,7 @@ static int kvm_ppc_register_host_cpu_type(MachineState *ms)
> }
> type_info.parent = object_class_get_name(OBJECT_CLASS(pvr_pcc));
> type_register(&type_info);
> - if (object_dynamic_cast(ms, TYPE_SPAPR_MACHINE)) {
> + if (object_dynamic_cast(OBJECT(ms), TYPE_SPAPR_MACHINE)) {
> /* override TCG default cpu type with 'host' cpu model */
> mc->default_cpu_type = TYPE_HOST_POWERPC_CPU;
> }
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 18/24] fixup! ppc: spapr: use generic cpu_model parsing
2017-10-12 22:24 ` David Gibson
@ 2017-10-23 4:43 ` Alexey Kardashevskiy
0 siblings, 0 replies; 47+ messages in thread
From: Alexey Kardashevskiy @ 2017-10-23 4:43 UTC (permalink / raw)
To: David Gibson, Igor Mammedov; +Cc: qemu-ppc, qemu-devel, agraf
[-- Attachment #1: Type: text/plain, Size: 1236 bytes --]
On 13/10/17 09:24, David Gibson wrote:
> On Thu, Oct 12, 2017 at 05:50:08PM +0200, Igor Mammedov wrote:
>> inot sure how it managed to compile locally and on travis
>
> Because target/ppc/kvm.c is only compiled on a ppc _host_.
that or in cross environment, to be precise.
>
>> but build fails with type mismatch on PPC host, fixup it
>> by casting to expected type
>
> I already hit this one and fixed it up in place.
>
>>
>> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
>> ---
>> target/ppc/kvm.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
>> index 48dc3f7..9d57deb 100644
>> --- a/target/ppc/kvm.c
>> +++ b/target/ppc/kvm.c
>> @@ -2505,7 +2505,7 @@ static int kvm_ppc_register_host_cpu_type(MachineState *ms)
>> }
>> type_info.parent = object_class_get_name(OBJECT_CLASS(pvr_pcc));
>> type_register(&type_info);
>> - if (object_dynamic_cast(ms, TYPE_SPAPR_MACHINE)) {
>> + if (object_dynamic_cast(OBJECT(ms), TYPE_SPAPR_MACHINE)) {
>> /* override TCG default cpu type with 'host' cpu model */
>> mc->default_cpu_type = TYPE_HOST_POWERPC_CPU;
>> }
>
--
Alexey
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^ permalink raw reply [flat|nested] 47+ messages in thread
* [Qemu-devel] [PATCH v2 19/24] ppc: pnv: use generic cpu_model parsing
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (17 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 18/24] ppc: spapr: use generic cpu_model parsing Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-10 2:10 ` David Gibson
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 20/24] ppc: pnv: normalize core/chip type names Igor Mammedov
` (5 subsequent siblings)
24 siblings, 1 reply; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
use common cpu_model prasing in vl.c and set default cpu_model
using generic MachineClass::default_cpu_type.
Beside of switching to generic infrastructure it solves several
issues.
* ppc_cpu_class_by_name() is used to deal with lower/upper case
and alias translations into actual cpu type, which fixes
'-M powernv -cpu power8' and '-M powernv -cpu power9_v1.0'
usecases which error out with:
'invalid CPU model 'FOO' for powernv machine'
* allows to switch to lower-case typenames in pnv chip/core name
(by convention typnames should be lower-case)
* replace aliased names /power8, power9, .../ with exact cpu model
names (i.e. typenames should be stable but aliases might decide to
point to other cpu model withi family or changed by kvm). It will
also help to simplify pnv_chip/core code and get rid of dependency
on cpu_model parsing.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/ppc/pnv.h | 8 ++++----
hw/ppc/pnv.c | 22 ++++++++++------------
hw/ppc/pnv_core.c | 2 +-
3 files changed, 15 insertions(+), 17 deletions(-)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 9c5437d..2525f7f 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -80,19 +80,19 @@ typedef struct PnvChipClass {
uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id);
} PnvChipClass;
-#define TYPE_PNV_CHIP_POWER8E TYPE_PNV_CHIP "-POWER8E"
+#define TYPE_PNV_CHIP_POWER8E TYPE_PNV_CHIP "-power8e_v2.1"
#define PNV_CHIP_POWER8E(obj) \
OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8E)
-#define TYPE_PNV_CHIP_POWER8 TYPE_PNV_CHIP "-POWER8"
+#define TYPE_PNV_CHIP_POWER8 TYPE_PNV_CHIP "-power8_v2.0"
#define PNV_CHIP_POWER8(obj) \
OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8)
-#define TYPE_PNV_CHIP_POWER8NVL TYPE_PNV_CHIP "-POWER8NVL"
+#define TYPE_PNV_CHIP_POWER8NVL TYPE_PNV_CHIP "-power8nvl_v1.0"
#define PNV_CHIP_POWER8NVL(obj) \
OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8NVL)
-#define TYPE_PNV_CHIP_POWER9 TYPE_PNV_CHIP "-POWER9"
+#define TYPE_PNV_CHIP_POWER9 TYPE_PNV_CHIP "-power9_v1.0"
#define PNV_CHIP_POWER9(obj) \
OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER9)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 84b2389..707f38c 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -606,16 +606,13 @@ static void ppc_powernv_init(MachineState *machine)
}
}
- /* We need some cpu model to instantiate the PnvChip class */
- if (machine->cpu_model == NULL) {
- machine->cpu_model = "POWER8";
- }
-
/* Create the processor chips */
- chip_typename = g_strdup_printf(TYPE_PNV_CHIP "-%s", machine->cpu_model);
+ i = strlen(machine->cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX);
+ chip_typename = g_strdup_printf(TYPE_PNV_CHIP "-%.*s",
+ i, machine->cpu_type);
if (!object_class_by_name(chip_typename)) {
- error_report("invalid CPU model '%s' for %s machine",
- machine->cpu_model, MACHINE_GET_CLASS(machine)->name);
+ error_report("invalid CPU model '%.*s' for %s machine",
+ i, machine->cpu_type, MACHINE_GET_CLASS(machine)->name);
exit(1);
}
@@ -715,7 +712,7 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
- k->cpu_model = "POWER8E";
+ k->cpu_model = "power8e_v2.1";
k->chip_type = PNV_CHIP_POWER8E;
k->chip_cfam_id = 0x221ef04980000000ull; /* P8 Murano DD2.1 */
k->cores_mask = POWER8E_CORE_MASK;
@@ -737,7 +734,7 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
- k->cpu_model = "POWER8";
+ k->cpu_model = "power8_v2.0";
k->chip_type = PNV_CHIP_POWER8;
k->chip_cfam_id = 0x220ea04980000000ull; /* P8 Venice DD2.0 */
k->cores_mask = POWER8_CORE_MASK;
@@ -759,7 +756,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
- k->cpu_model = "POWER8NVL";
+ k->cpu_model = "power8nvl_v1.0";
k->chip_type = PNV_CHIP_POWER8NVL;
k->chip_cfam_id = 0x120d304980000000ull; /* P8 Naples DD1.0 */
k->cores_mask = POWER8_CORE_MASK;
@@ -781,7 +778,7 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
- k->cpu_model = "POWER9";
+ k->cpu_model = "power9_v1.0";
k->chip_type = PNV_CHIP_POWER9;
k->chip_cfam_id = 0x100d104980000000ull; /* P9 Nimbus DD1.0 */
k->cores_mask = POWER9_CORE_MASK;
@@ -1132,6 +1129,7 @@ static void powernv_machine_class_init(ObjectClass *oc, void *data)
mc->init = ppc_powernv_init;
mc->reset = ppc_powernv_reset;
mc->max_cpus = MAX_CPUS;
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
mc->block_default_type = IF_IDE; /* Pnv provides a AHCI device for
* storage */
mc->no_parallel = 1;
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 6726483..44b0b24 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -227,7 +227,7 @@ static const TypeInfo pnv_core_info = {
};
static const char *pnv_core_models[] = {
- "POWER8E", "POWER8", "POWER8NVL", "POWER9"
+ "power8e_v2.1", "power8_v2.0", "power8nvl_v1.0", "power9_v1.0"
};
static void pnv_core_register_types(void)
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 19/24] ppc: pnv: use generic cpu_model parsing
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 19/24] ppc: pnv: " Igor Mammedov
@ 2017-10-10 2:10 ` David Gibson
0 siblings, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-10-10 2:10 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Alexander Graf, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
[-- Attachment #1: Type: text/plain, Size: 2255 bytes --]
On Mon, Oct 09, 2017 at 09:51:06PM +0200, Igor Mammedov wrote:
> use common cpu_model prasing in vl.c and set default cpu_model
> using generic MachineClass::default_cpu_type.
>
> Beside of switching to generic infrastructure it solves several
> issues.
>
> * ppc_cpu_class_by_name() is used to deal with lower/upper case
> and alias translations into actual cpu type, which fixes
> '-M powernv -cpu power8' and '-M powernv -cpu power9_v1.0'
> usecases which error out with:
> 'invalid CPU model 'FOO' for powernv machine'
> * allows to switch to lower-case typenames in pnv chip/core name
> (by convention typnames should be lower-case)
> * replace aliased names /power8, power9, .../ with exact cpu model
> names (i.e. typenames should be stable but aliases might decide to
> point to other cpu model withi family or changed by kvm). It will
> also help to simplify pnv_chip/core code and get rid of dependency
> on cpu_model parsing.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> Reviewed-by: Cédric Le Goater <clg@kaod.org>
It wouldn't have had an actual patch collision, but this should have
the new power9 v2.0...
[...]
> -#define TYPE_PNV_CHIP_POWER9 TYPE_PNV_CHIP "-POWER9"
> +#define TYPE_PNV_CHIP_POWER9 TYPE_PNV_CHIP "-power9_v1.0"
> #define PNV_CHIP_POWER9(obj) \
> OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER9)
here
[...]
> @@ -781,7 +778,7 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
> DeviceClass *dc = DEVICE_CLASS(klass);
> PnvChipClass *k = PNV_CHIP_CLASS(klass);
>
> - k->cpu_model = "POWER9";
> + k->cpu_model = "power9_v1.0";
> k->chip_type = PNV_CHIP_POWER9;
> k->chip_cfam_id = 0x100d104980000000ull; /* P9 Nimbus DD1.0 */
> k->cores_mask = POWER9_CORE_MASK;
..and here..
> static const char *pnv_core_models[] = {
> - "POWER8E", "POWER8", "POWER8NVL", "POWER9"
> + "power8e_v2.1", "power8_v2.0", "power8nvl_v1.0", "power9_v1.0"
> };
..and here.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 47+ messages in thread
* [Qemu-devel] [PATCH v2 20/24] ppc: pnv: normalize core/chip type names
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (18 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 19/24] ppc: pnv: " Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 21/24] ppc: pnv: drop PnvCoreClass::cpu_oc field Igor Mammedov
` (4 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
typically for cpus/core type names following convention is used
new_type_prefix-superclass_typename
make PNV core/chip to follow common convention.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
include/hw/ppc/pnv.h | 11 +++++++----
include/hw/ppc/pnv_core.h | 2 ++
hw/ppc/pnv.c | 2 +-
hw/ppc/pnv_core.c | 2 +-
4 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 2525f7f..d82eee1 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -80,19 +80,22 @@ typedef struct PnvChipClass {
uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id);
} PnvChipClass;
-#define TYPE_PNV_CHIP_POWER8E TYPE_PNV_CHIP "-power8e_v2.1"
+#define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP
+#define PNV_CHIP_TYPE_NAME(cpu_model) cpu_model PNV_CHIP_TYPE_SUFFIX
+
+#define TYPE_PNV_CHIP_POWER8E PNV_CHIP_TYPE_NAME("power8e_v2.1")
#define PNV_CHIP_POWER8E(obj) \
OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8E)
-#define TYPE_PNV_CHIP_POWER8 TYPE_PNV_CHIP "-power8_v2.0"
+#define TYPE_PNV_CHIP_POWER8 PNV_CHIP_TYPE_NAME("power8_v2.0")
#define PNV_CHIP_POWER8(obj) \
OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8)
-#define TYPE_PNV_CHIP_POWER8NVL TYPE_PNV_CHIP "-power8nvl_v1.0"
+#define TYPE_PNV_CHIP_POWER8NVL PNV_CHIP_TYPE_NAME("power8nvl_v1.0")
#define PNV_CHIP_POWER8NVL(obj) \
OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8NVL)
-#define TYPE_PNV_CHIP_POWER9 TYPE_PNV_CHIP "-power9_v1.0"
+#define TYPE_PNV_CHIP_POWER9 PNV_CHIP_TYPE_NAME("power9_v1.0")
#define PNV_CHIP_POWER9(obj) \
OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER9)
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index 2955a41..3360c4b 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -45,6 +45,8 @@ typedef struct PnvCoreClass {
ObjectClass *cpu_oc;
} PnvCoreClass;
+#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
+#define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX
extern char *pnv_core_typename(const char *model);
#endif /* _PPC_PNV_CORE_H */
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 707f38c..3eafa28 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -608,7 +608,7 @@ static void ppc_powernv_init(MachineState *machine)
/* Create the processor chips */
i = strlen(machine->cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX);
- chip_typename = g_strdup_printf(TYPE_PNV_CHIP "-%.*s",
+ chip_typename = g_strdup_printf(PNV_CHIP_TYPE_NAME("%.*s"),
i, machine->cpu_type);
if (!object_class_by_name(chip_typename)) {
error_report("invalid CPU model '%.*s' for %s machine",
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 44b0b24..b3e3f23 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -252,5 +252,5 @@ type_init(pnv_core_register_types)
char *pnv_core_typename(const char *model)
{
- return g_strdup_printf(TYPE_PNV_CORE "-%s", model);
+ return g_strdup_printf(PNV_CORE_TYPE_NAME("%s"), model);
}
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 21/24] ppc: pnv: drop PnvCoreClass::cpu_oc field
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (19 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 20/24] ppc: pnv: normalize core/chip type names Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-11 17:24 ` Philippe Mathieu-Daudé
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 22/24] ppc: pnv: define core types statically Igor Mammedov
` (3 subsequent siblings)
24 siblings, 1 reply; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
deduce cpu type directly from core type instead of
maintaining type mapping in PnvCoreClass::cpu_oc and doing
extra cpu_model parsing in pnv_core_class_init()
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
v2:
- fix typo: s/pvn_core_cpu_typename/pnv_core_cpu_typename/
---
include/hw/ppc/pnv_core.h | 1 -
hw/ppc/pnv_core.c | 18 ++++++++++++------
2 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index 3360c4b..a336a1f 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -42,7 +42,6 @@ typedef struct PnvCore {
typedef struct PnvCoreClass {
DeviceClass parent_class;
- ObjectClass *cpu_oc;
} PnvCoreClass;
#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index b3e3f23..bd7f2c9 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -27,6 +27,16 @@
#include "hw/ppc/pnv_xscom.h"
#include "hw/ppc/xics.h"
+static const char *pnv_core_cpu_typename(PnvCore *pc)
+{
+ const char *core_type = object_class_get_name(object_get_class(OBJECT(pc)));
+ int len = strlen(core_type) - strlen(PNV_CORE_TYPE_SUFFIX);
+ char *s = g_strdup_printf(POWERPC_CPU_TYPE_NAME("%.*s"), len, core_type);
+ const char *cpu_type = object_class_get_name(object_class_by_name(s));
+ g_free(s);
+ return cpu_type;
+}
+
static void powernv_cpu_reset(void *opaque)
{
PowerPCCPU *cpu = opaque;
@@ -148,8 +158,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
{
PnvCore *pc = PNV_CORE(OBJECT(dev));
CPUCore *cc = CPU_CORE(OBJECT(dev));
- PnvCoreClass *pcc = PNV_CORE_GET_CLASS(OBJECT(dev));
- const char *typename = object_class_get_name(pcc->cpu_oc);
+ const char *typename = pnv_core_cpu_typename(pc);
size_t size = object_type_get_instance_size(typename);
Error *local_err = NULL;
void *obj;
@@ -211,11 +220,9 @@ static Property pnv_core_properties[] = {
static void pnv_core_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
- PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
dc->realize = pnv_core_realize;
dc->props = pnv_core_properties;
- pcc->cpu_oc = cpu_class_by_name(TYPE_POWERPC_CPU, data);
}
static const TypeInfo pnv_core_info = {
@@ -223,6 +230,7 @@ static const TypeInfo pnv_core_info = {
.parent = TYPE_CPU_CORE,
.instance_size = sizeof(PnvCore),
.class_size = sizeof(PnvCoreClass),
+ .class_init = pnv_core_class_init,
.abstract = true,
};
@@ -239,8 +247,6 @@ static void pnv_core_register_types(void)
TypeInfo ti = {
.parent = TYPE_PNV_CORE,
.instance_size = sizeof(PnvCore),
- .class_init = pnv_core_class_init,
- .class_data = (void *) pnv_core_models[i],
};
ti.name = pnv_core_typename(pnv_core_models[i]);
type_register(&ti);
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 21/24] ppc: pnv: drop PnvCoreClass::cpu_oc field
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 21/24] ppc: pnv: drop PnvCoreClass::cpu_oc field Igor Mammedov
@ 2017-10-11 17:24 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 47+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-10-11 17:24 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: open list:ppce500, Edgar E. Iglesias, Hervé Poussineau,
Alexander Graf, David Gibson
On 10/09/2017 04:51 PM, Igor Mammedov wrote:
> deduce cpu type directly from core type instead of
> maintaining type mapping in PnvCoreClass::cpu_oc and doing
> extra cpu_model parsing in pnv_core_class_init()
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> v2:
> - fix typo: s/pvn_core_cpu_typename/pnv_core_cpu_typename/
> ---
> include/hw/ppc/pnv_core.h | 1 -
> hw/ppc/pnv_core.c | 18 ++++++++++++------
> 2 files changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
> index 3360c4b..a336a1f 100644
> --- a/include/hw/ppc/pnv_core.h
> +++ b/include/hw/ppc/pnv_core.h
> @@ -42,7 +42,6 @@ typedef struct PnvCore {
>
> typedef struct PnvCoreClass {
> DeviceClass parent_class;
> - ObjectClass *cpu_oc;
> } PnvCoreClass;
>
> #define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
> index b3e3f23..bd7f2c9 100644
> --- a/hw/ppc/pnv_core.c
> +++ b/hw/ppc/pnv_core.c
> @@ -27,6 +27,16 @@
> #include "hw/ppc/pnv_xscom.h"
> #include "hw/ppc/xics.h"
>
> +static const char *pnv_core_cpu_typename(PnvCore *pc)
> +{
> + const char *core_type = object_class_get_name(object_get_class(OBJECT(pc)));
> + int len = strlen(core_type) - strlen(PNV_CORE_TYPE_SUFFIX);
> + char *s = g_strdup_printf(POWERPC_CPU_TYPE_NAME("%.*s"), len, core_type);
> + const char *cpu_type = object_class_get_name(object_class_by_name(s));
> + g_free(s);
> + return cpu_type;
> +}
> +
> static void powernv_cpu_reset(void *opaque)
> {
> PowerPCCPU *cpu = opaque;
> @@ -148,8 +158,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
> {
> PnvCore *pc = PNV_CORE(OBJECT(dev));
> CPUCore *cc = CPU_CORE(OBJECT(dev));
> - PnvCoreClass *pcc = PNV_CORE_GET_CLASS(OBJECT(dev));
> - const char *typename = object_class_get_name(pcc->cpu_oc);
> + const char *typename = pnv_core_cpu_typename(pc);
> size_t size = object_type_get_instance_size(typename);
> Error *local_err = NULL;
> void *obj;
> @@ -211,11 +220,9 @@ static Property pnv_core_properties[] = {
> static void pnv_core_class_init(ObjectClass *oc, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(oc);
> - PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
>
> dc->realize = pnv_core_realize;
> dc->props = pnv_core_properties;
> - pcc->cpu_oc = cpu_class_by_name(TYPE_POWERPC_CPU, data);
> }
>
> static const TypeInfo pnv_core_info = {
> @@ -223,6 +230,7 @@ static const TypeInfo pnv_core_info = {
> .parent = TYPE_CPU_CORE,
> .instance_size = sizeof(PnvCore),
> .class_size = sizeof(PnvCoreClass),
> + .class_init = pnv_core_class_init,
> .abstract = true,
> };
>
> @@ -239,8 +247,6 @@ static void pnv_core_register_types(void)
> TypeInfo ti = {
> .parent = TYPE_PNV_CORE,
> .instance_size = sizeof(PnvCore),
> - .class_init = pnv_core_class_init,
> - .class_data = (void *) pnv_core_models[i],
> };
> ti.name = pnv_core_typename(pnv_core_models[i]);
> type_register(&ti);
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [Qemu-devel] [PATCH v2 22/24] ppc: pnv: define core types statically
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (20 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 21/24] ppc: pnv: drop PnvCoreClass::cpu_oc field Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 23/24] ppc: pnv: drop PnvChipClass::cpu_model field Igor Mammedov
` (2 subsequent siblings)
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
pnv core type definition doesn't have any fields that
require it to be defined at runtime. So replace code
that fills in TypeInfo at runtime with static TypeInfo
array that does the same at complie time.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/pnv_core.c | 48 ++++++++++++++++++++----------------------------
1 file changed, 20 insertions(+), 28 deletions(-)
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index bd7f2c9..438dbd1 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -225,38 +225,30 @@ static void pnv_core_class_init(ObjectClass *oc, void *data)
dc->props = pnv_core_properties;
}
-static const TypeInfo pnv_core_info = {
- .name = TYPE_PNV_CORE,
- .parent = TYPE_CPU_CORE,
- .instance_size = sizeof(PnvCore),
- .class_size = sizeof(PnvCoreClass),
- .class_init = pnv_core_class_init,
- .abstract = true,
-};
-
-static const char *pnv_core_models[] = {
- "power8e_v2.1", "power8_v2.0", "power8nvl_v1.0", "power9_v1.0"
-};
-
-static void pnv_core_register_types(void)
-{
- int i ;
-
- type_register_static(&pnv_core_info);
- for (i = 0; i < ARRAY_SIZE(pnv_core_models); ++i) {
- TypeInfo ti = {
- .parent = TYPE_PNV_CORE,
- .instance_size = sizeof(PnvCore),
- };
- ti.name = pnv_core_typename(pnv_core_models[i]);
- type_register(&ti);
- g_free((void *)ti.name);
+#define DEFINE_PNV_CORE_TYPE(cpu_model) \
+ { \
+ .parent = TYPE_PNV_CORE, \
+ .name = PNV_CORE_TYPE_NAME(cpu_model), \
}
-}
-type_init(pnv_core_register_types)
+static const TypeInfo pnv_core_infos[] = {
+ {
+ .name = TYPE_PNV_CORE,
+ .parent = TYPE_CPU_CORE,
+ .instance_size = sizeof(PnvCore),
+ .class_size = sizeof(PnvCoreClass),
+ .class_init = pnv_core_class_init,
+ .abstract = true,
+ },
+ DEFINE_PNV_CORE_TYPE("power8e_v2.1"),
+ DEFINE_PNV_CORE_TYPE("power8_v2.0"),
+ DEFINE_PNV_CORE_TYPE("power8nvl_v1.0"),
+ DEFINE_PNV_CORE_TYPE("power9_v1.0"),
+};
char *pnv_core_typename(const char *model)
{
return g_strdup_printf(PNV_CORE_TYPE_NAME("%s"), model);
}
+
+DEFINE_TYPES(pnv_core_infos)
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* [Qemu-devel] [PATCH v2 23/24] ppc: pnv: drop PnvChipClass::cpu_model field
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (21 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 22/24] ppc: pnv: define core types statically Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-11 17:23 ` Philippe Mathieu-Daudé
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 24/24] ppc: pnv: consolidate type definitions and batch register them Igor Mammedov
2017-10-10 2:21 ` [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) David Gibson
24 siblings, 1 reply; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
deduce core type directly from chip type instead of
maintaining type mapping in PnvChipClass::cpu_model.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
v2:
- fix typo: s/pvn_chip_core_typename/pnv_chip_core_typename/
---
include/hw/ppc/pnv.h | 1 -
include/hw/ppc/pnv_core.h | 1 -
hw/ppc/pnv.c | 25 +++++++++++++------------
hw/ppc/pnv_core.c | 5 -----
4 files changed, 13 insertions(+), 19 deletions(-)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index d82eee1..20244da 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -69,7 +69,6 @@ typedef struct PnvChipClass {
SysBusDeviceClass parent_class;
/*< public >*/
- const char *cpu_model;
PnvChipType chip_type;
uint64_t chip_cfam_id;
uint64_t cores_mask;
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index a336a1f..e337af7 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -46,6 +46,5 @@ typedef struct PnvCoreClass {
#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
#define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX
-extern char *pnv_core_typename(const char *model);
#endif /* _PPC_PNV_CORE_H */
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 3eafa28..80c7f62 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -55,6 +55,16 @@
#define KERNEL_LOAD_ADDR 0x20000000
#define INITRD_LOAD_ADDR 0x40000000
+static const char *pnv_chip_core_typename(const PnvChip *o)
+{
+ const char *chip_type = object_class_get_name(object_get_class(OBJECT(o)));
+ int len = strlen(chip_type) - strlen(PNV_CHIP_TYPE_SUFFIX);
+ char *s = g_strdup_printf(PNV_CORE_TYPE_NAME("%.*s"), len, chip_type);
+ const char *core_type = object_class_get_name(object_class_by_name(s));
+ g_free(s);
+ return core_type;
+}
+
/*
* On Power Systems E880 (POWER8), the max cpus (threads) should be :
* 4 * 4 sockets * 12 cores * 8 threads = 1536
@@ -269,8 +279,7 @@ static int pnv_chip_lpc_offset(PnvChip *chip, void *fdt)
static void powernv_populate_chip(PnvChip *chip, void *fdt)
{
- PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
- char *typename = pnv_core_typename(pcc->cpu_model);
+ const char *typename = pnv_chip_core_typename(chip);
size_t typesize = object_type_get_instance_size(typename);
int i;
@@ -300,7 +309,6 @@ static void powernv_populate_chip(PnvChip *chip, void *fdt)
powernv_populate_memory_node(fdt, chip->chip_id, chip->ram_start,
chip->ram_size);
}
- g_free(typename);
}
static void powernv_populate_rtc(ISADevice *d, void *fdt, int lpc_off)
@@ -712,7 +720,6 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
- k->cpu_model = "power8e_v2.1";
k->chip_type = PNV_CHIP_POWER8E;
k->chip_cfam_id = 0x221ef04980000000ull; /* P8 Murano DD2.1 */
k->cores_mask = POWER8E_CORE_MASK;
@@ -734,7 +741,6 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
- k->cpu_model = "power8_v2.0";
k->chip_type = PNV_CHIP_POWER8;
k->chip_cfam_id = 0x220ea04980000000ull; /* P8 Venice DD2.0 */
k->cores_mask = POWER8_CORE_MASK;
@@ -756,7 +762,6 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
- k->cpu_model = "power8nvl_v1.0";
k->chip_type = PNV_CHIP_POWER8NVL;
k->chip_cfam_id = 0x120d304980000000ull; /* P8 Naples DD1.0 */
k->cores_mask = POWER8_CORE_MASK;
@@ -778,7 +783,6 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PnvChipClass *k = PNV_CHIP_CLASS(klass);
- k->cpu_model = "power9_v1.0";
k->chip_type = PNV_CHIP_POWER9;
k->chip_cfam_id = 0x100d104980000000ull; /* P9 Nimbus DD1.0 */
k->cores_mask = POWER9_CORE_MASK;
@@ -853,7 +857,7 @@ static void pnv_chip_init(Object *obj)
static void pnv_chip_icp_realize(PnvChip *chip, Error **errp)
{
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
- char *typename = pnv_core_typename(pcc->cpu_model);
+ const char *typename = pnv_chip_core_typename(chip);
size_t typesize = object_type_get_instance_size(typename);
int i, j;
char *name;
@@ -878,8 +882,6 @@ static void pnv_chip_icp_realize(PnvChip *chip, Error **errp)
memory_region_add_subregion(&chip->icp_mmio, pir << 12, &icp->mmio);
}
}
-
- g_free(typename);
}
static void pnv_chip_realize(DeviceState *dev, Error **errp)
@@ -887,7 +889,7 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp)
PnvChip *chip = PNV_CHIP(dev);
Error *error = NULL;
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
- char *typename = pnv_core_typename(pcc->cpu_model);
+ const char *typename = pnv_chip_core_typename(chip);
size_t typesize = object_type_get_instance_size(typename);
int i, core_hwid;
@@ -946,7 +948,6 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp)
&PNV_CORE(pnv_core)->xscom_regs);
i++;
}
- g_free(typename);
/* Create LPC controller */
object_property_set_bool(OBJECT(&chip->lpc), true, "realized",
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 438dbd1..71eb90a 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -246,9 +246,4 @@ static const TypeInfo pnv_core_infos[] = {
DEFINE_PNV_CORE_TYPE("power9_v1.0"),
};
-char *pnv_core_typename(const char *model)
-{
- return g_strdup_printf(PNV_CORE_TYPE_NAME("%s"), model);
-}
-
DEFINE_TYPES(pnv_core_infos)
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 23/24] ppc: pnv: drop PnvChipClass::cpu_model field
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 23/24] ppc: pnv: drop PnvChipClass::cpu_model field Igor Mammedov
@ 2017-10-11 17:23 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 47+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-10-11 17:23 UTC (permalink / raw)
To: Igor Mammedov, qemu-devel
Cc: open list:ppce500, Edgar E. Iglesias, Hervé Poussineau,
Alexander Graf, David Gibson
On 10/09/2017 04:51 PM, Igor Mammedov wrote:
> deduce core type directly from chip type instead of
> maintaining type mapping in PnvChipClass::cpu_model.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> v2:
> - fix typo: s/pvn_chip_core_typename/pnv_chip_core_typename/
> ---
> include/hw/ppc/pnv.h | 1 -
> include/hw/ppc/pnv_core.h | 1 -
> hw/ppc/pnv.c | 25 +++++++++++++------------
> hw/ppc/pnv_core.c | 5 -----
> 4 files changed, 13 insertions(+), 19 deletions(-)
>
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index d82eee1..20244da 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -69,7 +69,6 @@ typedef struct PnvChipClass {
> SysBusDeviceClass parent_class;
>
> /*< public >*/
> - const char *cpu_model;
> PnvChipType chip_type;
> uint64_t chip_cfam_id;
> uint64_t cores_mask;
> diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
> index a336a1f..e337af7 100644
> --- a/include/hw/ppc/pnv_core.h
> +++ b/include/hw/ppc/pnv_core.h
> @@ -46,6 +46,5 @@ typedef struct PnvCoreClass {
>
> #define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
> #define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX
> -extern char *pnv_core_typename(const char *model);
>
> #endif /* _PPC_PNV_CORE_H */
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 3eafa28..80c7f62 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -55,6 +55,16 @@
> #define KERNEL_LOAD_ADDR 0x20000000
> #define INITRD_LOAD_ADDR 0x40000000
>
> +static const char *pnv_chip_core_typename(const PnvChip *o)
> +{
> + const char *chip_type = object_class_get_name(object_get_class(OBJECT(o)));
> + int len = strlen(chip_type) - strlen(PNV_CHIP_TYPE_SUFFIX);
> + char *s = g_strdup_printf(PNV_CORE_TYPE_NAME("%.*s"), len, chip_type);
> + const char *core_type = object_class_get_name(object_class_by_name(s));
> + g_free(s);
> + return core_type;
> +}
> +
> /*
> * On Power Systems E880 (POWER8), the max cpus (threads) should be :
> * 4 * 4 sockets * 12 cores * 8 threads = 1536
> @@ -269,8 +279,7 @@ static int pnv_chip_lpc_offset(PnvChip *chip, void *fdt)
>
> static void powernv_populate_chip(PnvChip *chip, void *fdt)
> {
> - PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
> - char *typename = pnv_core_typename(pcc->cpu_model);
> + const char *typename = pnv_chip_core_typename(chip);
> size_t typesize = object_type_get_instance_size(typename);
> int i;
>
> @@ -300,7 +309,6 @@ static void powernv_populate_chip(PnvChip *chip, void *fdt)
> powernv_populate_memory_node(fdt, chip->chip_id, chip->ram_start,
> chip->ram_size);
> }
> - g_free(typename);
> }
>
> static void powernv_populate_rtc(ISADevice *d, void *fdt, int lpc_off)
> @@ -712,7 +720,6 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data)
> DeviceClass *dc = DEVICE_CLASS(klass);
> PnvChipClass *k = PNV_CHIP_CLASS(klass);
>
> - k->cpu_model = "power8e_v2.1";
> k->chip_type = PNV_CHIP_POWER8E;
> k->chip_cfam_id = 0x221ef04980000000ull; /* P8 Murano DD2.1 */
> k->cores_mask = POWER8E_CORE_MASK;
> @@ -734,7 +741,6 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data)
> DeviceClass *dc = DEVICE_CLASS(klass);
> PnvChipClass *k = PNV_CHIP_CLASS(klass);
>
> - k->cpu_model = "power8_v2.0";
> k->chip_type = PNV_CHIP_POWER8;
> k->chip_cfam_id = 0x220ea04980000000ull; /* P8 Venice DD2.0 */
> k->cores_mask = POWER8_CORE_MASK;
> @@ -756,7 +762,6 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data)
> DeviceClass *dc = DEVICE_CLASS(klass);
> PnvChipClass *k = PNV_CHIP_CLASS(klass);
>
> - k->cpu_model = "power8nvl_v1.0";
> k->chip_type = PNV_CHIP_POWER8NVL;
> k->chip_cfam_id = 0x120d304980000000ull; /* P8 Naples DD1.0 */
> k->cores_mask = POWER8_CORE_MASK;
> @@ -778,7 +783,6 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
> DeviceClass *dc = DEVICE_CLASS(klass);
> PnvChipClass *k = PNV_CHIP_CLASS(klass);
>
> - k->cpu_model = "power9_v1.0";
> k->chip_type = PNV_CHIP_POWER9;
> k->chip_cfam_id = 0x100d104980000000ull; /* P9 Nimbus DD1.0 */
> k->cores_mask = POWER9_CORE_MASK;
> @@ -853,7 +857,7 @@ static void pnv_chip_init(Object *obj)
> static void pnv_chip_icp_realize(PnvChip *chip, Error **errp)
> {
> PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
> - char *typename = pnv_core_typename(pcc->cpu_model);
> + const char *typename = pnv_chip_core_typename(chip);
> size_t typesize = object_type_get_instance_size(typename);
> int i, j;
> char *name;
> @@ -878,8 +882,6 @@ static void pnv_chip_icp_realize(PnvChip *chip, Error **errp)
> memory_region_add_subregion(&chip->icp_mmio, pir << 12, &icp->mmio);
> }
> }
> -
> - g_free(typename);
> }
>
> static void pnv_chip_realize(DeviceState *dev, Error **errp)
> @@ -887,7 +889,7 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp)
> PnvChip *chip = PNV_CHIP(dev);
> Error *error = NULL;
> PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
> - char *typename = pnv_core_typename(pcc->cpu_model);
> + const char *typename = pnv_chip_core_typename(chip);
> size_t typesize = object_type_get_instance_size(typename);
> int i, core_hwid;
>
> @@ -946,7 +948,6 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp)
> &PNV_CORE(pnv_core)->xscom_regs);
> i++;
> }
> - g_free(typename);
>
> /* Create LPC controller */
> object_property_set_bool(OBJECT(&chip->lpc), true, "realized",
> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
> index 438dbd1..71eb90a 100644
> --- a/hw/ppc/pnv_core.c
> +++ b/hw/ppc/pnv_core.c
> @@ -246,9 +246,4 @@ static const TypeInfo pnv_core_infos[] = {
> DEFINE_PNV_CORE_TYPE("power9_v1.0"),
> };
>
> -char *pnv_core_typename(const char *model)
> -{
> - return g_strdup_printf(PNV_CORE_TYPE_NAME("%s"), model);
> -}
> -
> DEFINE_TYPES(pnv_core_infos)
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* [Qemu-devel] [PATCH v2 24/24] ppc: pnv: consolidate type definitions and batch register them
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (22 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 23/24] ppc: pnv: drop PnvChipClass::cpu_model field Igor Mammedov
@ 2017-10-09 19:51 ` Igor Mammedov
2017-10-10 2:21 ` [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) David Gibson
24 siblings, 0 replies; 47+ messages in thread
From: Igor Mammedov @ 2017-10-09 19:51 UTC (permalink / raw)
To: qemu-devel
Cc: Alexander Graf, David Gibson, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
Use a new DEFINE_TYPES() helper to simplify type registration
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/pnv.c | 92 ++++++++++++++++++++++--------------------------------------
1 file changed, 34 insertions(+), 58 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 80c7f62..c35c439 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -729,13 +729,6 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV Chip POWER8E";
}
-static const TypeInfo pnv_chip_power8e_info = {
- .name = TYPE_PNV_CHIP_POWER8E,
- .parent = TYPE_PNV_CHIP,
- .instance_size = sizeof(PnvChip),
- .class_init = pnv_chip_power8e_class_init,
-};
-
static void pnv_chip_power8_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -750,13 +743,6 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV Chip POWER8";
}
-static const TypeInfo pnv_chip_power8_info = {
- .name = TYPE_PNV_CHIP_POWER8,
- .parent = TYPE_PNV_CHIP,
- .instance_size = sizeof(PnvChip),
- .class_init = pnv_chip_power8_class_init,
-};
-
static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -771,13 +757,6 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV Chip POWER8NVL";
}
-static const TypeInfo pnv_chip_power8nvl_info = {
- .name = TYPE_PNV_CHIP_POWER8NVL,
- .parent = TYPE_PNV_CHIP,
- .instance_size = sizeof(PnvChip),
- .class_init = pnv_chip_power8nvl_class_init,
-};
-
static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -792,13 +771,6 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV Chip POWER9";
}
-static const TypeInfo pnv_chip_power9_info = {
- .name = TYPE_PNV_CHIP_POWER9,
- .parent = TYPE_PNV_CHIP,
- .instance_size = sizeof(PnvChip),
- .class_init = pnv_chip_power9_class_init,
-};
-
static void pnv_chip_core_sanitize(PnvChip *chip, Error **errp)
{
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
@@ -1000,15 +972,6 @@ static void pnv_chip_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV Chip";
}
-static const TypeInfo pnv_chip_info = {
- .name = TYPE_PNV_CHIP,
- .parent = TYPE_SYS_BUS_DEVICE,
- .class_init = pnv_chip_class_init,
- .instance_init = pnv_chip_init,
- .class_size = sizeof(PnvChipClass),
- .abstract = true,
-};
-
static ICSState *pnv_ics_get(XICSFabric *xi, int irq)
{
PnvMachineState *pnv = POWERNV_MACHINE(xi);
@@ -1144,27 +1107,40 @@ static void powernv_machine_class_init(ObjectClass *oc, void *data)
powernv_machine_class_props_init(oc);
}
-static const TypeInfo powernv_machine_info = {
- .name = TYPE_POWERNV_MACHINE,
- .parent = TYPE_MACHINE,
- .instance_size = sizeof(PnvMachineState),
- .instance_init = powernv_machine_initfn,
- .class_init = powernv_machine_class_init,
- .interfaces = (InterfaceInfo[]) {
- { TYPE_XICS_FABRIC },
- { TYPE_INTERRUPT_STATS_PROVIDER },
- { },
+#define DEFINE_PNV_CHIP_TYPE(type, class_initfn) \
+ { \
+ .name = type, \
+ .class_init = class_initfn, \
+ .parent = TYPE_PNV_CHIP, \
+ }
+
+static const TypeInfo types[] = {
+ {
+ .name = TYPE_POWERNV_MACHINE,
+ .parent = TYPE_MACHINE,
+ .instance_size = sizeof(PnvMachineState),
+ .instance_init = powernv_machine_initfn,
+ .class_init = powernv_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_XICS_FABRIC },
+ { TYPE_INTERRUPT_STATS_PROVIDER },
+ { },
+ },
},
+ {
+ .name = TYPE_PNV_CHIP,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .class_init = pnv_chip_class_init,
+ .instance_init = pnv_chip_init,
+ .instance_size = sizeof(PnvChip),
+ .class_size = sizeof(PnvChipClass),
+ .abstract = true,
+ },
+ DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER9, pnv_chip_power9_class_init),
+ DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER8, pnv_chip_power8_class_init),
+ DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER8E, pnv_chip_power8e_class_init),
+ DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER8NVL,
+ pnv_chip_power8nvl_class_init),
};
-static void powernv_machine_register_types(void)
-{
- type_register_static(&powernv_machine_info);
- type_register_static(&pnv_chip_info);
- type_register_static(&pnv_chip_power8e_info);
- type_register_static(&pnv_chip_power8_info);
- type_register_static(&pnv_chip_power8nvl_info);
- type_register_static(&pnv_chip_power9_info);
-}
-
-type_init(powernv_machine_register_types)
+DEFINE_TYPES(types)
--
2.7.4
^ permalink raw reply related [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC)
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
` (23 preceding siblings ...)
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 24/24] ppc: pnv: consolidate type definitions and batch register them Igor Mammedov
@ 2017-10-10 2:21 ` David Gibson
2017-10-10 11:38 ` Igor Mammedov
24 siblings, 1 reply; 47+ messages in thread
From: David Gibson @ 2017-10-10 2:21 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Alexander Graf, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
[-- Attachment #1: Type: text/plain, Size: 5711 bytes --]
On Mon, Oct 09, 2017 at 09:50:47PM +0200, Igor Mammedov wrote:
Applied to ppc-for-2.11. There was a small error in 19/24, which
reverted pnv to defaulting to POWER9 v1.0 whereas I've recently
changed it to v2.0. Rather than requiring a respin I adjusted that
myself, and fixed the minor conflicts in the subsequent patches.
> Changelog:
> - v2:
> * rebase on dgibson/ppc-for-2.11 tree
> * fix typo: s/pvn_chip_core_typename/pnv_chip_core_typename/
> * fix typo: s/pvn_core_cpu_typename/pnv_core_cpu_typename/
> * limit setting default cpu type to 'host' type only for spapr machine
> * split out ppc_cpu_lookup_alias() movement into separate patch
> * fix rebase conflict: add newly added power9_v2 core
> * set "max-cpu-compat" property only if it exists,
> in practice it should limit 'compat' hack to spapr
> and allow to avoid including machine/spapr headers
> in target/ppc/cpu.c
> * do compat= parsing only if machine."max-cpu-compat" exists
> that would match what current code practically does.
> * add newline before ppc_cpu_parse_featurestr() definition
> * pickup Acked-by/Reviewed-by where it's appropriate
>
> this series is continuation of effort to remove boards dependency on
> cpu_model parsing and generalizing default cpu type handling.
> For background story look at merged:
>
> [PATCH v2 0/5] generalize parsing of cpu_model (x86/arm)
> https://lists.gnu.org/archive/html/qemu-devel/2017-09/msg03564.html
>
> Part 3 is independent subset that takes care of all PPC boards.
> Series borrows the 1st 3 patches from earlier posted part 2
> qom: update doc comment for type_register[_static]()
> qom: introduce type_register_static_array()
> qom: add helper macro DEFINE_TYPES()
> to avoid interdependency, hopefully this 3 will be merged via machine-next,
> but it's fine for them to go via any tree (whichever first)
>
> Beside of switching to generic cpu_model parsing series contains a bunch
> of cleanups/simplifications which reduces code a bit and normalizes
> code that I've happend to touch to a typical QEMU patterns.
>
> git tree for testing:
> https://github.com/imammedo/qemu/branches cpu_init_removal_ppc_part3_v2
>
> Refference to v1:
> https://lists.gnu.org/archive/html/qemu-devel/2017-10/msg01087.html
>
>
> CC: Alexander Graf <agraf@suse.de> (supporter:ppce500)
> CC: David Gibson <david@gibson.dropbear.id.au> (maintainer:PowerPC)
> CC: "Hervé Poussineau" <hpoussin@reactos.org> (maintainer:PReP)
> CC: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> (odd fixer:virtex_ml507)
> CC: qemu-ppc@nongnu.org (open list:ppce500)
>
> Igor Mammedov (24):
> qom: update doc comment for type_register[_static]()
> qom: introduce type_register_static_array()
> qom: add helper macro DEFINE_TYPES()
> ppc: mpc8544ds/e500plat: use generic cpu_model parsing
> ppc: mac_newworld: use generic cpu_model parsing
> ppc: mac_oldworld: use generic cpu_model parsing
> ppc: bamboo: use generic cpu_model parsing
> ppc: replace cpu_model with cpu_type on ref405ep,taihu boards
> ppc: virtex-ml507: replace cpu_model with cpu_type
> ppc: 40p/prep: replace cpu_model with cpu_type
> ppc: spapr: replace ppc_cpu_parse_features() with
> cpu_parse_cpu_model()
> ppc: move '-cpu foo,compat=xxx' parsing into
> ppc_cpu_parse_featurestr()
> ppc: spapr: define core types statically
> ppc: spapr: use cpu type name directly
> ppc: spapr: register 'host' core type along with the rest of core
> types
> ppc: spapr: use cpu model names as tcg defaults instead of aliases
> ppc: move ppc_cpu_lookup_alias() before its first user
> ppc: spapr: use generic cpu_model parsing
> ppc: pnv: use generic cpu_model parsing
> ppc: pnv: normalize core/chip type names
> ppc: pnv: drop PnvCoreClass::cpu_oc field
> ppc: pnv: define core types statically
> ppc: pnv: drop PnvChipClass::cpu_model field
> ppc: pnv: consolidate type definitions and batch register them
>
> include/hw/ppc/pnv.h | 12 +--
> include/hw/ppc/pnv_core.h | 4 +-
> include/hw/ppc/ppc.h | 2 -
> include/hw/ppc/spapr.h | 2 -
> include/hw/ppc/spapr_cpu_core.h | 7 +-
> include/qom/object.h | 50 ++++++++++-
> target/ppc/cpu-qom.h | 1 +
> target/ppc/cpu.h | 1 -
> hw/ppc/e500.c | 8 +-
> hw/ppc/e500plat.c | 1 +
> hw/ppc/mac_newworld.c | 15 ++--
> hw/ppc/mac_oldworld.c | 6 +-
> hw/ppc/mpc8544ds.c | 2 +
> hw/ppc/pnv.c | 131 ++++++++++++----------------
> hw/ppc/pnv_core.c | 67 +++++++--------
> hw/ppc/ppc.c | 25 ------
> hw/ppc/ppc405_uc.c | 6 +-
> hw/ppc/ppc440_bamboo.c | 7 +-
> hw/ppc/ppc4xx_devs.c | 4 +-
> hw/ppc/prep.c | 12 +--
> hw/ppc/spapr.c | 22 ++---
> hw/ppc/spapr_cpu_core.c | 184 ++++++++++------------------------------
> hw/ppc/virtex_ml507.c | 11 +--
> qom/object.c | 9 ++
> target/ppc/kvm.c | 22 ++---
> target/ppc/translate_init.c | 69 +++++++++++++--
> 26 files changed, 305 insertions(+), 375 deletions(-)
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 47+ messages in thread* Re: [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC)
2017-10-10 2:21 ` [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) David Gibson
@ 2017-10-10 11:38 ` Igor Mammedov
2017-10-10 12:21 ` David Gibson
0 siblings, 1 reply; 47+ messages in thread
From: Igor Mammedov @ 2017-10-10 11:38 UTC (permalink / raw)
To: David Gibson
Cc: qemu-devel, Alexander Graf, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
On Tue, 10 Oct 2017 13:21:37 +1100
David Gibson <david@gibson.dropbear.id.au> wrote:
> On Mon, Oct 09, 2017 at 09:50:47PM +0200, Igor Mammedov wrote:
>
> Applied to ppc-for-2.11. There was a small error in 19/24, which
> reverted pnv to defaulting to POWER9 v1.0 whereas I've recently
> changed it to v2.0. Rather than requiring a respin I adjusted that
> myself, and fixed the minor conflicts in the subsequent patches.
there were conflicts in spapr code but not in pnv, so I haven't noticed.
I've checked commit on ppc-for-2.11 branch and it looks good.
Anyways thanks for fixing it up.
>
> > Changelog:
> > - v2:
> > * rebase on dgibson/ppc-for-2.11 tree
> > * fix typo: s/pvn_chip_core_typename/pnv_chip_core_typename/
> > * fix typo: s/pvn_core_cpu_typename/pnv_core_cpu_typename/
> > * limit setting default cpu type to 'host' type only for spapr machine
> > * split out ppc_cpu_lookup_alias() movement into separate patch
> > * fix rebase conflict: add newly added power9_v2 core
> > * set "max-cpu-compat" property only if it exists,
> > in practice it should limit 'compat' hack to spapr
> > and allow to avoid including machine/spapr headers
> > in target/ppc/cpu.c
> > * do compat= parsing only if machine."max-cpu-compat" exists
> > that would match what current code practically does.
> > * add newline before ppc_cpu_parse_featurestr() definition
> > * pickup Acked-by/Reviewed-by where it's appropriate
> >
> > this series is continuation of effort to remove boards dependency on
> > cpu_model parsing and generalizing default cpu type handling.
> > For background story look at merged:
> >
> > [PATCH v2 0/5] generalize parsing of cpu_model (x86/arm)
> > https://lists.gnu.org/archive/html/qemu-devel/2017-09/msg03564.html
> >
> > Part 3 is independent subset that takes care of all PPC boards.
> > Series borrows the 1st 3 patches from earlier posted part 2
> > qom: update doc comment for type_register[_static]()
> > qom: introduce type_register_static_array()
> > qom: add helper macro DEFINE_TYPES()
> > to avoid interdependency, hopefully this 3 will be merged via machine-next,
> > but it's fine for them to go via any tree (whichever first)
> >
> > Beside of switching to generic cpu_model parsing series contains a bunch
> > of cleanups/simplifications which reduces code a bit and normalizes
> > code that I've happend to touch to a typical QEMU patterns.
> >
> > git tree for testing:
> > https://github.com/imammedo/qemu/branches cpu_init_removal_ppc_part3_v2
> >
> > Refference to v1:
> > https://lists.gnu.org/archive/html/qemu-devel/2017-10/msg01087.html
> >
> >
> > CC: Alexander Graf <agraf@suse.de> (supporter:ppce500)
> > CC: David Gibson <david@gibson.dropbear.id.au> (maintainer:PowerPC)
> > CC: "Hervé Poussineau" <hpoussin@reactos.org> (maintainer:PReP)
> > CC: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> (odd fixer:virtex_ml507)
> > CC: qemu-ppc@nongnu.org (open list:ppce500)
> >
> > Igor Mammedov (24):
> > qom: update doc comment for type_register[_static]()
> > qom: introduce type_register_static_array()
> > qom: add helper macro DEFINE_TYPES()
> > ppc: mpc8544ds/e500plat: use generic cpu_model parsing
> > ppc: mac_newworld: use generic cpu_model parsing
> > ppc: mac_oldworld: use generic cpu_model parsing
> > ppc: bamboo: use generic cpu_model parsing
> > ppc: replace cpu_model with cpu_type on ref405ep,taihu boards
> > ppc: virtex-ml507: replace cpu_model with cpu_type
> > ppc: 40p/prep: replace cpu_model with cpu_type
> > ppc: spapr: replace ppc_cpu_parse_features() with
> > cpu_parse_cpu_model()
> > ppc: move '-cpu foo,compat=xxx' parsing into
> > ppc_cpu_parse_featurestr()
> > ppc: spapr: define core types statically
> > ppc: spapr: use cpu type name directly
> > ppc: spapr: register 'host' core type along with the rest of core
> > types
> > ppc: spapr: use cpu model names as tcg defaults instead of aliases
> > ppc: move ppc_cpu_lookup_alias() before its first user
> > ppc: spapr: use generic cpu_model parsing
> > ppc: pnv: use generic cpu_model parsing
> > ppc: pnv: normalize core/chip type names
> > ppc: pnv: drop PnvCoreClass::cpu_oc field
> > ppc: pnv: define core types statically
> > ppc: pnv: drop PnvChipClass::cpu_model field
> > ppc: pnv: consolidate type definitions and batch register them
> >
> > include/hw/ppc/pnv.h | 12 +--
> > include/hw/ppc/pnv_core.h | 4 +-
> > include/hw/ppc/ppc.h | 2 -
> > include/hw/ppc/spapr.h | 2 -
> > include/hw/ppc/spapr_cpu_core.h | 7 +-
> > include/qom/object.h | 50 ++++++++++-
> > target/ppc/cpu-qom.h | 1 +
> > target/ppc/cpu.h | 1 -
> > hw/ppc/e500.c | 8 +-
> > hw/ppc/e500plat.c | 1 +
> > hw/ppc/mac_newworld.c | 15 ++--
> > hw/ppc/mac_oldworld.c | 6 +-
> > hw/ppc/mpc8544ds.c | 2 +
> > hw/ppc/pnv.c | 131 ++++++++++++----------------
> > hw/ppc/pnv_core.c | 67 +++++++--------
> > hw/ppc/ppc.c | 25 ------
> > hw/ppc/ppc405_uc.c | 6 +-
> > hw/ppc/ppc440_bamboo.c | 7 +-
> > hw/ppc/ppc4xx_devs.c | 4 +-
> > hw/ppc/prep.c | 12 +--
> > hw/ppc/spapr.c | 22 ++---
> > hw/ppc/spapr_cpu_core.c | 184 ++++++++++------------------------------
> > hw/ppc/virtex_ml507.c | 11 +--
> > qom/object.c | 9 ++
> > target/ppc/kvm.c | 22 ++---
> > target/ppc/translate_init.c | 69 +++++++++++++--
> > 26 files changed, 305 insertions(+), 375 deletions(-)
> >
>
^ permalink raw reply [flat|nested] 47+ messages in thread
* Re: [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC)
2017-10-10 11:38 ` Igor Mammedov
@ 2017-10-10 12:21 ` David Gibson
0 siblings, 0 replies; 47+ messages in thread
From: David Gibson @ 2017-10-10 12:21 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-devel, Alexander Graf, Hervé Poussineau,
Edgar E. Iglesias, open list:ppce500
[-- Attachment #1: Type: text/plain, Size: 6571 bytes --]
On Tue, Oct 10, 2017 at 01:38:41PM +0200, Igor Mammedov wrote:
> On Tue, 10 Oct 2017 13:21:37 +1100
> David Gibson <david@gibson.dropbear.id.au> wrote:
>
> > On Mon, Oct 09, 2017 at 09:50:47PM +0200, Igor Mammedov wrote:
> >
> > Applied to ppc-for-2.11. There was a small error in 19/24, which
> > reverted pnv to defaulting to POWER9 v1.0 whereas I've recently
> > changed it to v2.0. Rather than requiring a respin I adjusted that
> > myself, and fixed the minor conflicts in the subsequent patches.
> there were conflicts in spapr code but not in pnv, so I haven't
> > noticed.
Yeah, that's what I figured.
> I've checked commit on ppc-for-2.11 branch and it looks good.
> Anyways thanks for fixing it up.
No problem.
>
> >
> > > Changelog:
> > > - v2:
> > > * rebase on dgibson/ppc-for-2.11 tree
> > > * fix typo: s/pvn_chip_core_typename/pnv_chip_core_typename/
> > > * fix typo: s/pvn_core_cpu_typename/pnv_core_cpu_typename/
> > > * limit setting default cpu type to 'host' type only for spapr machine
> > > * split out ppc_cpu_lookup_alias() movement into separate patch
> > > * fix rebase conflict: add newly added power9_v2 core
> > > * set "max-cpu-compat" property only if it exists,
> > > in practice it should limit 'compat' hack to spapr
> > > and allow to avoid including machine/spapr headers
> > > in target/ppc/cpu.c
> > > * do compat= parsing only if machine."max-cpu-compat" exists
> > > that would match what current code practically does.
> > > * add newline before ppc_cpu_parse_featurestr() definition
> > > * pickup Acked-by/Reviewed-by where it's appropriate
> > >
> > > this series is continuation of effort to remove boards dependency on
> > > cpu_model parsing and generalizing default cpu type handling.
> > > For background story look at merged:
> > >
> > > [PATCH v2 0/5] generalize parsing of cpu_model (x86/arm)
> > > https://lists.gnu.org/archive/html/qemu-devel/2017-09/msg03564.html
> > >
> > > Part 3 is independent subset that takes care of all PPC boards.
> > > Series borrows the 1st 3 patches from earlier posted part 2
> > > qom: update doc comment for type_register[_static]()
> > > qom: introduce type_register_static_array()
> > > qom: add helper macro DEFINE_TYPES()
> > > to avoid interdependency, hopefully this 3 will be merged via machine-next,
> > > but it's fine for them to go via any tree (whichever first)
> > >
> > > Beside of switching to generic cpu_model parsing series contains a bunch
> > > of cleanups/simplifications which reduces code a bit and normalizes
> > > code that I've happend to touch to a typical QEMU patterns.
> > >
> > > git tree for testing:
> > > https://github.com/imammedo/qemu/branches cpu_init_removal_ppc_part3_v2
> > >
> > > Refference to v1:
> > > https://lists.gnu.org/archive/html/qemu-devel/2017-10/msg01087.html
> > >
> > >
> > > CC: Alexander Graf <agraf@suse.de> (supporter:ppce500)
> > > CC: David Gibson <david@gibson.dropbear.id.au> (maintainer:PowerPC)
> > > CC: "Hervé Poussineau" <hpoussin@reactos.org> (maintainer:PReP)
> > > CC: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> (odd fixer:virtex_ml507)
> > > CC: qemu-ppc@nongnu.org (open list:ppce500)
> > >
> > > Igor Mammedov (24):
> > > qom: update doc comment for type_register[_static]()
> > > qom: introduce type_register_static_array()
> > > qom: add helper macro DEFINE_TYPES()
> > > ppc: mpc8544ds/e500plat: use generic cpu_model parsing
> > > ppc: mac_newworld: use generic cpu_model parsing
> > > ppc: mac_oldworld: use generic cpu_model parsing
> > > ppc: bamboo: use generic cpu_model parsing
> > > ppc: replace cpu_model with cpu_type on ref405ep,taihu boards
> > > ppc: virtex-ml507: replace cpu_model with cpu_type
> > > ppc: 40p/prep: replace cpu_model with cpu_type
> > > ppc: spapr: replace ppc_cpu_parse_features() with
> > > cpu_parse_cpu_model()
> > > ppc: move '-cpu foo,compat=xxx' parsing into
> > > ppc_cpu_parse_featurestr()
> > > ppc: spapr: define core types statically
> > > ppc: spapr: use cpu type name directly
> > > ppc: spapr: register 'host' core type along with the rest of core
> > > types
> > > ppc: spapr: use cpu model names as tcg defaults instead of aliases
> > > ppc: move ppc_cpu_lookup_alias() before its first user
> > > ppc: spapr: use generic cpu_model parsing
> > > ppc: pnv: use generic cpu_model parsing
> > > ppc: pnv: normalize core/chip type names
> > > ppc: pnv: drop PnvCoreClass::cpu_oc field
> > > ppc: pnv: define core types statically
> > > ppc: pnv: drop PnvChipClass::cpu_model field
> > > ppc: pnv: consolidate type definitions and batch register them
> > >
> > > include/hw/ppc/pnv.h | 12 +--
> > > include/hw/ppc/pnv_core.h | 4 +-
> > > include/hw/ppc/ppc.h | 2 -
> > > include/hw/ppc/spapr.h | 2 -
> > > include/hw/ppc/spapr_cpu_core.h | 7 +-
> > > include/qom/object.h | 50 ++++++++++-
> > > target/ppc/cpu-qom.h | 1 +
> > > target/ppc/cpu.h | 1 -
> > > hw/ppc/e500.c | 8 +-
> > > hw/ppc/e500plat.c | 1 +
> > > hw/ppc/mac_newworld.c | 15 ++--
> > > hw/ppc/mac_oldworld.c | 6 +-
> > > hw/ppc/mpc8544ds.c | 2 +
> > > hw/ppc/pnv.c | 131 ++++++++++++----------------
> > > hw/ppc/pnv_core.c | 67 +++++++--------
> > > hw/ppc/ppc.c | 25 ------
> > > hw/ppc/ppc405_uc.c | 6 +-
> > > hw/ppc/ppc440_bamboo.c | 7 +-
> > > hw/ppc/ppc4xx_devs.c | 4 +-
> > > hw/ppc/prep.c | 12 +--
> > > hw/ppc/spapr.c | 22 ++---
> > > hw/ppc/spapr_cpu_core.c | 184 ++++++++++------------------------------
> > > hw/ppc/virtex_ml507.c | 11 +--
> > > qom/object.c | 9 ++
> > > target/ppc/kvm.c | 22 ++---
> > > target/ppc/translate_init.c | 69 +++++++++++++--
> > > 26 files changed, 305 insertions(+), 375 deletions(-)
> > >
> >
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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