From: Igor Mammedov <imammedo@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Alexander Graf" <agraf@suse.de>,
"David Gibson" <david@gibson.dropbear.id.au>,
"Hervé Poussineau" <hpoussin@reactos.org>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"open list:ppce500" <qemu-ppc@nongnu.org>
Subject: [Qemu-devel] [PATCH v2 24/24] ppc: pnv: consolidate type definitions and batch register them
Date: Mon, 9 Oct 2017 21:51:11 +0200 [thread overview]
Message-ID: <1507578671-158758-25-git-send-email-imammedo@redhat.com> (raw)
In-Reply-To: <1507578671-158758-1-git-send-email-imammedo@redhat.com>
Use a new DEFINE_TYPES() helper to simplify type registration
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/pnv.c | 92 ++++++++++++++++++++++--------------------------------------
1 file changed, 34 insertions(+), 58 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 80c7f62..c35c439 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -729,13 +729,6 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV Chip POWER8E";
}
-static const TypeInfo pnv_chip_power8e_info = {
- .name = TYPE_PNV_CHIP_POWER8E,
- .parent = TYPE_PNV_CHIP,
- .instance_size = sizeof(PnvChip),
- .class_init = pnv_chip_power8e_class_init,
-};
-
static void pnv_chip_power8_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -750,13 +743,6 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV Chip POWER8";
}
-static const TypeInfo pnv_chip_power8_info = {
- .name = TYPE_PNV_CHIP_POWER8,
- .parent = TYPE_PNV_CHIP,
- .instance_size = sizeof(PnvChip),
- .class_init = pnv_chip_power8_class_init,
-};
-
static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -771,13 +757,6 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV Chip POWER8NVL";
}
-static const TypeInfo pnv_chip_power8nvl_info = {
- .name = TYPE_PNV_CHIP_POWER8NVL,
- .parent = TYPE_PNV_CHIP,
- .instance_size = sizeof(PnvChip),
- .class_init = pnv_chip_power8nvl_class_init,
-};
-
static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -792,13 +771,6 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV Chip POWER9";
}
-static const TypeInfo pnv_chip_power9_info = {
- .name = TYPE_PNV_CHIP_POWER9,
- .parent = TYPE_PNV_CHIP,
- .instance_size = sizeof(PnvChip),
- .class_init = pnv_chip_power9_class_init,
-};
-
static void pnv_chip_core_sanitize(PnvChip *chip, Error **errp)
{
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
@@ -1000,15 +972,6 @@ static void pnv_chip_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV Chip";
}
-static const TypeInfo pnv_chip_info = {
- .name = TYPE_PNV_CHIP,
- .parent = TYPE_SYS_BUS_DEVICE,
- .class_init = pnv_chip_class_init,
- .instance_init = pnv_chip_init,
- .class_size = sizeof(PnvChipClass),
- .abstract = true,
-};
-
static ICSState *pnv_ics_get(XICSFabric *xi, int irq)
{
PnvMachineState *pnv = POWERNV_MACHINE(xi);
@@ -1144,27 +1107,40 @@ static void powernv_machine_class_init(ObjectClass *oc, void *data)
powernv_machine_class_props_init(oc);
}
-static const TypeInfo powernv_machine_info = {
- .name = TYPE_POWERNV_MACHINE,
- .parent = TYPE_MACHINE,
- .instance_size = sizeof(PnvMachineState),
- .instance_init = powernv_machine_initfn,
- .class_init = powernv_machine_class_init,
- .interfaces = (InterfaceInfo[]) {
- { TYPE_XICS_FABRIC },
- { TYPE_INTERRUPT_STATS_PROVIDER },
- { },
+#define DEFINE_PNV_CHIP_TYPE(type, class_initfn) \
+ { \
+ .name = type, \
+ .class_init = class_initfn, \
+ .parent = TYPE_PNV_CHIP, \
+ }
+
+static const TypeInfo types[] = {
+ {
+ .name = TYPE_POWERNV_MACHINE,
+ .parent = TYPE_MACHINE,
+ .instance_size = sizeof(PnvMachineState),
+ .instance_init = powernv_machine_initfn,
+ .class_init = powernv_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_XICS_FABRIC },
+ { TYPE_INTERRUPT_STATS_PROVIDER },
+ { },
+ },
},
+ {
+ .name = TYPE_PNV_CHIP,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .class_init = pnv_chip_class_init,
+ .instance_init = pnv_chip_init,
+ .instance_size = sizeof(PnvChip),
+ .class_size = sizeof(PnvChipClass),
+ .abstract = true,
+ },
+ DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER9, pnv_chip_power9_class_init),
+ DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER8, pnv_chip_power8_class_init),
+ DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER8E, pnv_chip_power8e_class_init),
+ DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER8NVL,
+ pnv_chip_power8nvl_class_init),
};
-static void powernv_machine_register_types(void)
-{
- type_register_static(&powernv_machine_info);
- type_register_static(&pnv_chip_info);
- type_register_static(&pnv_chip_power8e_info);
- type_register_static(&pnv_chip_power8_info);
- type_register_static(&pnv_chip_power8nvl_info);
- type_register_static(&pnv_chip_power9_info);
-}
-
-type_init(powernv_machine_register_types)
+DEFINE_TYPES(types)
--
2.7.4
next prev parent reply other threads:[~2017-10-09 19:51 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-09 19:50 [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 01/24] qom: update doc comment for type_register[_static]() Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 02/24] qom: introduce type_register_static_array() Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 03/24] qom: add helper macro DEFINE_TYPES() Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 04/24] ppc: mpc8544ds/e500plat: use generic cpu_model parsing Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 05/24] ppc: mac_newworld: " Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 06/24] ppc: mac_oldworld: " Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 07/24] ppc: bamboo: " Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 08/24] ppc: replace cpu_model with cpu_type on ref405ep, taihu boards Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 09/24] ppc: virtex-ml507: replace cpu_model with cpu_type Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 10/24] ppc: 40p/prep: " Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 11/24] ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model() Igor Mammedov
2017-10-09 19:50 ` [Qemu-devel] [PATCH v2 12/24] ppc: move '-cpu foo, compat=xxx' parsing into ppc_cpu_parse_featurestr() Igor Mammedov
2017-10-10 2:02 ` David Gibson
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 13/24] ppc: spapr: define core types statically Igor Mammedov
2017-10-10 2:04 ` David Gibson
2017-10-10 7:29 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2017-10-12 13:10 ` Greg Kurz
2017-10-12 14:58 ` Igor Mammedov
2017-10-12 15:20 ` Greg Kurz
2017-10-12 16:01 ` Igor Mammedov
2017-10-11 17:21 ` [Qemu-devel] " Philippe Mathieu-Daudé
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 14/24] ppc: spapr: use cpu type name directly Igor Mammedov
2017-10-12 15:48 ` [Qemu-devel] [PATCH v2 14/24] fixup! " Igor Mammedov
2017-10-13 7:26 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 15/24] ppc: spapr: register 'host' core type along with the rest of core types Igor Mammedov
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 16/24] ppc: spapr: use cpu model names as tcg defaults instead of aliases Igor Mammedov
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 17/24] ppc: move ppc_cpu_lookup_alias() before its first user Igor Mammedov
2017-10-10 2:05 ` David Gibson
2017-10-11 17:15 ` Philippe Mathieu-Daudé
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 18/24] ppc: spapr: use generic cpu_model parsing Igor Mammedov
2017-10-10 2:07 ` David Gibson
2017-10-12 15:50 ` [Qemu-devel] [PATCH v2 18/24] fixup! " Igor Mammedov
2017-10-12 22:24 ` David Gibson
2017-10-23 4:43 ` Alexey Kardashevskiy
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 19/24] ppc: pnv: " Igor Mammedov
2017-10-10 2:10 ` David Gibson
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 20/24] ppc: pnv: normalize core/chip type names Igor Mammedov
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 21/24] ppc: pnv: drop PnvCoreClass::cpu_oc field Igor Mammedov
2017-10-11 17:24 ` Philippe Mathieu-Daudé
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 22/24] ppc: pnv: define core types statically Igor Mammedov
2017-10-09 19:51 ` [Qemu-devel] [PATCH v2 23/24] ppc: pnv: drop PnvChipClass::cpu_model field Igor Mammedov
2017-10-11 17:23 ` Philippe Mathieu-Daudé
2017-10-09 19:51 ` Igor Mammedov [this message]
2017-10-10 2:21 ` [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC) David Gibson
2017-10-10 11:38 ` Igor Mammedov
2017-10-10 12:21 ` David Gibson
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