From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33901) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eFNDl-0006Ac-3i for qemu-devel@nongnu.org; Thu, 16 Nov 2017 11:40:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eFNDg-0000g0-JM for qemu-devel@nongnu.org; Thu, 16 Nov 2017 11:40:57 -0500 Received: from mx1.redhat.com ([209.132.183.28]:62242) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eFNDg-0000fa-D0 for qemu-devel@nongnu.org; Thu, 16 Nov 2017 11:40:52 -0500 Date: Thu, 16 Nov 2017 18:40:49 +0200 From: "Michael S. Tsirkin" Message-ID: <1510850407-17266-5-git-send-email-mst@redhat.com> References: <1510850407-17266-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1510850407-17266-1-git-send-email-mst@redhat.com> Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 4/9] hw/pcie-pci-bridge: restrict to X86 and ARM List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Marcel Apfelbaum , Thomas Huth , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Cornelia Huck , Yongbok Kim From: Marcel Apfelbaum The PCIE-PCI bridge is specific to "pure" PCIe systems (on QEMU we have X86 and ARM), it does not make sense to have it in other archs. Reported-by: Thomas Huth Signed-off-by: Marcel Apfelbaum Reviewed-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Cornelia Huck Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Tested-by: Yongbok Kim --- hw/pci-bridge/Makefile.objs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/pci-bridge/Makefile.objs b/hw/pci-bridge/Makefile.objs index 666db37..1b05023 100644 --- a/hw/pci-bridge/Makefile.objs +++ b/hw/pci-bridge/Makefile.objs @@ -1,5 +1,5 @@ -common-obj-y +=3D pci_bridge_dev.o pcie_pci_bridge.o -common-obj-$(CONFIG_PCIE_PORT) +=3D pcie_root_port.o gen_pcie_root_port.= o +common-obj-y +=3D pci_bridge_dev.o +common-obj-$(CONFIG_PCIE_PORT) +=3D pcie_root_port.o gen_pcie_root_port.= o pcie_pci_bridge.o common-obj-$(CONFIG_PXB) +=3D pci_expander_bridge.o common-obj-$(CONFIG_XIO3130) +=3D xio3130_upstream.o xio3130_downstream.= o common-obj-$(CONFIG_IOH3420) +=3D ioh3420.o --=20 MST