From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org,
"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
Stefano Stabellini <sstabellini@kernel.org>
Subject: [Qemu-devel] [PATCH 03/12] target/arm: Convert get_phys_addr_v5() to not return FSC values
Date: Tue, 5 Dec 2017 19:46:23 +0000 [thread overview]
Message-ID: <1512503192-2239-4-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1512503192-2239-1-git-send-email-peter.maydell@linaro.org>
Make get_phys_addr_v5() return a fault type in the ARMMMUFaultInfo
structure, which we convert to the FSC at the callsite.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 33 ++++++++++++++++++---------------
1 file changed, 18 insertions(+), 15 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 30616d9..6aed681 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8344,11 +8344,11 @@ static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure,
static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
MMUAccessType access_type, ARMMMUIdx mmu_idx,
hwaddr *phys_ptr, int *prot,
- target_ulong *page_size, uint32_t *fsr,
+ target_ulong *page_size,
ARMMMUFaultInfo *fi)
{
CPUState *cs = CPU(arm_env_get_cpu(env));
- int code;
+ int level = 1;
uint32_t table;
uint32_t desc;
int type;
@@ -8362,7 +8362,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
/* Lookup l1 descriptor. */
if (!get_level1_table_address(env, mmu_idx, &table, address)) {
/* Section translation fault if page walk is disabled by PD0 or PD1 */
- code = 5;
+ fi->type = ARMFault_Translation;
goto do_fault;
}
desc = arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx),
@@ -8377,21 +8377,20 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
domain_prot = (dacr >> (domain * 2)) & 3;
if (type == 0) {
/* Section translation fault. */
- code = 5;
+ fi->type = ARMFault_Translation;
goto do_fault;
}
+ if (type != 2) {
+ level = 2;
+ }
if (domain_prot == 0 || domain_prot == 2) {
- if (type == 2)
- code = 9; /* Section domain fault. */
- else
- code = 11; /* Page domain fault. */
+ fi->type = ARMFault_Domain;
goto do_fault;
}
if (type == 2) {
/* 1Mb section. */
phys_addr = (desc & 0xfff00000) | (address & 0x000fffff);
ap = (desc >> 10) & 3;
- code = 13;
*page_size = 1024 * 1024;
} else {
/* Lookup l2 entry. */
@@ -8406,7 +8405,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
mmu_idx, fi);
switch (desc & 3) {
case 0: /* Page translation fault. */
- code = 7;
+ fi->type = ARMFault_Translation;
goto do_fault;
case 1: /* 64k page. */
phys_addr = (desc & 0xffff0000) | (address & 0xffff);
@@ -8429,7 +8428,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
/* UNPREDICTABLE in ARMv5; we choose to take a
* page translation fault.
*/
- code = 7;
+ fi->type = ARMFault_Translation;
goto do_fault;
}
} else {
@@ -8442,18 +8441,19 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
/* Never happens, but compiler isn't smart enough to tell. */
abort();
}
- code = 15;
}
*prot = ap_to_rw_prot(env, mmu_idx, ap, domain_prot);
*prot |= *prot ? PAGE_EXEC : 0;
if (!(*prot & (1 << access_type))) {
/* Access permission fault. */
+ fi->type = ARMFault_Permission;
goto do_fault;
}
*phys_ptr = phys_addr;
return false;
do_fault:
- *fsr = code | (domain << 4);
+ fi->domain = domain;
+ fi->level = level;
return true;
}
@@ -9863,8 +9863,11 @@ static bool get_phys_addr(CPUARMState *env, target_ulong address,
return get_phys_addr_v6(env, address, access_type, mmu_idx, phys_ptr,
attrs, prot, page_size, fsr, fi);
} else {
- return get_phys_addr_v5(env, address, access_type, mmu_idx, phys_ptr,
- prot, page_size, fsr, fi);
+ bool ret = get_phys_addr_v5(env, address, access_type, mmu_idx,
+ phys_ptr, prot, page_size, fi);
+
+ *fsr = arm_fi_to_sfsc(fi);
+ return ret;
}
}
--
2.7.4
next prev parent reply other threads:[~2017-12-05 19:46 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-05 19:46 [Qemu-devel] [PATCH 00/12] Refactor get_phys_addr() not to return FSR values Peter Maydell
2017-12-05 19:46 ` [Qemu-devel] [PATCH 01/12] target/arm: Provide fault type enum and FSR conversion functions Peter Maydell
2017-12-05 19:46 ` [Qemu-devel] [PATCH 02/12] target/arm: Remove fsr argument from arm_ld*_ptw() Peter Maydell
2017-12-05 19:46 ` Peter Maydell [this message]
2017-12-05 19:46 ` [Qemu-devel] [PATCH 04/12] target/arm: Convert get_phys_addr_v6() to not return FSC values Peter Maydell
2017-12-05 19:46 ` [Qemu-devel] [PATCH 05/12] target/arm: Convert get_phys_addr_lpae() " Peter Maydell
2017-12-05 19:46 ` [Qemu-devel] [PATCH 06/12] target/arm: Convert get_phys_addr_pmsav5() " Peter Maydell
2017-12-05 19:46 ` [Qemu-devel] [PATCH 07/12] target/arm: Convert get_phys_addr_pmsav7() " Peter Maydell
2017-12-05 19:46 ` [Qemu-devel] [PATCH 08/12] target/arm: Convert get_phys_addr_pmsav8() " Peter Maydell
2017-12-05 19:46 ` [Qemu-devel] [PATCH 09/12] target/arm: Use ARMMMUFaultInfo in deliver_fault() Peter Maydell
2017-12-05 19:46 ` [Qemu-devel] [PATCH 10/12] target/arm: Ignore fsr from get_phys_addr() in do_ats_write() Peter Maydell
2017-12-05 19:46 ` [Qemu-devel] [PATCH 11/12] target/arm: Remove fsr argument from get_phys_addr() and arm_tlb_fill() Peter Maydell
2017-12-05 19:46 ` [Qemu-devel] [PATCH 12/12] target/arm: Extend PAR format determination Peter Maydell
2017-12-08 0:29 ` [Qemu-devel] [PATCH 00/12] Refactor get_phys_addr() not to return FSR values Richard Henderson
2017-12-08 22:40 ` Stefano Stabellini
2017-12-11 8:47 ` Edgar E. Iglesias
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