From: minyard@acm.org
To: qemu-devel@nongnu.org
Cc: Corey Minyard <cminyard@mvista.com>
Subject: [Qemu-devel] [PATCH 12/14] ipmi: Fix SSIF ACPI handling to use the right CRS
Date: Thu, 7 Dec 2017 15:46:19 -0600 [thread overview]
Message-ID: <1512683181-8420-13-git-send-email-minyard@acm.org> (raw)
In-Reply-To: <1512683181-8420-1-git-send-email-minyard@acm.org>
From: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
hw/acpi/ipmi-stub.c | 2 +-
hw/acpi/ipmi.c | 13 +++++++------
hw/i386/acpi-build.c | 2 +-
include/hw/acpi/ipmi.h | 2 +-
4 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/hw/acpi/ipmi-stub.c b/hw/acpi/ipmi-stub.c
index 98b6dce..6c71d6c 100644
--- a/hw/acpi/ipmi-stub.c
+++ b/hw/acpi/ipmi-stub.c
@@ -9,6 +9,6 @@
#include "hw/acpi/ipmi.h"
-void build_acpi_ipmi_devices(Aml *table, BusState *bus)
+void build_acpi_ipmi_devices(Aml *table, BusState *bus, const char *resource)
{
}
diff --git a/hw/acpi/ipmi.c b/hw/acpi/ipmi.c
index 651e2e9..96e48eb 100644
--- a/hw/acpi/ipmi.c
+++ b/hw/acpi/ipmi.c
@@ -13,7 +13,7 @@
#include "hw/acpi/acpi.h"
#include "hw/acpi/ipmi.h"
-static Aml *aml_ipmi_crs(IPMIFwInfo *info)
+static Aml *aml_ipmi_crs(IPMIFwInfo *info, const char *resource)
{
Aml *crs = aml_resource_template();
@@ -48,7 +48,8 @@ static Aml *aml_ipmi_crs(IPMIFwInfo *info)
info->register_spacing, info->register_length));
break;
case IPMI_MEMSPACE_SMBUS:
- aml_append(crs, aml_return(aml_int(info->base_address)));
+ aml_append(crs, aml_i2c_serial_bus_device(info->base_address,
+ resource));
break;
default:
abort();
@@ -61,7 +62,7 @@ static Aml *aml_ipmi_crs(IPMIFwInfo *info)
return crs;
}
-static Aml *aml_ipmi_device(IPMIFwInfo *info)
+static Aml *aml_ipmi_device(IPMIFwInfo *info, const char *resource)
{
Aml *dev;
uint16_t version = ((info->ipmi_spec_major_revision << 8)
@@ -74,14 +75,14 @@ static Aml *aml_ipmi_device(IPMIFwInfo *info)
aml_append(dev, aml_name_decl("_STR", aml_string("ipmi_%s",
info->interface_name)));
aml_append(dev, aml_name_decl("_UID", aml_int(info->uuid)));
- aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(info)));
+ aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(info, resource)));
aml_append(dev, aml_name_decl("_IFT", aml_int(info->interface_type)));
aml_append(dev, aml_name_decl("_SRV", aml_int(version)));
return dev;
}
-void build_acpi_ipmi_devices(Aml *scope, BusState *bus)
+void build_acpi_ipmi_devices(Aml *scope, BusState *bus, const char *resource)
{
BusChild *kid;
@@ -101,6 +102,6 @@ void build_acpi_ipmi_devices(Aml *scope, BusState *bus)
iic = IPMI_INTERFACE_GET_CLASS(obj);
memset(&info, 0, sizeof(info));
iic->get_fwinfo(ii, &info);
- aml_append(scope, aml_ipmi_device(&info));
+ aml_append(scope, aml_ipmi_device(&info, resource));
}
}
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 73519ab..84d82bc 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1340,7 +1340,7 @@ static void build_isa_devices_aml(Aml *table)
} else if (!obj) {
error_report("No ISA bus, unable to define IPMI ACPI data");
} else {
- build_acpi_ipmi_devices(scope, BUS(obj));
+ build_acpi_ipmi_devices(scope, BUS(obj), "\\_SB.PCI0.ISA");
}
aml_append(table, scope);
diff --git a/include/hw/acpi/ipmi.h b/include/hw/acpi/ipmi.h
index ab2bb29..d68bc85 100644
--- a/include/hw/acpi/ipmi.h
+++ b/include/hw/acpi/ipmi.h
@@ -17,6 +17,6 @@
* bus matches the given bus. The resource is the ACPI resource that
* contains the IPMI device, this is required for the I2C CRS.
*/
-void build_acpi_ipmi_devices(Aml *table, BusState *bus);
+void build_acpi_ipmi_devices(Aml *table, BusState *bus, const char *resource);
#endif /* HW_ACPI_IPMI_H */
--
2.7.4
next prev parent reply other threads:[~2017-12-07 21:46 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-07 21:46 [Qemu-devel] [PATCH 00/13] pm_smbus fixes and and IPMI SMBus device minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 01/14] i2c:pm_smbus: Clean up some style issues minyard
2018-08-17 17:24 ` Paolo Bonzini
2018-08-17 17:33 ` Corey Minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 02/14] i2c:pm_smbus: Fix the semantics of block I2C transfers minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 03/14] i2c:pm_smbus: Make the I2C block read command read-only minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 04/14] i2c:pm_smbus: Add block transfer capability minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 05/14] i2c:pm_smbus: Fix state transfer minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 06/14] i2c:pm_smbus: Add interrupt handling minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 07/14] i2c:pm_smbus: Add the ability to force block transfer enable minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 08/14] i2c: Add an SMBus vmstate structure minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 09/14] i2c: Add vmstate handling to the smbus eeprom minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 10/14] ipmi: Add an SMBus IPMI interface minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 11/14] acpi: Add i2c serial bus CRS handling minyard
2017-12-07 21:46 ` minyard [this message]
2017-12-07 21:46 ` [Qemu-devel] [PATCH 13/14] i386: Rename bools in PCMachineState to end in _enabled minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 14/14] pc: Add an SMB0 ACPI device to q35 minyard
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