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From: minyard@acm.org
To: qemu-devel@nongnu.org
Cc: Corey Minyard <cminyard@mvista.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Subject: [Qemu-devel] [PATCH 01/14] i2c:pm_smbus: Clean up some style issues
Date: Thu,  7 Dec 2017 15:46:08 -0600	[thread overview]
Message-ID: <1512683181-8420-2-git-send-email-minyard@acm.org> (raw)
In-Reply-To: <1512683181-8420-1-git-send-email-minyard@acm.org>

From: Corey Minyard <cminyard@mvista.com>

Fix some spacing issues, remove extraneous comments, add some
defines instead of hard-coding numbers.

Signed-off-by: Corey Minyard <cminyard@mvista.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
---
 hw/i2c/pm_smbus.c | 58 ++++++++++++++++++++++++++++++++++++-------------------
 1 file changed, 38 insertions(+), 20 deletions(-)

diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c
index 6fc3923..92c3aebd 100644
--- a/hw/i2c/pm_smbus.c
+++ b/hw/i2c/pm_smbus.c
@@ -23,8 +23,6 @@
 #include "hw/i2c/pm_smbus.h"
 #include "hw/i2c/smbus.h"
 
-/* no save/load? */
-
 #define SMBHSTSTS       0x00
 #define SMBHSTCNT       0x02
 #define SMBHSTCMD       0x03
@@ -33,19 +31,34 @@
 #define SMBHSTDAT1      0x06
 #define SMBBLKDAT       0x07
 
-#define STS_HOST_BUSY   (1)
-#define STS_INTR        (1<<1)
-#define STS_DEV_ERR     (1<<2)
-#define STS_BUS_ERR     (1<<3)
-#define STS_FAILED      (1<<4)
-#define STS_SMBALERT    (1<<5)
-#define STS_INUSE_STS   (1<<6)
-#define STS_BYTE_DONE   (1<<7)
+#define STS_HOST_BUSY   (1 << 0)
+#define STS_INTR        (1 << 1)
+#define STS_DEV_ERR     (1 << 2)
+#define STS_BUS_ERR     (1 << 3)
+#define STS_FAILED      (1 << 4)
+#define STS_SMBALERT    (1 << 5)
+#define STS_INUSE_STS   (1 << 6)
+#define STS_BYTE_DONE   (1 << 7)
 /* Signs of successfully transaction end :
 *  ByteDoneStatus = 1 (STS_BYTE_DONE) and INTR = 1 (STS_INTR )
 */
 
-//#define DEBUG
+#define CTL_INTREN      (1 << 0)
+#define CTL_KILL        (1 << 1)
+#define CTL_LAST_BYTE   (1 << 5)
+#define CTL_START       (1 << 6)
+#define CTL_PEC_EN      (1 << 7)
+#define CTL_RETURN_MASK 0x1f
+
+#define PROT_QUICK          0
+#define PROT_BYTE           1
+#define PROT_BYTE_DATA      2
+#define PROT_WORD_DATA      3
+#define PROT_PROC_CALL      4
+#define PROT_BLOCK_DATA     5
+#define PROT_I2C_BLOCK_DATA 6
+
+/*#define DEBUG*/
 
 #ifdef DEBUG
 # define SMBUS_DPRINTF(format, ...)     printf(format, ## __VA_ARGS__)
@@ -68,11 +81,12 @@ static void smb_transaction(PMSMBus *s)
     if ((s->smb_stat & STS_DEV_ERR) != 0)  {
         goto error;
     }
+
     switch(prot) {
-    case 0x0:
+    case PROT_QUICK:
         ret = smbus_quick_command(bus, addr, read);
         goto done;
-    case 0x1:
+    case PROT_BYTE:
         if (read) {
             ret = smbus_receive_byte(bus, addr);
             goto data8;
@@ -80,7 +94,7 @@ static void smb_transaction(PMSMBus *s)
             ret = smbus_send_byte(bus, addr, cmd);
             goto done;
         }
-    case 0x2:
+    case PROT_BYTE_DATA:
         if (read) {
             ret = smbus_read_byte(bus, addr, cmd);
             goto data8;
@@ -89,16 +103,17 @@ static void smb_transaction(PMSMBus *s)
             goto done;
         }
         break;
-    case 0x3:
+    case PROT_WORD_DATA:
         if (read) {
             ret = smbus_read_word(bus, addr, cmd);
             goto data16;
         } else {
-            ret = smbus_write_word(bus, addr, cmd, (s->smb_data1 << 8) | s->smb_data0);
+            ret = smbus_write_word(bus, addr, cmd,
+                                   (s->smb_data1 << 8) | s->smb_data0);
             goto done;
         }
         break;
-    case 0x5:
+    case PROT_I2C_BLOCK_DATA:
         if (read) {
             ret = smbus_read_block(bus, addr, cmd, s->smb_data);
             goto data8;
@@ -149,8 +164,9 @@ static void smb_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
         break;
     case SMBHSTCNT:
         s->smb_ctl = val;
-        if (val & 0x40)
+        if (s->smb_ctl & CTL_START) {
             smb_transaction(s);
+        }
         break;
     case SMBHSTCMD:
         s->smb_cmd = val;
@@ -185,7 +201,7 @@ static uint64_t smb_ioport_readb(void *opaque, hwaddr addr, unsigned width)
         break;
     case SMBHSTCNT:
         s->smb_index = 0;
-        val = s->smb_ctl & 0x1f;
+        val = s->smb_ctl & CTL_RETURN_MASK;
         break;
     case SMBHSTCMD:
         val = s->smb_cmd;
@@ -208,7 +224,9 @@ static uint64_t smb_ioport_readb(void *opaque, hwaddr addr, unsigned width)
         val = 0;
         break;
     }
-    SMBUS_DPRINTF("SMB readb port=0x%04" HWADDR_PRIx " val=0x%02x\n", addr, val);
+    SMBUS_DPRINTF("SMB readb port=0x%04" HWADDR_PRIx " val=0x%02x\n",
+                  addr, val);
+
     return val;
 }
 
-- 
2.7.4

  reply	other threads:[~2017-12-07 21:46 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-07 21:46 [Qemu-devel] [PATCH 00/13] pm_smbus fixes and and IPMI SMBus device minyard
2017-12-07 21:46 ` minyard [this message]
2018-08-17 17:24   ` [Qemu-devel] [PATCH 01/14] i2c:pm_smbus: Clean up some style issues Paolo Bonzini
2018-08-17 17:33     ` Corey Minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 02/14] i2c:pm_smbus: Fix the semantics of block I2C transfers minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 03/14] i2c:pm_smbus: Make the I2C block read command read-only minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 04/14] i2c:pm_smbus: Add block transfer capability minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 05/14] i2c:pm_smbus: Fix state transfer minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 06/14] i2c:pm_smbus: Add interrupt handling minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 07/14] i2c:pm_smbus: Add the ability to force block transfer enable minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 08/14] i2c: Add an SMBus vmstate structure minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 09/14] i2c: Add vmstate handling to the smbus eeprom minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 10/14] ipmi: Add an SMBus IPMI interface minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 11/14] acpi: Add i2c serial bus CRS handling minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 12/14] ipmi: Fix SSIF ACPI handling to use the right CRS minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 13/14] i386: Rename bools in PCMachineState to end in _enabled minyard
2017-12-07 21:46 ` [Qemu-devel] [PATCH 14/14] pc: Add an SMB0 ACPI device to q35 minyard

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