From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 17/24] sdhci: use qemu_log_mask(UNIMP) instead of fprintf()
Date: Tue, 16 Jan 2018 13:34:12 +0000 [thread overview]
Message-ID: <1516109659-1557-18-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org>
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: 20180115182436.2066-8-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/sd/sdhci.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index bbe4570..7ffb1db 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -947,7 +947,8 @@ static uint64_t sdhci_read(void *opaque, hwaddr offset, unsigned size)
ret = (SD_HOST_SPECv2_VERS << 16) | sdhci_slotint(s);
break;
default:
- ERRPRINT("bad %ub read: addr[0x%04x]\n", size, (int)offset);
+ qemu_log_mask(LOG_UNIMP, "SDHC rd_%ub @0x%02" HWADDR_PRIx " "
+ "not implemented\n", size, offset);
break;
}
@@ -1153,8 +1154,8 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
sdhci_update_irq(s);
break;
default:
- ERRPRINT("bad %ub write offset: addr[0x%04x] <- %u(0x%x)\n",
- size, (int)offset, value >> shift, value >> shift);
+ qemu_log_mask(LOG_UNIMP, "SDHC wr_%ub @0x%02" HWADDR_PRIx " <- 0x%08x "
+ "not implemented\n", size, offset, value >> shift);
break;
}
DPRINT_L2("write %ub: addr[0x%04x] <- %u(0x%x)\n",
--
2.7.4
next prev parent reply other threads:[~2018-01-16 13:34 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-16 13:33 [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 01/24] hw/intc/armv7m: Support byte and halfword accesses to CFSR Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 02/24] get_phys_addr_pmsav7: Support AP=0b111 for v7M Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 03/24] hw/arm/virt: Add virt-2.12 machine type Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 04/24] target/arm: Handle page table walk load failures correctly Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 05/24] hw/sd/pl181: Reset SD card on controller reset Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 06/24] hw/sd/milkymist-memcard: " Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 07/24] hw/sd/ssi-sd: " Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 08/24] hw/sd/omap_mmc: " Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 09/24] target/arm: Split out vfp_expand_imm Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 10/24] target/arm: Add fp16 support to vfp_expand_imm Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 11/24] sdhci: clean up includes Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 12/24] sdhci: remove dead code Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 13/24] sdhci: use DEFINE_SDHCI_COMMON_PROPERTIES() for common sysbus/pci properties Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 14/24] sdhci: refactor common sysbus/pci class_init() into sdhci_common_class_init() Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 15/24] sdhci: refactor common sysbus/pci realize() into sdhci_common_realize() Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 16/24] sdhci: refactor common sysbus/pci unrealize() into sdhci_common_unrealize() Peter Maydell
2018-01-16 13:34 ` Peter Maydell [this message]
2018-01-16 13:34 ` [Qemu-devel] [PULL 18/24] sdhci: convert the DPRINT() calls into trace events Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 19/24] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h" Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 20/24] sdhci: rename the SDHC_CAPAB register Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 21/24] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 22/24] sdhci: Implement write method of ACMD12ERRSTS register Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 23/24] sdhci: fix the PCI device, using the PCI address space for DMA Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 24/24] sdhci: add a 'dma' property to the sysbus devices Peter Maydell
2018-01-16 15:44 ` [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1516109659-1557-18-git-send-email-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).