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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 03/21] target/arm: Mark disas_set_insn_syndrome inline
Date: Thu, 25 Jan 2018 13:43:11 +0000	[thread overview]
Message-ID: <1516887809-6265-4-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1516887809-6265-1-git-send-email-peter.maydell@linaro.org>

From: Richard Henderson <richard.henderson@linaro.org>

If it isn't used when translate.h is included,
we'll get a compiler Werror.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20180119045438.28582-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/translate.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/arm/translate.h b/target/arm/translate.h
index cd7313a..3f4df91 100644
--- a/target/arm/translate.h
+++ b/target/arm/translate.h
@@ -108,7 +108,7 @@ static inline int default_exception_el(DisasContext *s)
             ? 3 : MAX(1, s->current_el);
 }
 
-static void disas_set_insn_syndrome(DisasContext *s, uint32_t syn)
+static inline void disas_set_insn_syndrome(DisasContext *s, uint32_t syn)
 {
     /* We don't need to save all of the syndrome so we mask and shift
      * out unneeded bits to help the sleb128 encoder do a better job.
-- 
2.7.4

  parent reply	other threads:[~2018-01-25 13:43 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-25 13:43 [Qemu-devel] [PULL 00/21] target-arm queue Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 01/21] target/arm: Fix 32-bit address truncation Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 02/21] i.MX: Fix FEC/ENET receive funtions Peter Maydell
2018-01-25 13:43 ` Peter Maydell [this message]
2018-01-25 13:43 ` [Qemu-devel] [PULL 04/21] target/arm: Use pointers in crypto helpers Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 05/21] target/arm: Use pointers in neon zip/uzp helpers Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 06/21] target/arm: Use pointers in neon tbl helper Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 07/21] target/arm: Change the type of vfp.regs Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 08/21] target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 09/21] vmstate: Add VMSTATE_UINT64_SUB_ARRAY Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 10/21] target/arm: Add ARM_FEATURE_SVE Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 11/21] target/arm: Move cpu_get_tb_cpu_state out of line Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 12/21] target/arm: Hoist store to flags output in cpu_get_tb_cpu_state Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 13/21] target/arm: Simplify fp_exception_el for user-only Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 14/21] hw/intc/arm_gic: Prevent the GIC from signaling an IRQ when it's "active and pending" Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 15/21] hw/intc/arm_gic: Fix C_RPR value on idle priority Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 16/21] hw/intc/arm_gic: Fix group priority computation for group 1 IRQs Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 17/21] hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1 Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 18/21] hw/arm/virt: Check that the CPU realize method succeeded Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 19/21] sdhci: fix a NULL pointer dereference due to uninitialized AddresSpace object Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 20/21] xilinx_spips: Correct usage of an uninitialized local variable Peter Maydell
2018-01-25 13:43 ` [Qemu-devel] [PULL 21/21] pl110: Implement vertical compare/next base interrupts Peter Maydell
2018-01-25 14:18 ` [Qemu-devel] [PULL 00/21] target-arm queue no-reply
2018-01-25 18:06 ` Peter Maydell

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