[Qemu-devel] [PATCH] PowerPC: Add TM bits into msr_mask

[wei.guo.simon@gmail.com]

From: Simon Guo <wei.guo.simon@gmail.com>

During migration, cpu_post_load() will use msr_mask to determine which
PPC MSR bits will be sync to the target side. Hardware Transaction
Memory(HTM) has been supported since Power8. This patch adds TM/TS bits
into msr_mask for Power8, so that transactional application can be
migrated across qemu.

Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
 target/ppc/translate_init.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index 55c99c9..a438721 100644
--- a/target/ppc/translate_init.c
+++ b/target/ppc/translate_init.c
@@ -8689,6 +8689,9 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
                     (1ull << MSR_DR) |
                     (1ull << MSR_PMM) |
                     (1ull << MSR_RI) |
+                    (1ull << MSR_TM) |
+                    (1ull << MSR_TS0) |
+                    (1ull << MSR_TS1) |
                     (1ull << MSR_LE);
     pcc->mmu_model = POWERPC_MMU_2_07;
 #if defined(CONFIG_SOFTMMU)
-- 
1.8.3.1