[Qemu-devel] [PATCH v3 11/12] intel_iommu: add framework for PASID AddressSpace management

["Liu, Yi L" <yi.l.liu@linux.intel.com>]

This patch introduces a framework to manage PASID tagged AddressSpace
in Intel vIOMMU emulator. PASID tagged AddressSpace is an address sapce
which is an abstract of guest process address space in Qemu. The
management framework is as below:

         s->pasid_as_list
              /|\ \
             / | \ \
     pasid_as_node  ...
        /|\ \
       / | \ \
  device ...

There is a list to store all the PASID tagged AddressSpace, and each
PASID tagged AddressSpace has a device list behind it. This is due to
the fact that a PASID tagged AddressSpace can have multiple devices
binded.

Signed-off-by: Liu, Yi L <yi.l.liu@linux.intel.com>
---
 hw/i386/intel_iommu.c         |  1 +
 include/hw/i386/intel_iommu.h | 24 ++++++++++++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index d92a66d..b8e8dbb 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -3174,6 +3174,7 @@ static void vtd_realize(DeviceState *dev, Error **errp)
     }
 
     QLIST_INIT(&s->notifiers_list);
+    QLIST_INIT(&s->pasid_as_list);
     memset(s->vtd_as_by_bus_num, 0, sizeof(s->vtd_as_by_bus_num));
     memory_region_init_io(&s->csrmem, OBJECT(s), &vtd_mem_ops, s,
                           "intel_iommu", DMAR_REG_SIZE);
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index 0b6dc32..c45dbfe 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -61,6 +61,7 @@ typedef struct VTDContextEntry VTDContextEntry;
 typedef struct VTDContextCacheEntry VTDContextCacheEntry;
 typedef struct IntelIOMMUState IntelIOMMUState;
 typedef struct VTDAddressSpace VTDAddressSpace;
+typedef struct VTDPASIDAddressSpace VTDPASIDAddressSpace;
 typedef struct VTDIOTLBEntry VTDIOTLBEntry;
 typedef struct VTDBus VTDBus;
 typedef union VTD_IR_TableEntry VTD_IR_TableEntry;
@@ -69,6 +70,8 @@ typedef struct VTDIrq VTDIrq;
 typedef struct VTD_MSIMessage VTD_MSIMessage;
 typedef struct IntelIOMMUMRNotifierNode IntelIOMMUMRNotifierNode;
 typedef struct IntelIOMMUAssignedDeviceNode IntelIOMMUAssignedDeviceNode;
+typedef struct IntelPASIDNode IntelPASIDNode;
+typedef struct VTDDeviceNode VTDDeviceNode;
 
 /* Context-Entry */
 struct VTDContextEntry {
@@ -84,6 +87,20 @@ struct VTDContextCacheEntry {
     struct VTDContextEntry context_entry;
 };
 
+struct VTDDeviceNode {
+    PCIBus *bus;
+    uint8_t devfn;
+    QLIST_ENTRY(VTDDeviceNode) next;
+};
+
+struct VTDPASIDAddressSpace {
+    AddressSpace as;
+    IOMMUSVAContext sva_ctx;
+    IntelIOMMUState *iommu_state;
+    /* list of devices binded to a pasid tagged address space */
+    QLIST_HEAD(, VTDDeviceNode) device_list;
+};
+
 struct VTDAddressSpace {
     PCIBus *bus;
     uint8_t devfn;
@@ -264,6 +281,11 @@ struct IntelIOMMUAssignedDeviceNode {
     QLIST_ENTRY(IntelIOMMUAssignedDeviceNode) next;
 };
 
+struct IntelPASIDNode {
+    VTDPASIDAddressSpace *pasid_as;
+    QLIST_ENTRY(IntelPASIDNode) next;
+};
+
 /* The iommu (DMAR) device state struct */
 struct IntelIOMMUState {
     X86IOMMUState x86_iommu;
@@ -304,6 +326,8 @@ struct IntelIOMMUState {
     QLIST_HEAD(, IntelIOMMUMRNotifierNode) notifiers_list;
     /* list of assigned devices */
     QLIST_HEAD(, IntelIOMMUAssignedDeviceNode) assigned_device_list;
+    /* list of pasid tagged address space */
+    QLIST_HEAD(, IntelPASIDNode) pasid_as_list;
 
     /* interrupt remapping */
     bool intr_enabled;              /* Whether guest enabled IR */
-- 
1.9.1