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From: Babu Moger <babu.moger@amd.com>
To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
	rkrcmar@redhat.com
Cc: mtosatti@redhat.com, qemu-devel@nongnu.org, kvm@vger.kernel.org,
	Gary.Hook@amd.com, Thomas.Lendacky@amd.com, babu.moger@amd.com
Subject: [Qemu-devel] [PATCH v3 0/5] Enable TOPOEXT to support hyperthreading on AMD CPU
Date: Mon,  5 Mar 2018 15:18:22 -0500	[thread overview]
Message-ID: <1520281107-5115-1-git-send-email-babu.moger@amd.com> (raw)

This series enables the TOPOEXT feature for AMD CPUs. This is required to
support hyperthreading on kvm guests.

This addresses the issues reported in these bugs:
https://bugzilla.redhat.com/show_bug.cgi?id=1481253
https://bugs.launchpad.net/qemu/+bug/1703506 

v3:
1.Removed the patch #1. Radim mentioned that original typo problem is in 
  linux kernel header. qemu is just copying those files.
2.In previous version, I used the cpuid 4 definitions for AMDs cpuid leaf
  0x8000001D. CPUID 4 is very intel specific and we dont want to expose those
  details under AMD. I have renamed some of these definitions as generic.
  These changes are in patch#1. Radim, let me know if this is what you intended.
3.Added assert to for core_id(Suggested by Radim Krčmář).
4.Changed the if condition under "L3 cache info"(Suggested by Gary Hook).
5.Addressed few more text correction and code cleanup(Suggested by Thomas Lendacky).

v2:
  Fixed few more minor issues per Gary Hook's comments. Thank you Gary.
  Removed the patch#1. We need to handle the instruction cache associativity 
  seperately. It varies based on the cpu family. I will comeback to that later.
  Added two more typo corrections in patch#1 and patch#5.

v1:
  Stanislav Lanci posted few patches earlier. 
  https://patchwork.kernel.org/patch/10040903/

Rebased his patches with few changes.
1.Spit the patches into two, separating cpuid functions 
  0x8000001D and 0x8000001E (Patch 2 and 3).
2.Removed the generic non-intel check and made a separate patch
  with some changes(Patch 5).
3.Fixed L3_N_SETS_AMD(from 4096 to 8192) based on CPUID_Fn8000001D_ECX_x03.

Added 2 more patches.
Patch 1. Fixes cache associativity.
Patch 4. Adds TOPOEXT feature on AMD EPYC CPU.

Babu Moger (3):
  target/i386: Generalize some of the macro definitions
  target/i386: Enable TOPOEXT feature on AMD EPYC CPU
  target/i386: Remove generic SMT thread check

Stanislav Lanci (2):
  target/i386: Populate AMD Processor Cache Information
  target/i386: Add support for CPUID_8000_001E for AMD

 target/i386/cpu.c | 157 ++++++++++++++++++++++++++++++++++++++++++------------
 target/i386/kvm.c |  29 ++++++++--
 2 files changed, 149 insertions(+), 37 deletions(-)

-- 
1.8.3.1

             reply	other threads:[~2018-03-05 20:18 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-05 20:18 Babu Moger [this message]
2018-03-05 20:18 ` [Qemu-devel] [PATCH v3 1/5] target/i386: Generalize some of the macro definitions Babu Moger
2018-03-05 20:18 ` [Qemu-devel] [PATCH v3 2/5] target/i386: Populate AMD Processor Cache Information Babu Moger
2018-03-05 20:18 ` [Qemu-devel] [PATCH v3 3/5] target/i386: Add support for CPUID_8000_001E for AMD Babu Moger
2018-03-05 20:18 ` [Qemu-devel] [PATCH v3 4/5] target/i386: Enable TOPOEXT feature on AMD EPYC CPU Babu Moger
2018-03-05 20:18 ` [Qemu-devel] [PATCH v3 5/5] target/i386: Remove generic SMT thread check Babu Moger

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