From: Michael Clark <mjc@sifive.com>
To: qemu-devel@nongnu.org
Cc: Michael Clark <mjc@sifive.com>,
Palmer Dabbelt <palmer@sifive.com>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
RISC-V Patches <patches@groups.riscv.org>,
Stefan O'Rear <sorear2@gmail.com>
Subject: [Qemu-devel] [PATCH v1 10/22] RISC-V: Hold rcu_read_lock when accessing memory
Date: Wed, 7 Mar 2018 09:56:18 +1300 [thread overview]
Message-ID: <1520369790-38306-9-git-send-email-mjc@sifive.com> (raw)
In-Reply-To: <1520369790-38306-1-git-send-email-mjc@sifive.com>
>From reading other code that accesses memory regions directly,
it appears that the rcu_read_lock needs to be held. Note: the
original code for accessing RAM directly was added because
there is no other way to use atomic_cmpxchg easily.
Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Stefan O'Rear <sorear2@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
target/riscv/helper.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/riscv/helper.c b/target/riscv/helper.c
index 02cbcea..228933c 100644
--- a/target/riscv/helper.c
+++ b/target/riscv/helper.c
@@ -209,6 +209,7 @@ restart:
as the PTE is no longer valid */
MemoryRegion *mr;
hwaddr l = sizeof(target_ulong), addr1;
+ rcu_read_lock();
mr = address_space_translate(cs->as, pte_addr,
&addr1, &l, false);
if (memory_access_is_direct(mr, true)) {
@@ -222,16 +223,19 @@ restart:
target_ulong old_pte =
atomic_cmpxchg(pte_pa, pte, updated_pte);
if (old_pte != pte) {
+ rcu_read_unlock();
goto restart;
} else {
pte = updated_pte;
}
#endif
} else {
+ rcu_read_unlock();
/* misconfigured PTE in ROM (AD bits are not preset) or
* PTE is in IO space and can't be updated atomically */
return TRANSLATE_FAIL;
}
+ rcu_read_unlock();
}
/* for superpage mappings, make a fake leaf PTE for the TLB's
--
2.7.0
next prev parent reply other threads:[~2018-03-06 20:58 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-06 20:56 [Qemu-devel] [PATCH v1 02/22] RISC-V: Replace hardcoded constants with enum values Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 03/22] RISC-V: Make virt board description match spike Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 04/22] RISC-V: Use ROM base address and size from memmap Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 05/22] RISC-V: Remove identity_translate from load_elf Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 06/22] RISC-V: Mark ROM read-only after copying in code Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 07/22] RISC-V: Remove unused class definitions Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 08/22] RISC-V: Make sure rom has space for fdt Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 09/22] RISC-V: Include hexidecimal in disassembly Michael Clark
2018-03-06 20:56 ` Michael Clark [this message]
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 11/22] RISC-V: Improve page table walker spec compliance Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 12/22] RISC-V: Update E order and I extension order Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 13/22] RISC-V: Make some header guards more specific Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 14/22] RISC-V: Make virt header comment title consistent Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 15/22] RISC-V: Use memory_region_is_ram in pte update Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 16/22] RISC-V: Remove EM_RISCV ELF_MACHINE indirection Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 17/22] RISC-V: Hardwire satp to 0 for no-mmu case Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 18/22] RISC-V: Remove braces from satp case statement Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 19/22] RISC-V: riscv-qemu port supports sv39 and sv48 Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 20/22] RISC-V: vectored traps are optional Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 21/22] RISC-V: No traps on writes to misa/minstret/mcycle Michael Clark
2018-03-06 20:56 ` [Qemu-devel] [PATCH v1 22/22] RISC-V: Remove support for adhoc X_COP interrupt Michael Clark
-- strict thread matches above, loose matches on Subject: below --
2018-03-06 20:43 [Qemu-devel] [PATCH v1 00/22] Spec conformance bug fixes and cleanups Michael Clark
2018-03-06 20:43 ` [Qemu-devel] [PATCH v1 10/22] RISC-V: Hold rcu_read_lock when accessing memory Michael Clark
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