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From: Michael Clark <mjc@sifive.com>
To: qemu-devel@nongnu.org
Cc: Michael Clark <mjc@sifive.com>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	Palmer Dabbelt <palmer@sifive.com>
Subject: [Qemu-devel] [PATCH v2 01/23] RISC-V: Make virt create_fdt interface consistent
Date: Fri,  9 Mar 2018 17:12:23 +1300	[thread overview]
Message-ID: <1520568765-58189-2-git-send-email-mjc@sifive.com> (raw)
In-Reply-To: <1520568765-58189-1-git-send-email-mjc@sifive.com>

create_fdt sets the fdt variable on RISCVVirtState and this is
used to access the fdt. This reverts a change introduced in
https://github.com/riscv/riscv-qemu/pull/109 which introduced
a redundant return value, overlooking the RISCVVirtState
structure member that made create_fdt inconsistent with the
other RISC-V machines. The other alternative is to change
the other boards to return the fdt. Note: the RISCVVirtState
also contains fdt_size.

Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 hw/riscv/virt.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index e2c214e..37968d2 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -108,7 +108,7 @@ static hwaddr load_initrd(const char *filename, uint64_t mem_size,
     return *start + size;
 }
 
-static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
+static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
     uint64_t mem_size, const char *cmdline)
 {
     void *fdt;
@@ -264,8 +264,6 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
     qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename);
     qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", cmdline);
     g_free(nodename);
-
-    return fdt;
 }
 
 static void riscv_virt_board_init(MachineState *machine)
@@ -279,7 +277,6 @@ static void riscv_virt_board_init(MachineState *machine)
     char *plic_hart_config;
     size_t plic_hart_config_len;
     int i;
-    void *fdt;
 
     /* Initialize SOC */
     object_initialize(&s->soc, sizeof(s->soc), TYPE_RISCV_HART_ARRAY);
@@ -299,7 +296,7 @@ static void riscv_virt_board_init(MachineState *machine)
         main_mem);
 
     /* create device tree */
-    fdt = create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline);
+    create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline);
 
     /* boot rom */
     memory_region_init_ram(boot_rom, NULL, "riscv_virt_board.bootrom",
@@ -314,9 +311,9 @@ static void riscv_virt_board_init(MachineState *machine)
             hwaddr end = load_initrd(machine->initrd_filename,
                                      machine->ram_size, kernel_entry,
                                      &start);
-            qemu_fdt_setprop_cell(fdt, "/chosen",
-                                  "linux,initrd-start", start);
-            qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
+            qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-start",
+                                  start);
+            qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end",
                                   end);
         }
     }
-- 
2.7.0

  reply	other threads:[~2018-03-09  4:14 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-09  4:12 [Qemu-devel] [PATCH v2 00/23] RISC-V Post-merge spec conformance and cleanup Michael Clark
2018-03-09  4:12 ` Michael Clark [this message]
2018-03-10 20:33   ` [Qemu-devel] [PATCH v2 01/23] RISC-V: Make virt create_fdt interface consistent Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 02/23] RISC-V: Replace hardcoded constants with enum values Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 03/23] RISC-V: Make virt board description match spike Michael Clark
2018-03-10 20:34   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 04/23] RISC-V: Use ROM base address and size from memmap Michael Clark
2018-03-10 20:35   ` Philippe Mathieu-Daudé
2018-03-12 18:24   ` Eric Blake
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 05/23] RISC-V: Remove identity_translate from load_elf Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 06/23] RISC-V: Mark ROM read-only after copying in code Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 07/23] RISC-V: Remove unused class definitions Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 08/23] RISC-V: Make sure rom has space for fdt Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 09/23] RISC-V: Include intruction hex in disassembly Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 10/23] RISC-V: Hold rcu_read_lock when accessing memory Michael Clark
2018-03-10 20:45   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 11/23] RISC-V: Improve page table walker spec compliance Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 12/23] RISC-V: Update E order and I extension order Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 13/23] RISC-V: Make some header guards more specific Michael Clark
2018-03-10 20:30   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 14/23] RISC-V: Make virt header comment title consistent Michael Clark
2018-03-10 20:31   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 15/23] RISC-V: Use memory_region_is_ram in pte update Michael Clark
2018-03-10 20:42   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 16/23] RISC-V: Remove EM_RISCV ELF_MACHINE indirection Michael Clark
2018-03-10 20:32   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 17/23] RISC-V: Hardwire satp to 0 for no-mmu case Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 18/23] RISC-V: Remove braces from satp case statement Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 19/23] RISC-V: riscv-qemu port supports sv39 and sv48 Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 20/23] RISC-V: vectored traps are optional Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 21/23] RISC-V: No traps on writes to misa, minstret, mcycle Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 22/23] RISC-V: Remove support for adhoc X_COP interrupt Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 23/23] RISC-V: Convert cpu definition towards future model Michael Clark
2018-03-10 20:30   ` Philippe Mathieu-Daudé
2018-03-12 17:34 ` [Qemu-devel] [PATCH v2 00/23] RISC-V Post-merge spec conformance and cleanup no-reply

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