From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34057) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1btcZz-0003da-FA for qemu-devel@nongnu.org; Mon, 10 Oct 2016 11:33:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1btcZx-0001zr-K5 for qemu-devel@nongnu.org; Mon, 10 Oct 2016 11:33:26 -0400 Sender: Richard Henderson References: <1475866623-16841-1-git-send-email-nikunj@linux.vnet.ibm.com> <1475866623-16841-4-git-send-email-nikunj@linux.vnet.ibm.com> From: Richard Henderson Message-ID: <1520cb64-971a-ce4d-0341-215db1b73b97@twiddle.net> Date: Mon, 10 Oct 2016 10:33:21 -0500 MIME-Version: 1.0 In-Reply-To: <1475866623-16841-4-git-send-email-nikunj@linux.vnet.ibm.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 3/4] target-ppc: implement xxbr[qdwh] instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Nikunj A Dadhania , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Cc: qemu-devel@nongnu.org, benh@kernel.crashing.org On 10/07/2016 01:57 PM, Nikunj A Dadhania wrote: > +static void gen_xxbrq(DisasContext *ctx) > +{ > + TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); > + TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); > + TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode)); > + TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode)); > + > + if (unlikely(!ctx->vsx_enabled)) { > + gen_exception(ctx, POWERPC_EXCP_VSXU); > + return; > + } > + tcg_gen_bswap64_i64(xth, xbl); > + tcg_gen_bswap64_i64(xtl, xbh); > +} You need a temporary for the case of T==B. You don't want to overwrite XBH with XTH before you consume the input. r~