From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51131) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8XNy-0003Ne-3N for qemu-devel@nongnu.org; Tue, 17 Apr 2018 16:39:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f8XNv-00005k-UY for qemu-devel@nongnu.org; Tue, 17 Apr 2018 16:39:29 -0400 From: Aaron Lindsay Date: Tue, 17 Apr 2018 16:38:04 -0400 Message-Id: <1523997485-1905-21-git-send-email-alindsay@codeaurora.org> In-Reply-To: <1523997485-1905-1-git-send-email-alindsay@codeaurora.org> References: <1523997485-1905-1-git-send-email-alindsay@codeaurora.org> Subject: [Qemu-devel] [PATCH v4 20/21] target/arm: Mark PMINTENSET accesses as possibly doing IO List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-arm@nongnu.org, Peter Maydell , Alistair Francis , Wei Huang , Peter Crosthwaite Cc: qemu-devel@nongnu.org, Michael Spradling , Digant Desai , Aaron Lindsay This makes it match its AArch64 equivalent, PMINTENSET_EL1 Signed-off-by: Aaron Lindsay --- target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 3902719..046e37c 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -1732,7 +1732,7 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { .writefn = pmuserenr_write, .raw_writefn = raw_write }, { .name = "PMINTENSET", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 1, .access = PL1_RW, .accessfn = access_tpm, - .type = ARM_CP_ALIAS, + .type = ARM_CP_ALIAS | ARM_CP_IO, .fieldoffset = offsetoflow32(CPUARMState, cp15.c9_pminten), .resetvalue = 0, .writefn = pmintenset_write, .raw_writefn = raw_write }, -- Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.