From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54495) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fF6kK-0004N6-Ec for qemu-devel@nongnu.org; Sat, 05 May 2018 19:37:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fF6kJ-0003z3-Hm for qemu-devel@nongnu.org; Sat, 05 May 2018 19:37:44 -0400 Received: from mail-pf0-x243.google.com ([2607:f8b0:400e:c00::243]:46609) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fF6kJ-0003yZ-CI for qemu-devel@nongnu.org; Sat, 05 May 2018 19:37:43 -0400 Received: by mail-pf0-x243.google.com with SMTP id p12so20071052pff.13 for ; Sat, 05 May 2018 16:37:43 -0700 (PDT) From: Michael Clark Date: Sun, 6 May 2018 11:35:20 +1200 Message-Id: <1525563325-62963-16-git-send-email-mjc@sifive.com> In-Reply-To: <1525563325-62963-1-git-send-email-mjc@sifive.com> References: <1525563325-62963-1-git-send-email-mjc@sifive.com> Subject: [Qemu-devel] [PULL 15/20] RISC-V: Allow S-mode mxr access when priv ISA >= v1.10 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: patches@groups.riscv.org, Michael Clark , Sagar Karandikar , Bastian Koppelmann , Palmer Dabbelt , Alistair Francis The mstatus.MXR alias in sstatus should only be writable by S-mode if the privileged ISA version >= v1.10. Also MXR was masked in sstatus CSR read but not sstatus CSR writes. Now we correctly mask sstatus.mxr in both read and write. Cc: Sagar Karandikar Cc: Bastian Koppelmann Cc: Palmer Dabbelt Cc: Alistair Francis Signed-off-by: Michael Clark Reviewed-by: Alistair Francis --- target/riscv/op_helper.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 101dac1ee8dc..f45ac7306c38 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -234,7 +234,10 @@ void csr_write_helper(CPURISCVState *env, target_ulong val_to_write, target_ulong ms = env->mstatus; target_ulong mask = SSTATUS_SIE | SSTATUS_SPIE | SSTATUS_UIE | SSTATUS_UPIE | SSTATUS_SPP | SSTATUS_FS | SSTATUS_XS - | SSTATUS_SUM | SSTATUS_MXR | SSTATUS_SD; + | SSTATUS_SUM | SSTATUS_SD; + if (env->priv_ver >= PRIV_VERSION_1_10_0) { + mask |= SSTATUS_MXR; + } ms = (ms & ~mask) | (val_to_write & mask); csr_write_helper(env, ms, CSR_MSTATUS); break; @@ -441,7 +444,7 @@ target_ulong csr_read_helper(CPURISCVState *env, target_ulong csrno) case CSR_SSTATUS: { target_ulong mask = SSTATUS_SIE | SSTATUS_SPIE | SSTATUS_UIE | SSTATUS_UPIE | SSTATUS_SPP | SSTATUS_FS | SSTATUS_XS - | SSTATUS_SUM | SSTATUS_SD; + | SSTATUS_SUM | SSTATUS_SD; if (env->priv_ver >= PRIV_VERSION_1_10_0) { mask |= SSTATUS_MXR; } -- 2.7.0