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From: Andrew Jeffery <andrew@aj.id.au>
To: "Cédric Le Goater" <clg@kaod.org>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>,
	Joel Stanley <joel@jms.id.au>
Subject: Re: [Qemu-devel] [PATCH v2 2/3] aspeed: initialize the SCU controller first
Date: Mon, 25 Jun 2018 10:24:48 +0930	[thread overview]
Message-ID: <1529888088.2193467.1418937200.513B366B@webmail.messagingengine.com> (raw)
In-Reply-To: <20180622075700.5923-3-clg@kaod.org>

On Fri, 22 Jun 2018, at 17:26, Cédric Le Goater wrote:
> The System Control Unit should be initialized first as it drives all
> the configuration of the SoC and other device models.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> Reviewed-by: Joel Stanley <joel@jms.id.au>

Acked-by: Andrew Jeffery <andrew@aj.id.au>

> ---
>  hw/arm/aspeed_soc.c | 40 ++++++++++++++++++++--------------------
>  1 file changed, 20 insertions(+), 20 deletions(-)
> 
> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
> index 1955a892f4a4..7cc05ee27ea4 100644
> --- a/hw/arm/aspeed_soc.c
> +++ b/hw/arm/aspeed_soc.c
> @@ -109,18 +109,6 @@ static void aspeed_soc_init(Object *obj)
>      object_initialize(&s->cpu, sizeof(s->cpu), sc->info->cpu_type);
>      object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
>  
> -    object_initialize(&s->vic, sizeof(s->vic), TYPE_ASPEED_VIC);
> -    object_property_add_child(obj, "vic", OBJECT(&s->vic), NULL);
> -    qdev_set_parent_bus(DEVICE(&s->vic), sysbus_get_default());
> -
> -    object_initialize(&s->timerctrl, sizeof(s->timerctrl), TYPE_ASPEED_TIMER);
> -    object_property_add_child(obj, "timerctrl", OBJECT(&s->timerctrl), NULL);
> -    qdev_set_parent_bus(DEVICE(&s->timerctrl), sysbus_get_default());
> -
> -    object_initialize(&s->i2c, sizeof(s->i2c), TYPE_ASPEED_I2C);
> -    object_property_add_child(obj, "i2c", OBJECT(&s->i2c), NULL);
> -    qdev_set_parent_bus(DEVICE(&s->i2c), sysbus_get_default());
> -
>      object_initialize(&s->scu, sizeof(s->scu), TYPE_ASPEED_SCU);
>      object_property_add_child(obj, "scu", OBJECT(&s->scu), NULL);
>      qdev_set_parent_bus(DEVICE(&s->scu), sysbus_get_default());
> @@ -133,6 +121,18 @@ static void aspeed_soc_init(Object *obj)
>      object_property_add_alias(obj, "hw-prot-key", OBJECT(&s->scu),
>                                "hw-prot-key", &error_abort);
>  
> +    object_initialize(&s->vic, sizeof(s->vic), TYPE_ASPEED_VIC);
> +    object_property_add_child(obj, "vic", OBJECT(&s->vic), NULL);
> +    qdev_set_parent_bus(DEVICE(&s->vic), sysbus_get_default());
> +
> +    object_initialize(&s->timerctrl, sizeof(s->timerctrl), 
> TYPE_ASPEED_TIMER);
> +    object_property_add_child(obj, "timerctrl", OBJECT(&s->timerctrl), 
> NULL);
> +    qdev_set_parent_bus(DEVICE(&s->timerctrl), sysbus_get_default());
> +
> +    object_initialize(&s->i2c, sizeof(s->i2c), TYPE_ASPEED_I2C);
> +    object_property_add_child(obj, "i2c", OBJECT(&s->i2c), NULL);
> +    qdev_set_parent_bus(DEVICE(&s->i2c), sysbus_get_default());
> +
>      object_initialize(&s->fmc, sizeof(s->fmc), sc->info->fmc_typename);
>      object_property_add_child(obj, "fmc", OBJECT(&s->fmc), NULL);
>      qdev_set_parent_bus(DEVICE(&s->fmc), sysbus_get_default());
> @@ -195,6 +195,14 @@ static void aspeed_soc_realize(DeviceState *dev, 
> Error **errp)
>      memory_region_add_subregion(get_system_memory(), 
> ASPEED_SOC_SRAM_BASE,
>                                  &s->sram);
>  
> +    /* SCU */
> +    object_property_set_bool(OBJECT(&s->scu), true, "realized", &err);
> +    if (err) {
> +        error_propagate(errp, err);
> +        return;
> +    }
> +    sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, ASPEED_SOC_SCU_BASE);
> +
>      /* VIC */
>      object_property_set_bool(OBJECT(&s->vic), true, "realized", &err);
>      if (err) {
> @@ -219,14 +227,6 @@ static void aspeed_soc_realize(DeviceState *dev, 
> Error **errp)
>          sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq);
>      }
>  
> -    /* SCU */
> -    object_property_set_bool(OBJECT(&s->scu), true, "realized", &err);
> -    if (err) {
> -        error_propagate(errp, err);
> -        return;
> -    }
> -    sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, ASPEED_SOC_SCU_BASE);
> -
>      /* UART - attach an 8250 to the IO space as our UART5 */
>      if (serial_hd(0)) {
>          qemu_irq uart5 = qdev_get_gpio_in(DEVICE(&s->vic), uart_irqs[4]);
> -- 
> 2.13.6
> 

  reply	other threads:[~2018-06-25  0:54 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-22  7:56 [Qemu-devel] [PATCH v2 0/3] aspeed: introduce the APB clock settings Cédric Le Goater
2018-06-22  7:56 ` [Qemu-devel] [PATCH v2 1/3] aspeed/scu: introduce clock frequencies Cédric Le Goater
2018-06-25  0:54   ` Andrew Jeffery
2018-06-22  7:56 ` [Qemu-devel] [PATCH v2 2/3] aspeed: initialize the SCU controller first Cédric Le Goater
2018-06-25  0:54   ` Andrew Jeffery [this message]
2018-06-22  7:57 ` [Qemu-devel] [PATCH v2 3/3] aspeed/timer: use the APB frequency from the SCU Cédric Le Goater
2018-06-25  0:59   ` Andrew Jeffery
2018-08-31  8:34   ` Thomas Huth
2018-08-31  8:55     ` Cédric Le Goater
2018-06-22 11:14 ` [Qemu-devel] [PATCH v2 0/3] aspeed: introduce the APB clock settings no-reply
2018-06-26 16:05 ` Peter Maydell

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