[Qemu-devel] [PATCH v2 0/5] Add Icelake CPU model

[Robert Hoo <robert.hu@linux.intel.com>]

This patch set defines the new guest CPU models of Icelake.

The first patch adds support of IA32_PRED_CMD MSR (IBPB) and IA32_ARCH_CAPABILITIES MSR.
Other patches add CPUID bits feature words for new features, like PCONFIG,
WBNOINVD. The final patch defines Icelake-{Server,Client} CPU models.

Changelog:
v2
	Per Paolo's comment, remove unnecessary CPU vmstate check for write/read only
IA32_PRED_CMD and IA32_ARCH_CAPABILITIES MSRs.

Robert Hoo (5):
  i386: Add support for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES MSRs
  i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR
  i386: Add CPUID bit for PCONFIG
  i386: Add CPUID bit for WBNOINVD
  i386: Add new CPU model Icelake-{Server,Client}

 target/i386/cpu.c | 122 ++++++++++++++++++++++++++++++++++++++++++++++++++++--
 target/i386/cpu.h |   7 ++++
 target/i386/kvm.c |  27 +++++++++++-
 3 files changed, 152 insertions(+), 4 deletions(-)

-- 
1.8.3.1