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From: Jingqi Liu <jingqi.liu@intel.com>
To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com
Cc: qemu-devel@nongnu.org, wei.w.wang@intel.com,
	Jingqi Liu <jingqi.liu@intel.com>
Subject: [Qemu-devel] [PATCH 0/3] x86/cpu: Enable a few new cpu features
Date: Tue, 10 Jul 2018 16:57:31 +0800	[thread overview]
Message-ID: <1531213054-63327-1-git-send-email-jingqi.liu@intel.com> (raw)

Enable a few new cpu features including UMONITOR, UMWAIT, TPAUSE,
MOVDIRI and MOVDIR64B.

UMONITOR, UMWAIT, and TPAUSE are a set of user wait instructions.
MOVDIRI moves doubleword or quadword from register to memory through
direct store.
MOVDIR64B moves 64-bytes as direct-store with 64-bytes write atomicity.

The bits definition:
CPUID.(EAX=7,ECX=0):ECX[bit 05] WAITPKG
CPUID.(EAX=7,ECX=0):ECX[bit 27] MOVDIRI
CPUID.(EAX=7,ECX=0):ECX[bit 28] MOVDIR64B

The release document ref below link:
https://software.intel.com/sites/default/files/managed/c5/15/\
architecture-instruction-set-extensions-programming-reference.pdf

Jingqi Liu (3):
  x86/cpu: Enable UMONITOR/UMWAIT/TPAUSE cpu features
  x86/cpu: Enable MOVDIRI cpu feature
  x86/cpu: Enable MOVDIR64B cpu feature

 target/i386/cpu.c | 6 +++---
 target/i386/cpu.h | 3 +++
 2 files changed, 6 insertions(+), 3 deletions(-)

-- 
1.8.3.1

             reply	other threads:[~2018-07-10  8:58 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-10  8:57 Jingqi Liu [this message]
2018-07-10  8:57 ` [Qemu-devel] [PATCH 1/3] x86/cpu: Enable UMONITOR/UMWAIT/TPAUSE cpu features Jingqi Liu
2018-08-06 22:03   ` Eduardo Habkost
2018-08-20 12:38     ` Liu, Jingqi
2018-07-10  8:57 ` [Qemu-devel] [PATCH 2/3] x86/cpu: Enable MOVDIRI cpu feature Jingqi Liu
2018-07-10  8:57 ` [Qemu-devel] [PATCH 3/3] x86/cpu: Enable MOVDIR64B " Jingqi Liu
2018-07-16 14:59 ` [Qemu-devel] [PATCH 0/3] x86/cpu: Enable a few new cpu features Paolo Bonzini
2018-07-17  1:12   ` Liu, Jingqi
2018-08-06  8:21   ` Liu, Jingqi
2018-08-06 16:59     ` Paolo Bonzini

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