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From: Stefan Markovic <stefan.markovic@rt-rk.com>
To: qemu-devel@nongnu.org
Cc: laurent@vivier.eu, riku.voipio@iki.fi,
	philippe.mathieu.daude@gmail.com, aurelien@aurel32.net,
	richard.henderson@linaro.org, amarkovic@wavecomp.com,
	smarkovic@wavecomp.com, pjovanovic@wavecomp.com,
	pburton@wavecomp.com, arikalo@wavecomp.com
Subject: [Qemu-devel] [PATCH v6 32/77] target/mips: Add emulation of misc nanoMIPS instructions (p_lsx)
Date: Thu,  2 Aug 2018 16:16:19 +0200	[thread overview]
Message-ID: <1533219424-7627-33-git-send-email-stefan.markovic@rt-rk.com> (raw)
In-Reply-To: <1533219424-7627-1-git-send-email-stefan.markovic@rt-rk.com>

From: Yongbok Kim <yongbok.kim@mips.com>

Add emulation of nanoMIPS instructions situated in pool p_lsx, and
emulation of LSA instruction as well.

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
---
 target/mips/translate.c | 132 +++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 131 insertions(+), 1 deletion(-)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 7cc1a92..dda903c 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -16853,6 +16853,125 @@ static void gen_pool32axf_nanomips_insn(CPUMIPSState *env, DisasContext *ctx)
     }
 }
 
+
+static void gen_p_lsx(DisasContext *ctx, int rd, int rs, int rt)
+{
+    TCGv t0, t1;
+    t0 = tcg_temp_new();
+    t1 = tcg_temp_new();
+
+    gen_load_gpr(t0, rs);
+    gen_load_gpr(t1, rt);
+
+    if ((extract32(ctx->opcode, 6, 1)) == 1) {
+        /* PP.LSXS instructions require shifting */
+        switch (extract32(ctx->opcode, 7, 4)) {
+        case NM_LHXS:
+        case NM_SHXS:
+        case NM_LHUXS:
+            tcg_gen_shli_tl(t0, t0, 1);
+            break;
+        case NM_LWXS:
+        case NM_SWXS:
+        case NM_LWC1XS:
+        case NM_SWC1XS:
+            tcg_gen_shli_tl(t0, t0, 2);
+            break;
+        case NM_LDC1XS:
+        case NM_SDC1XS:
+            tcg_gen_shli_tl(t0, t0, 3);
+            break;
+        }
+    }
+    gen_op_addr_add(ctx, t0, t0, t1);
+
+    switch (extract32(ctx->opcode, 7, 4)) {
+    case NM_LBX:
+        tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx,
+                           MO_SB);
+        gen_store_gpr(t0, rd);
+        break;
+    case NM_LHX:
+    /*case NM_LHXS:*/
+        tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx,
+                           MO_TESW);
+        gen_store_gpr(t0, rd);
+        break;
+    case NM_LWX:
+    /*case NM_LWXS:*/
+        tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx,
+                           MO_TESL);
+        gen_store_gpr(t0, rd);
+        break;
+    case NM_LBUX:
+        tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx,
+                           MO_UB);
+        gen_store_gpr(t0, rd);
+        break;
+    case NM_LHUX:
+    /*case NM_LHUXS:*/
+        tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx,
+                           MO_TEUW);
+        gen_store_gpr(t0, rd);
+        break;
+    case NM_SBX:
+        gen_load_gpr(t1, rd);
+        tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx,
+                           MO_8);
+        break;
+    case NM_SHX:
+    /*case NM_SHXS:*/
+        gen_load_gpr(t1, rd);
+        tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx,
+                           MO_TEUW);
+        break;
+    case NM_SWX:
+    /*case NM_SWXS:*/
+        gen_load_gpr(t1, rd);
+        tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx,
+                           MO_TEUL);
+        break;
+    case NM_LWC1X:
+    /*case NM_LWC1XS:*/
+    case NM_LDC1X:
+    /*case NM_LDC1XS:*/
+    case NM_SWC1X:
+    /*case NM_SWC1XS:*/
+    case NM_SDC1X:
+    /*case NM_SDC1XS:*/
+        if (ctx->CP0_Config1 & (1 << CP0C1_FP)) {
+            check_cp1_enabled(ctx);
+            switch (extract32(ctx->opcode, 7, 4)) {
+            case NM_LWC1X:
+            /*case NM_LWC1XS:*/
+                gen_flt_ldst(ctx, OPC_LWC1, rd, t0);
+                break;
+            case NM_LDC1X:
+            /*case NM_LDC1XS:*/
+                gen_flt_ldst(ctx, OPC_LDC1, rd, t0);
+                break;
+            case NM_SWC1X:
+            /*case NM_SWC1XS:*/
+                gen_flt_ldst(ctx, OPC_SWC1, rd, t0);
+                break;
+            case NM_SDC1X:
+            /*case NM_SDC1XS:*/
+                gen_flt_ldst(ctx, OPC_SDC1, rd, t0);
+                break;
+            }
+        } else {
+            generate_exception_err(ctx, EXCP_CpU, 1);
+        }
+        break;
+    default:
+        generate_exception_end(ctx, EXCP_RI);
+        break;
+    }
+
+    tcg_temp_free(t0);
+    tcg_temp_free(t1);
+}
+
 static void gen_pool32f_nanomips_insn(DisasContext *ctx)
 {
     int rt, rs, rd;
@@ -17156,7 +17275,7 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
 {
     uint16_t insn;
     uint32_t op;
-    int rt, rs;
+    int rt, rs, rd;
     int offset;
     int imm;
 
@@ -17165,6 +17284,7 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
 
     rt = extract32(ctx->opcode, 21, 5);
     rs = extract32(ctx->opcode, 16, 5);
+    rd = extract32(ctx->opcode, 11, 5);
 
     op = extract32(ctx->opcode, 26, 6);
     switch (op) {
@@ -17223,6 +17343,16 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
             break;
         case NM_POOL32A7:
             switch (extract32(ctx->opcode, 3, 3)) {
+            case NM_P_LSX:
+                gen_p_lsx(ctx, rd, rs, rt);
+                break;
+            case NM_LSA:
+                /* In nanoMIPS, the shift field directly encodes the shift
+                 * amount, meaning that the supported shift values are in
+                 * the range 0 to 3 (instead of 1 to 4 in MIPSR6). */
+                gen_lsa(ctx, OPC_LSA, rd, rs, rt,
+                        extract32(ctx->opcode, 9, 2) - 1);
+                break;
             case NM_POOL32AXF:
                 gen_pool32axf_nanomips_insn(env, ctx);
                 break;
-- 
1.9.1

  parent reply	other threads:[~2018-08-02 14:30 UTC|newest]

Thread overview: 94+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-02 14:15 [Qemu-devel] [PATCH v6 00/77] Add nanoMIPS support to QEMU Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 01/77] MAINTAINERS: Update target/mips maintainer's email addresses Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 02/77] target/mips: Avoid case statements formulated by ranges Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 03/77] target/mips: Mark switch fallthroughs with interpretable comments Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 04/77] target/mips: Fix two instances of shadow variables Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 05/77] target/mips: Update some CP0 registers bit definitions Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 06/77] target/mips: Add CP0 BadInstrX register Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 07/77] target/mips: Add gen_op_addr_addi() Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 08/77] target/mips: Don't update BadVAddr register in Debug Mode Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 09/77] target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0 Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 10/77] elf: Remove duplicate preprocessor constant definition Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 11/77] elf: Add ELF flags for MIPS machine variants Stefan Markovic
2018-08-02 14:15 ` [Qemu-devel] [PATCH v6 12/77] linux-user: Update MIPS syscall numbers up to kernel 4.18 headers Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 13/77] linux-user: Add preprocessor availability control to some syscalls Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 14/77] target/mips: Add preprocessor constants for nanoMIPS Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 15/77] target/mips: Add nanoMIPS base instruction set opcodes Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 16/77] target/mips: Add nanoMIPS DSP ASE opcodes Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 17/77] target/mips: Add placeholder and invocation of decode_nanomips_opc() Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 18/77] target/mips: Add nanoMIPS decoding and extraction utilities Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 19/77] target/mips: Add emulation of nanoMIPS 16-bit arithmetic instructions Stefan Markovic
2018-08-02 17:32   ` Richard Henderson
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 20/77] target/mips: Add emulation of nanoMIPS 16-bit branch instructions Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 21/77] target/mips: Add emulation of nanoMIPS 16-bit shift instructions Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 22/77] target/mips: Add emulation of nanoMIPS 16-bit misc instructions Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 23/77] target/mips: Add emulation of nanoMIPS 16-bit load and store instructions Stefan Markovic
2018-08-02 17:39   ` Richard Henderson
2018-08-03 12:30     ` Aleksandar Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 24/77] target/mips: Add emulation of nanoMIPS 16-bit logic instructions Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 25/77] target/mips: Add emulation of nanoMIPS 16-bit save and restore instructions Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 26/77] target/mips: Add emulation of some common nanoMIPS 32-bit instructions Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 27/77] target/mips: Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 28/77] target/mips: Add emulation of nanoMIPS 48-bit instructions Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 29/77] target/mips: Add emulation of nanoMIPS FP instructions Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 30/77] target/mips: Add emulation of misc nanoMIPS instructions (pool32a0) Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 31/77] target/mips: Add emulation of misc nanoMIPS instructions (pool32axf) Stefan Markovic
2018-08-02 14:16 ` Stefan Markovic [this message]
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 33/77] target/mips: Implement emulation of nanoMIPS ROTX instruction Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 34/77] target/mips: Implement emulation of nanoMIPS EXTW instruction Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 35/77] target/mips: Add emulation of nanoMIPS 32-bit load and store instructions Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 36/77] target/mips: Add emulation of nanoMIPS 32-bit branch instructions Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 37/77] target/mips: Implement MT ASE support for nanoMIPS Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 38/77] target/mips: Add emulation of DSP ASE for nanoMIPS - part 1 Stefan Markovic
2018-08-03 10:55   ` Aleksandar Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 39/77] target/mips: Add emulation of DSP ASE for nanoMIPS - part 2 Stefan Markovic
2018-08-03 11:20   ` Aleksandar Markovic
2018-08-03 14:06     ` Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 40/77] target/mips: Add emulation of DSP ASE for nanoMIPS - part 3 Stefan Markovic
2018-08-03 11:27   ` Aleksandar Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 41/77] target/mips: Add emulation of DSP ASE for nanoMIPS - part 4 Stefan Markovic
2018-08-03 11:31   ` Aleksandar Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 42/77] target/mips: Add emulation of DSP ASE for nanoMIPS - part 5 Stefan Markovic
2018-08-03 11:55   ` Aleksandar Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 43/77] target/mips: Add emulation of DSP ASE for nanoMIPS - part 6 Stefan Markovic
2018-08-03 12:00   ` Aleksandar Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 44/77] target/mips: Add handling of branch delay slots for nanoMIPS Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 45/77] target/mips: Implement emulation of nanoMIPS LLWP/SCWP pair Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 46/77] target/mips: Add updating BadInstr, BadInstrP, BadInstrX for nanoMIPS Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 47/77] target/mips: Implement CP0 Config1.WR bit functionality Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 48/77] target/mips: Adjust exception_resume_pc() for nanoMIPS Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 49/77] target/mips: Adjust set_hflags_for_handler() " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 50/77] target/mips: Adjust set_pc() " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 51/77] target/mips: Fix ERET/ERETNC behavior related to ADEL exception Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 52/77] elf: Add nanoMIPS specific variations in ELF header fields Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 53/77] elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 54/77] elf: Don't check FCR31_NAN2008 bit for nanoMIPS Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 55/77] mips_malta: Add basic nanoMIPS boot code for MIPS' Malta Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 56/77] mips_malta: Setup GT64120 BARs in nanoMIPS bootloader Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 57/77] mips_malta: Fix semihosting argument passing for nanoMIPS bare metal Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 58/77] gdbstub: Disable handling of nanoMIPS ISA bit in the MIPS gdbstub Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 59/77] gdbstub: Add XML support for GDB for nanoMIPS Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 60/77] target/mips: Add definition of nanoMIPS I7200 CPU Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 61/77] linux-user: Add syscall numbers for nanoMIPS Stefan Markovic
2018-08-06 13:45   ` Aleksandar Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 62/77] linux-user: Add target_signal.h header " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 63/77] linux-user: Add termbits.h " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 64/77] linux-user: Update syscall_defs.h " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 65/77] linux-user: Add target_fcntl.h " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 66/77] linux-user: Add sockbits.h " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 67/77] linux-user: Add target_syscall.h " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 68/77] linux-user: Add target_cpu.h " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 69/77] linux-user: Add target_structs.h " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 70/77] linux-user: Add target_elf.h " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 71/77] linux-user: Add signal.c " Stefan Markovic
2018-08-02 14:16 ` [Qemu-devel] [PATCH v6 72/77] linux-user: Add support for nanoMIPS signal trampoline Stefan Markovic
2018-08-02 14:17 ` [Qemu-devel] [PATCH v6 73/77] linux-user: Add cpu_loop.c for nanoMIPS Stefan Markovic
2018-08-02 14:17 ` [Qemu-devel] [PATCH v6 74/77] linux-user: Amend support for sigaction() syscall " Stefan Markovic
2018-08-02 14:17 ` [Qemu-devel] [PATCH v6 75/77] linux-user: Add support for statx() syscall for all platforms Stefan Markovic
2018-08-02 14:17 ` [Qemu-devel] [PATCH v6 76/77] linux-user: Add nanoMIPS linux user mode configuration support Stefan Markovic
2018-08-02 14:17 ` [Qemu-devel] [PATCH v6 77/77] linux-user: Add nanoMIPS support in scripts/qemu-binfmt-conf.sh Stefan Markovic
2018-08-02 19:47   ` Laurent Vivier
2018-08-03 11:23     ` Aleksandar Rikalo
2018-08-03 11:57       ` Laurent Vivier
2018-08-02 18:02 ` [Qemu-devel] [PATCH v6 00/77] Add nanoMIPS support to QEMU no-reply
2018-08-03 12:42   ` Stefan Markovic

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