From: "Singh, Brijesh" <brijesh.singh@amd.com>
To: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "Singh, Brijesh" <brijesh.singh@amd.com>,
Peter Xu <peterx@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>,
Eduardo Habkost <ehabkost@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
"Lendacky, Thomas" <Thomas.Lendacky@amd.com>,
"Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>
Subject: [Qemu-devel] [PATCH v5 4/9] x86_iommu/amd: make the address space naming consistent with intel-iommu
Date: Mon, 1 Oct 2018 19:44:34 +0000 [thread overview]
Message-ID: <1538423049-29524-5-git-send-email-brijesh.singh@amd.com> (raw)
In-Reply-To: <1538423049-29524-1-git-send-email-brijesh.singh@amd.com>
To be consistent with intel-iommu:
- rename the address space to use '_' instead of '-'
- update the memory region relationships
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Cc: Tom Lendacky <Thomas.Lendacky@amd.com>
Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
---
hw/i386/amd_iommu.c | 34 +++++++++++++++++++++++++++-------
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index 7206bb0..4bec1c6 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -55,6 +55,7 @@ struct AMDVIAddressSpace {
uint8_t bus_num; /* bus number */
uint8_t devfn; /* device function */
AMDVIState *iommu_state; /* AMDVI - one per machine */
+ MemoryRegion root; /* AMDVI Root memory map region */
IOMMUMemoryRegion iommu; /* Device's address translation region */
MemoryRegion iommu_ir; /* Device's interrupt remapping region */
AddressSpace as; /* device's corresponding address space */
@@ -1032,8 +1033,9 @@ static IOMMUTLBEntry amdvi_translate(IOMMUMemoryRegion *iommu, hwaddr addr,
static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
{
+ char name[128];
AMDVIState *s = opaque;
- AMDVIAddressSpace **iommu_as;
+ AMDVIAddressSpace **iommu_as, *amdvi_dev_as;
int bus_num = pci_bus_num(bus);
iommu_as = s->address_spaces[bus_num];
@@ -1046,19 +1048,37 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
/* set up AMD-Vi region */
if (!iommu_as[devfn]) {
+ snprintf(name, sizeof(name), "amd_iommu_devfn_%d", devfn);
+
iommu_as[devfn] = g_malloc0(sizeof(AMDVIAddressSpace));
iommu_as[devfn]->bus_num = (uint8_t)bus_num;
iommu_as[devfn]->devfn = (uint8_t)devfn;
iommu_as[devfn]->iommu_state = s;
- memory_region_init_iommu(&iommu_as[devfn]->iommu,
- sizeof(iommu_as[devfn]->iommu),
+ amdvi_dev_as = iommu_as[devfn];
+
+ /*
+ * Memory region relationships looks like (Address range shows
+ * only lower 32 bits to make it short in length...):
+ *
+ * |-----------------+-------------------+----------|
+ * | Name | Address range | Priority |
+ * |-----------------+-------------------+----------+
+ * | amdvi_root | 00000000-ffffffff | 0 |
+ * | amdvi_iommu | 00000000-ffffffff | 1 |
+ * |-----------------+-------------------+----------|
+ */
+ memory_region_init_iommu(&amdvi_dev_as->iommu,
+ sizeof(amdvi_dev_as->iommu),
TYPE_AMD_IOMMU_MEMORY_REGION,
OBJECT(s),
- "amd-iommu", UINT64_MAX);
- address_space_init(&iommu_as[devfn]->as,
- MEMORY_REGION(&iommu_as[devfn]->iommu),
- "amd-iommu");
+ "amd_iommu", UINT64_MAX);
+ memory_region_init(&amdvi_dev_as->root, OBJECT(s),
+ "amdvi_root", UINT64_MAX);
+ address_space_init(&amdvi_dev_as->as, &amdvi_dev_as->root, name);
+ memory_region_add_subregion_overlap(&amdvi_dev_as->root, 0,
+ MEMORY_REGION(&amdvi_dev_as->iommu),
+ 1);
}
return &iommu_as[devfn]->as;
}
--
2.7.4
next prev parent reply other threads:[~2018-10-01 19:44 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-01 19:44 [Qemu-devel] [PATCH v5 0/9] x86_iommu/amd: add interrupt remap support Singh, Brijesh
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 1/9] x86_iommu: move the kernel-irqchip check in common code Singh, Brijesh
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 2/9] x86_iommu: move vtd_generate_msi_message in common file Singh, Brijesh
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 3/9] x86_iommu/amd: remove V=1 check from amdvi_validate_dte() Singh, Brijesh
2018-10-01 19:44 ` Singh, Brijesh [this message]
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 5/9] x86_iommu/amd: Prepare for interrupt remap support Singh, Brijesh
2018-10-08 5:53 ` Peter Xu
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 6/9] x86_iommu/amd: Add interrupt remap support when VAPIC is not enabled Singh, Brijesh
2018-10-08 5:55 ` Peter Xu
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 7/9] i386: acpi: add IVHD device entry for IOAPIC Singh, Brijesh
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 9/9] x86_iommu/amd: Enable Guest virtual APIC support Singh, Brijesh
2018-10-19 14:05 ` [Qemu-devel] [PATCH v5 0/9] x86_iommu/amd: add interrupt remap support Singh, Brijesh
2018-10-19 16:28 ` Michael S. Tsirkin
2018-10-22 9:47 ` Peter Xu
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