From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 04/27] elf: Add Mips_elf_abiflags_v0 structure
Date: Wed, 17 Oct 2018 14:33:32 +0200 [thread overview]
Message-ID: <1539779635-15445-5-git-send-email-aleksandar.markovic@rt-rk.com> (raw)
In-Reply-To: <1539779635-15445-1-git-send-email-aleksandar.markovic@rt-rk.com>
From: Stefan Markovic <smarkovic@wavecomp.com>
Add Mips_elf_abiflags_v0 structure to elf.h. The source of information
is kernel header arch/mips/include/asm/elf.h.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
include/elf.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/include/elf.h b/include/elf.h
index eb5958d..911b95a 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -96,6 +96,22 @@ typedef int64_t Elf64_Sxword;
#define MIPS_ABI_FP_64 0x6 /* -mips32r2 -mfp64 */
#define MIPS_ABI_FP_64A 0x7 /* -mips32r2 -mfp64 -mno-odd-spreg */
+typedef struct mips_elf_abiflags_v0 {
+ uint16_t version; /* Version of flags structure */
+ uint8_t isa_level; /* The level of the ISA: 1-5, 32, 64 */
+ uint8_t isa_rev; /* The revision of ISA: */
+ /* - 0 for MIPS V and below, */
+ /* - 1-n otherwise. */
+ uint8_t gpr_size; /* The size of general purpose registers */
+ uint8_t cpr1_size; /* The size of co-processor 1 registers */
+ uint8_t cpr2_size; /* The size of co-processor 2 registers */
+ uint8_t fp_abi; /* The floating-point ABI */
+ uint32_t isa_ext; /* Mask of processor-specific extensions */
+ uint32_t ases; /* Mask of ASEs used */
+ uint32_t flags1; /* Mask of general flags */
+ uint32_t flags2;
+} Mips_elf_abiflags_v0;
+
/* These constants define the different elf file types */
#define ET_NONE 0
#define ET_REL 1
--
2.7.4
next prev parent reply other threads:[~2018-10-17 12:35 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-17 12:33 [Qemu-devel] [PULL 00/27]MIPS pull request for October 2018 - part 1 Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 01/27] mailmap: Add an item for Yongbok Kim Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 02/27] elf: Fix PT_MIPS_XXX constants Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 03/27] elf: Add MIPS_ABI_FP_XXX constants Aleksandar Markovic
2018-10-17 12:33 ` Aleksandar Markovic [this message]
2018-10-17 12:33 ` [Qemu-devel] [PULL 05/27] linux-user: Add MIPS-specific prctl() options Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 06/27] linux-user: Add infrastructure for handling MIPS-specific prctl() Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 07/27] target/mips: Add a comment with an overview of CP0 registers Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 08/27] target/mips: Add a comment before each CP0 register section in cpu.h Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 09/27] target/mips: Add basic description of MXU ASE Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 10/27] target/mips: Add assembler mnemonics list for " Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 11/27] target/mips: Add organizational chart of " Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 12/27] target/mips: Add opcode values " Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 13/27] target/mips: Increase 'supported ISAs/ASEs' flag holder size Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 14/27] target/mips: Reorganize bit definitions for insn_flags (ISAs/ASEs flags) Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 15/27] target/mips: Add bit definitions for DSP R3 ASE Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 16/27] target/mips: Add availability control " Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 17/27] target/mips: Improve DSP R2/R3-related naming Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 18/27] target/mips: Add CP0 Config2 to DisasContext Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 19/27] target/mips: Add CP0 PWBase register Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 20/27] target/mips: Add CP0 PWField register Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 21/27] target/mips: Add CP0 PWSize register Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 22/27] target/mips: Add CP0 PWCtl register Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 23/27] target/mips: Add reset state for PWSize and PWField registers Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 24/27] target/mips: Implement hardware page table walker for MIPS32 Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 25/27] target/mips: Fix emulation of microMIPS R6 <SELEQZ|SELNEZ>.<D|S> Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 26/27] target/mips: Fix misplaced 'break' in handling of NM_SHRA_R_PH Aleksandar Markovic
2018-10-17 12:33 ` [Qemu-devel] [PULL 27/27] target/mips: Add opcodes for nanoMIPS EVA instructions Aleksandar Markovic
2018-10-18 15:33 ` [Qemu-devel] [PULL 00/27]MIPS pull request for October 2018 - part 1 Peter Maydell
2018-10-18 15:50 ` [Qemu-devel] ?==?utf-8?q? [PULL?==?utf-8?q? " Aleksandar Markovic
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