From: Li Qiang <liq3ea@gmail.com>
To: keith.busch@intel.com, kwolf@redhat.com, mreitz@redhat.com
Cc: qemu-block@nongnu.org, qemu-devel@nongnu.org,
Li Qiang <liq3ea@gmail.com>
Subject: [Qemu-devel] [PATCH 4/4] nvme: use pci_dev directly in nvme_realize
Date: Mon, 29 Oct 2018 22:18:40 -0700 [thread overview]
Message-ID: <1540876720-9574-5-git-send-email-liq3ea@gmail.com> (raw)
In-Reply-To: <1540876720-9574-1-git-send-email-liq3ea@gmail.com>
There is no need to make another reference.
Signed-off-by: Li Qiang <liq3ea@gmail.com>
---
hw/block/nvme.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index a406c23..f63e344 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -1235,7 +1235,7 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp)
pci_conf[PCI_INTERRUPT_PIN] = 1;
pci_config_set_prog_interface(pci_dev->config, 0x2);
pci_config_set_class(pci_dev->config, PCI_CLASS_STORAGE_EXPRESS);
- pcie_endpoint_cap_init(&n->parent_obj, 0x80);
+ pcie_endpoint_cap_init(pci_dev, 0x80);
n->num_namespaces = 1;
n->reg_size = pow2ceil(0x1004 + 2 * (n->num_queues + 1) * 4);
@@ -1247,10 +1247,10 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp)
memory_region_init_io(&n->iomem, OBJECT(n), &nvme_mmio_ops, n,
"nvme", n->reg_size);
- pci_register_bar(&n->parent_obj, 0,
+ pci_register_bar(pci_dev, 0,
PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64,
&n->iomem);
- if (msix_init_exclusive_bar(&n->parent_obj, n->num_queues, 4, NULL)) {
+ if (msix_init_exclusive_bar(pci_dev, n->num_queues, 4, NULL)) {
error_setg(errp, "msix_init_exclusive_bar failed");
return;
}
@@ -1308,7 +1308,7 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp)
n->cmbuf = g_malloc0(NVME_CMBSZ_GETSIZE(n->bar.cmbsz));
memory_region_init_io(&n->ctrl_mem, OBJECT(n), &nvme_cmb_ops, n,
"nvme-cmb", NVME_CMBSZ_GETSIZE(n->bar.cmbsz));
- pci_register_bar(&n->parent_obj, NVME_CMBLOC_BIR(n->bar.cmbloc),
+ pci_register_bar(pci_dev, NVME_CMBLOC_BIR(n->bar.cmbloc),
PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64 |
PCI_BASE_ADDRESS_MEM_PREFETCH, &n->ctrl_mem);
--
1.8.3.1
next prev parent reply other threads:[~2018-10-30 5:19 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-30 5:18 [Qemu-devel] [PATCH 0/4] nvme: some small fixes Li Qiang
2018-10-30 5:18 ` [Qemu-devel] [PATCH 1/4] nvme: use TYPE_NVME instead of constant string Li Qiang
2019-01-09 14:39 ` Max Reitz
2018-10-30 5:18 ` [Qemu-devel] [PATCH 2/4] nvme: ensure the num_queues is not zero Li Qiang
2019-01-09 14:38 ` Max Reitz
2019-01-10 3:02 ` Li Qiang
2018-10-30 5:18 ` [Qemu-devel] [PATCH 3/4] nvme: check msix_init_exclusive_bar return value Li Qiang
2019-01-09 14:51 ` Max Reitz
2019-01-10 3:06 ` Li Qiang
2018-10-30 5:18 ` Li Qiang [this message]
2019-01-09 15:05 ` [Qemu-devel] [PATCH 4/4] nvme: use pci_dev directly in nvme_realize Max Reitz
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