From: Alex Williamson <alex.williamson@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Michael S. Tsirkin" <mst@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Geoffrey McRae <geoff@hostfission.com>,
Eric Auger <eric.auger@redhat.com>
Subject: [Qemu-devel] [PATCH v5 4/8] pcie: Add link speed and width fields to PCIESlot
Date: Wed, 12 Dec 2018 12:39:16 -0700 [thread overview]
Message-ID: <154464355634.9828.6782186303611760106.stgit@gimli.home> (raw)
In-Reply-To: <154464279386.9828.10219496338109023342.stgit@gimli.home>
Add fields allowing the PCIe link speed and width of a PCIESlot to
be configured, with an instance_post_init callback on the root port
parent class to set defaults. This allows child classes to set these
via properties or via their own instance_init callback, without
requiring all implementions to support arbitrary user selected values.
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Tested-by: Geoffrey McRae <geoff@hostfission.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
---
hw/pci-bridge/pcie_root_port.c | 14 ++++++++++++++
include/hw/pci/pcie_port.h | 4 ++++
2 files changed, 18 insertions(+)
diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c
index 45f9e8cd4a36..34ad76743c44 100644
--- a/hw/pci-bridge/pcie_root_port.c
+++ b/hw/pci-bridge/pcie_root_port.c
@@ -140,6 +140,19 @@ static Property rp_props[] = {
DEFINE_PROP_END_OF_LIST()
};
+static void rp_instance_post_init(Object *obj)
+{
+ PCIESlot *s = PCIE_SLOT(obj);
+
+ if (!s->speed) {
+ s->speed = QEMU_PCI_EXP_LNK_2_5GT;
+ }
+
+ if (!s->width) {
+ s->width = QEMU_PCI_EXP_LNK_X1;
+ }
+}
+
static void rp_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -157,6 +170,7 @@ static void rp_class_init(ObjectClass *klass, void *data)
static const TypeInfo rp_info = {
.name = TYPE_PCIE_ROOT_PORT,
.parent = TYPE_PCIE_SLOT,
+ .instance_post_init = rp_instance_post_init,
.class_init = rp_class_init,
.abstract = true,
.class_size = sizeof(PCIERootPortClass),
diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index 0736014bfdb4..df242a0cafff 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -49,6 +49,10 @@ struct PCIESlot {
/* pci express switch port with slot */
uint8_t chassis;
uint16_t slot;
+
+ PCIExpLinkSpeed speed;
+ PCIExpLinkWidth width;
+
QLIST_ENTRY(PCIESlot) next;
};
next prev parent reply other threads:[~2018-12-12 19:39 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-12 19:38 [Qemu-devel] [PATCH v5 0/8] pcie: Enhanced link speed and width support Alex Williamson
2018-12-12 19:38 ` [Qemu-devel] [PATCH v5 1/8] pcie: Create enums for link speed and width Alex Williamson
2018-12-12 19:38 ` [Qemu-devel] [PATCH v5 2/8] pci: Sync PCIe downstream port LNKSTA on read Alex Williamson
2018-12-12 19:39 ` [Qemu-devel] [PATCH v5 3/8] qapi: Define PCIe link speed and width properties Alex Williamson
2018-12-12 19:39 ` Alex Williamson [this message]
2018-12-12 19:39 ` [Qemu-devel] [PATCH v5 5/8] pcie: Fill PCIESlot link fields to support higher speeds and widths Alex Williamson
2018-12-12 19:39 ` [Qemu-devel] [PATCH v5 6/8] pcie: Allow generic PCIe root port to specify link speed and width Alex Williamson
2018-12-18 1:29 ` Michael S. Tsirkin
2018-12-18 1:44 ` Alex Williamson
2018-12-18 1:47 ` Michael S. Tsirkin
2018-12-18 1:54 ` Alex Williamson
2018-12-18 2:27 ` Michael S. Tsirkin
2018-12-12 19:39 ` [Qemu-devel] [PATCH v5 7/8] vfio/pci: Remove PCIe Link Status emulation Alex Williamson
2018-12-12 19:40 ` [Qemu-devel] [PATCH v5 8/8] pcie: Fast PCIe root ports for new machines Alex Williamson
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