qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Taylor Simpson <tsimpson@quicinc.com>, qemu-devel@nongnu.org
Cc: riku.voipio@iki.fi, richard.henderson@linaro.org,
	laurent@vivier.eu, aleksandar.m.mail@gmail.com
Subject: Re: [RFC PATCH 29/66] Hexagon opcode data structures
Date: Tue, 11 Feb 2020 08:40:51 +0100	[thread overview]
Message-ID: <154bb9da-0ee7-ac41-7a3e-3d0f9d5c0036@redhat.com> (raw)
In-Reply-To: <1581381644-13678-30-git-send-email-tsimpson@quicinc.com>

On 2/11/20 1:40 AM, Taylor Simpson wrote:
> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
> ---
>   target/hexagon/opcodes.c | 223 +++++++++++++++++++++++++++++++++++++++++++++++
>   target/hexagon/opcodes.h |  67 ++++++++++++++
>   2 files changed, 290 insertions(+)
>   create mode 100644 target/hexagon/opcodes.c
>   create mode 100644 target/hexagon/opcodes.h
> 
> diff --git a/target/hexagon/opcodes.c b/target/hexagon/opcodes.c
> new file mode 100644
> index 0000000..1c1b200
> --- /dev/null
> +++ b/target/hexagon/opcodes.c
> @@ -0,0 +1,223 @@
> +/*
> + *  Copyright (c) 2019 Qualcomm Innovation Center, Inc. All Rights Reserved.
> + *
> + *  This program is free software; you can redistribute it and/or modify
> + *  it under the terms of the GNU General Public License as published by
> + *  the Free Software Foundation; either version 2 of the License, or
> + *  (at your option) any later version.
> + *
> + *  This program is distributed in the hope that it will be useful,
> + *  but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *  GNU General Public License for more details.
> + *
> + *  You should have received a copy of the GNU General Public License
> + *  along with this program; if not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +/*
> + * opcodes.c
> + *
> + * data tables generated automatically
> + * Maybe some functions too
> + */
> +
> +#include <stdio.h>
> +#include <stdlib.h>
> +#include <strings.h>
> +#include <string.h>
> +#include <stdarg.h>
> +#include <ctype.h>

Previous includes not needed ("qemu/osdep.h" includes them for you).

> +#include "qemu/osdep.h"
> +#include "opcodes.h"
> +#include "decode.h"
> +
> +#define VEC_DESCR(A, B, C) DESCR(A, B, C)
> +#define DONAME(X) #X
> +
> +const char *opcode_names[] = {
> +#define OPCODE(IID) DONAME(IID)
> +#include "opcodes_def_generated.h"
> +    NULL
> +#undef OPCODE
> +};
> +
> +const char *opcode_reginfo[] = {
> +#define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2)    /* nothing */
> +#define REGINFO(TAG, REGINFO, RREGS, WREGS) REGINFO,
> +#include "op_regs_generated.h"
> +    NULL
> +#undef REGINFO
> +#undef IMMINFO
> +};
> +
> +
> +const char *opcode_rregs[] = {
> +#define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2)    /* nothing */
> +#define REGINFO(TAG, REGINFO, RREGS, WREGS) RREGS,
> +#include "op_regs_generated.h"
> +    NULL
> +#undef REGINFO
> +#undef IMMINFO
> +};
> +
> +
> +const char *opcode_wregs[] = {
> +#define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2)    /* nothing */
> +#define REGINFO(TAG, REGINFO, RREGS, WREGS) WREGS,
> +#include "op_regs_generated.h"
> +    NULL
> +#undef REGINFO
> +#undef IMMINFO
> +};
> +
> +const char *opcode_short_semantics[] = {
> +#define OPCODE(X)              NULL
> +#include "opcodes_def_generated.h"
> +#undef OPCODE
> +    NULL
> +};
> +
> +
> +size4u_t
> +    opcode_attribs[XX_LAST_OPCODE][(A_ZZ_LASTATTRIB / ATTRIB_WIDTH) + 1] = {0};
> +
> +static void init_attribs(int tag, ...)
> +{
> +    va_list ap;
> +    int attr;
> +    va_start(ap, tag);
> +    while ((attr = va_arg(ap, int)) != 0) {
> +        opcode_attribs[tag][attr / ATTRIB_WIDTH] |= 1 << (attr % ATTRIB_WIDTH);
> +    }
> +}
> +
> +static size4u_t str2val(const char *str)
> +{
> +    size4u_t ret = 0;
> +    for ( ; *str; str++) {
> +        switch (*str) {
> +        case ' ':
> +        case '\t':
> +            break;
> +        case 's':
> +        case 't':
> +        case 'u':
> +        case 'v':
> +        case 'w':
> +        case 'd':
> +        case 'e':
> +        case 'x':
> +        case 'y':
> +        case 'i':
> +        case 'I':
> +        case 'P':
> +        case 'E':
> +        case 'o':
> +        case '-':
> +        case '0':
> +            ret = (ret << 1) | 0;
> +            break;
> +        case '1':
> +            ret = (ret << 1) | 1;
> +            break;
> +        default:
> +            break;
> +        }
> +    }
> +    return ret;
> +}
> +
> +static size1u_t has_ee(const char *str)
> +{
> +    return (strchr(str, 'E') != NULL);
> +}
> +
> +opcode_encoding_t opcode_encodings[] = {
> +#define DEF_ENC32(OPCODE, ENCSTR) \
> +    [OPCODE] = { .encoding = ENCSTR },
> +
> +#define DEF_ENC_SUBINSN(OPCODE, CLASS, ENCSTR) \
> +    [OPCODE] = { .encoding = ENCSTR, .enc_class = CLASS },
> +
> +#define DEF_EXT_ENC(OPCODE, CLASS, ENCSTR) \
> +    [OPCODE] = { .encoding = ENCSTR, .enc_class = CLASS },
> +
> +#include "imported/encode.def"
> +
> +#undef DEF_ENC32
> +#undef DEF_ENC_SUBINSN
> +#undef DEF_EXT_ENC
> +};
> +
> +void opcode_init(void)
> +{
> +    init_attribs(0, 0);
> +
> +#define DEF_ENC32(OPCODE, ENCSTR) \
> +    opcode_encodings[OPCODE].vals = str2val(ENCSTR); \
> +    opcode_encodings[OPCODE].is_ee = has_ee(ENCSTR);
> +
> +#define DEF_ENC_SUBINSN(OPCODE, CLASS, ENCSTR) \
> +    opcode_encodings[OPCODE].vals = str2val(ENCSTR);
> +
> +#define LEGACY_DEF_ENC32(OPCODE, ENCSTR) \
> +    opcode_encodings[OPCODE].dep_vals = str2val(ENCSTR);
> +
> +#define DEF_EXT_ENC(OPCODE, CLASS, ENCSTR) \
> +    opcode_encodings[OPCODE].vals = str2val(ENCSTR);
> +
> +#include "imported/encode.def"
> +
> +#undef LEGACY_DEF_ENC32
> +#undef DEF_ENC32
> +#undef DEF_ENC_SUBINSN
> +#undef DEF_EXT_ENC
> +
> +#define ATTRIBS(...) , ## __VA_ARGS__, 0
> +#define OP_ATTRIB(TAG, ARGS) init_attribs(TAG ARGS);
> +#include "op_attribs_generated.h"
> +#undef OP_ATTRIB
> +#undef ATTRIBS
> +
> +    decode_init();
> +
> +#define DEF_QEMU(TAG, SHORTCODE, HELPER, GENFN, HELPFN) \
> +    opcode_short_semantics[TAG] = #SHORTCODE;
> +#include "qemu_def_generated.h"
> +#undef DEF_QEMU
> +}
> +
> +
> +#define NEEDLE "IMMEXT("
> +
> +int opcode_which_immediate_is_extended(opcode_t opcode)
> +{
> +    const char *p;
> +    if (opcode >= XX_LAST_OPCODE) {
> +        g_assert_not_reached();
> +        return 0;
> +    }
> +    if (!GET_ATTRIB(opcode, A_EXTENDABLE)) {
> +        g_assert_not_reached();
> +        return 0;
> +    }
> +    p = opcode_short_semantics[opcode];
> +    p = strstr(p, NEEDLE);
> +    if (p == NULL) {
> +        g_assert_not_reached();
> +        return 0;
> +    }
> +    p += strlen(NEEDLE);
> +    while (isspace(*p)) {
> +        p++;
> +    }
> +    /* lower is always imm 0, upper always imm 1. */
> +    if (islower(*p)) {
> +        return 0;
> +    } else if (isupper(*p)) {
> +        return 1;
> +    } else {
> +        g_assert_not_reached();
> +    }
> +}
> diff --git a/target/hexagon/opcodes.h b/target/hexagon/opcodes.h
> new file mode 100644
> index 0000000..ff90207
> --- /dev/null
> +++ b/target/hexagon/opcodes.h
> @@ -0,0 +1,67 @@
> +/*
> + *  Copyright (c) 2019 Qualcomm Innovation Center, Inc. All Rights Reserved.
> + *
> + *  This program is free software; you can redistribute it and/or modify
> + *  it under the terms of the GNU General Public License as published by
> + *  the Free Software Foundation; either version 2 of the License, or
> + *  (at your option) any later version.
> + *
> + *  This program is distributed in the hope that it will be useful,
> + *  but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *  GNU General Public License for more details.
> + *
> + *  You should have received a copy of the GNU General Public License
> + *  along with this program; if not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#ifndef OPCODES_H

HEXAGON_OPCODES_H

I wonder if it would ease review to split this patch in 2, keep the C 
here, but provide opcodes.h in an earlier patch.

> +#define OPCODES_H
> +
> +#include "hex_arch_types.h"
> +#include "attribs.h"
> +
> +typedef enum {
> +#define OPCODE(IID) IID
> +#include "opcodes_def_generated.h"
> +    XX_LAST_OPCODE
> +#undef OPCODE
> +} opcode_t;
> +
> +typedef enum {
> +    NORMAL,
> +    HALF,
> +    SUBINSN_A,
> +    SUBINSN_L1,
> +    SUBINSN_L2,
> +    SUBINSN_S1,
> +    SUBINSN_S2,
> +    EXT_noext,
> +    EXT_mmvec,
> +    XX_LAST_ENC_CLASS
> +} enc_class_t;
> +
> +extern const char *opcode_names[];
> +
> +extern const char *opcode_reginfo[];
> +extern const char *opcode_rregs[];
> +extern const char *opcode_wregs[];
> +
> +typedef struct {
> +    const char * const encoding;
> +    size4u_t vals;
> +    size4u_t dep_vals;
> +    const enc_class_t enc_class;
> +    size1u_t is_ee:1;
> +} opcode_encoding_t;
> +
> +extern opcode_encoding_t opcode_encodings[XX_LAST_OPCODE];
> +
> +extern size4u_t
> +    opcode_attribs[XX_LAST_OPCODE][(A_ZZ_LASTATTRIB / ATTRIB_WIDTH) + 1];
> +
> +extern void opcode_init(void);
> +
> +extern int opcode_which_immediate_is_extended(opcode_t opcode);
> +
> +#endif
> 



  reply	other threads:[~2020-02-11  7:41 UTC|newest]

Thread overview: 94+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-11  0:39 [RFC PATCH 00/66] Hexagon patch series Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 01/66] Hexagon Maintainers Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 02/66] Hexagon ELF Machine Definition Taylor Simpson
2020-02-11  7:16   ` Philippe Mathieu-Daudé
2020-02-11  0:39 ` [RFC PATCH 03/66] Hexagon CPU Scalar Core Definition Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 04/66] Hexagon register names Taylor Simpson
2020-02-11  7:18   ` Philippe Mathieu-Daudé
2020-02-11  0:39 ` [RFC PATCH 05/66] Hexagon Disassembler Taylor Simpson
2020-02-11  7:20   ` Philippe Mathieu-Daudé
2020-02-11  0:39 ` [RFC PATCH 06/66] Hexagon CPU Scalar Core Helpers Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 07/66] Hexagon GDB Stub Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 08/66] Hexagon instruction and packet types Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 09/66] Hexagon architecture types Taylor Simpson
2020-02-11  7:23   ` Philippe Mathieu-Daudé
2020-02-11  0:39 ` [RFC PATCH 10/66] Hexagon register fields Taylor Simpson
2020-02-11 15:29   ` Philippe Mathieu-Daudé
2020-02-11  0:39 ` [RFC PATCH 11/66] Hexagon instruction attributes Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 12/66] Hexagon register map Taylor Simpson
2020-02-11  7:26   ` Philippe Mathieu-Daudé
2020-02-11  0:39 ` [RFC PATCH 13/66] Hexagon instruction/packet decode Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 14/66] Hexagon instruction printing Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 15/66] Hexagon arch import - instruction semantics definitions Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 16/66] Hexagon arch import - macro definitions Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 17/66] Hexagon arch import - instruction encoding Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 18/66] Hexagon instruction class definitions Taylor Simpson
2020-02-11  0:39 ` [RFC PATCH 19/66] Hexagon instruction utility functions Taylor Simpson
2020-02-11  7:29   ` Philippe Mathieu-Daudé
2020-02-11  0:39 ` [RFC PATCH 20/66] Hexagon generator phase 1 - C preprocessor for semantics Taylor Simpson
2020-02-11  7:30   ` Philippe Mathieu-Daudé
2020-02-11  0:39 ` [RFC PATCH 21/66] Hexagon generator phase 2 - qemu_def_generated.h Taylor Simpson
2020-02-11  7:33   ` Philippe Mathieu-Daudé
2020-02-11  0:40 ` [RFC PATCH 22/66] Hexagon generator phase 2 - qemu_wrap_generated.h Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 23/66] Hexagon generator phase 2 - opcodes_def_generated.h Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 24/66] Hexagon generator phase 2 - op_attribs_generated.h Taylor Simpson
2020-02-11  8:01   ` Philippe Mathieu-Daudé
2020-02-11  0:40 ` [RFC PATCH 25/66] Hexagon generator phase 2 - op_regs_generated.h Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 26/66] Hexagon generator phase 2 - printinsn-generated.h Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 27/66] Hexagon generator phase 3 - C preprocessor for decode tree Taylor Simpson
2020-02-11  7:35   ` Philippe Mathieu-Daudé
2020-02-11  0:40 ` [RFC PATCH 28/66] Hexagon generater phase 4 - Decode tree Taylor Simpson
2020-02-11  7:37   ` Philippe Mathieu-Daudé
2020-02-11  8:03     ` Philippe Mathieu-Daudé
2020-02-11  0:40 ` [RFC PATCH 29/66] Hexagon opcode data structures Taylor Simpson
2020-02-11  7:40   ` Philippe Mathieu-Daudé [this message]
2020-02-12 17:36     ` Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 30/66] Hexagon macros to interface with the generator Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 31/66] Hexagon macros referenced in instruction semantics Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 32/66] Hexagon instruction classes Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 33/66] Hexagon TCG generation helpers - step 1 Taylor Simpson
2020-02-11 15:22   ` Philippe Mathieu-Daudé
2020-02-11  0:40 ` [RFC PATCH 34/66] Hexagon TCG generation helpers - step 2 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 35/66] Hexagon TCG generation helpers - step 3 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 36/66] Hexagon TCG generation helpers - step 4 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 37/66] Hexagon TCG generation helpers - step 5 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 38/66] Hexagon TCG generation - step 01 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 39/66] Hexagon TCG generation - step 02 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 40/66] Hexagon TCG generation - step 03 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 41/66] Hexagon TCG generation - step 04 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 42/66] Hexagon TCG generation - step 05 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 43/66] Hexagon TCG generation - step 06 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 44/66] Hexagon TCG generation - step 07 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 45/66] Hexagon TCG generation - step 08 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 46/66] Hexagon TCG generation - step 09 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 47/66] Hexagon TCG generation - step 10 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 48/66] Hexagon TCG generation - step 11 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 49/66] Hexagon TCG generation - step 12 Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 50/66] Hexagon translation Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 51/66] Hexagon Linux user emulation Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 52/66] Hexagon build infrastructure Taylor Simpson
2020-02-11  7:15   ` Philippe Mathieu-Daudé
2020-02-11  0:40 ` [RFC PATCH 53/66] Hexagon - Add Hexagon Vector eXtensions (HVX) to core definition Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 54/66] Hexagon HVX support in gdbstub Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 55/66] Hexagon HVX import instruction encodings Taylor Simpson
2020-02-11  7:02   ` Philippe Mathieu-Daudé
2020-02-11 14:35     ` Taylor Simpson
2020-02-11 14:40       ` Philippe Mathieu-Daudé
2020-02-11 14:43         ` Philippe Mathieu-Daudé
2020-02-11  0:40 ` [RFC PATCH 56/66] Hexagon HVX import semantics Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 57/66] Hexagon HVX import macro definitions Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 58/66] Hexagon HVX semantics generator Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 59/66] Hexagon HVX instruction decoding Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 60/66] Hexagon HVX instruction utility functions Taylor Simpson
2020-02-11  7:46   ` Philippe Mathieu-Daudé
2020-02-11  0:40 ` [RFC PATCH 61/66] Hexagon HVX macros to interface with the generator Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 62/66] Hexagon HVX macros referenced in instruction semantics Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 63/66] Hexagon HVX helper to commit vector stores (masked and scatter/gather) Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 64/66] Hexagon HVX TCG generation Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 65/66] Hexagon HVX translation Taylor Simpson
2020-02-11  0:40 ` [RFC PATCH 66/66] Hexagon HVX build infrastructure Taylor Simpson
2020-02-11  1:31 ` [RFC PATCH 00/66] Hexagon patch series no-reply
2020-02-11  7:49   ` Philippe Mathieu-Daudé
2020-02-11  7:53 ` Philippe Mathieu-Daudé
2020-02-11 15:32 ` Philippe Mathieu-Daudé
2020-02-26 16:13   ` Taylor Simpson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=154bb9da-0ee7-ac41-7a3e-3d0f9d5c0036@redhat.com \
    --to=philmd@redhat.com \
    --cc=aleksandar.m.mail@gmail.com \
    --cc=laurent@vivier.eu \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=riku.voipio@iki.fi \
    --cc=tsimpson@quicinc.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).