* [Qemu-devel] [PATCH v4 0/2] arm/acpi: simplify aml code and enable SHPC @ 2019-03-06 13:36 Heyi Guo 2019-03-06 13:36 ` [Qemu-devel] [PATCH v4 1/2] hw/arm/acpi: simplify AML bit and/or statement Heyi Guo ` (2 more replies) 0 siblings, 3 replies; 7+ messages in thread From: Heyi Guo @ 2019-03-06 13:36 UTC (permalink / raw) To: qemu-arm, qemu-devel Cc: wanghaibin.wang, Heyi Guo, Shannon Zhao, Peter Maydell, Michael S. Tsirkin, Igor Mammedov After the introduction of generic PCIe root port and PCIe-PCI bridge, we will also have SHPC controller on ARM, and we don't support ACPI hot plug, so just enable SHPC native hot plug. Igor also spotted the store operation outside of bit and/or is not necessary, so simply the code at first. v4: - Improve the code indention. Cc: Shannon Zhao <shannon.zhaosl@gmail.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Heyi Guo (2): hw/arm/acpi: simplify AML bit and/or statement hw/arm/acpi: enable SHPC native hot plug hw/arm/virt-acpi-build.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) -- 1.8.3.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [Qemu-devel] [PATCH v4 1/2] hw/arm/acpi: simplify AML bit and/or statement 2019-03-06 13:36 [Qemu-devel] [PATCH v4 0/2] arm/acpi: simplify aml code and enable SHPC Heyi Guo @ 2019-03-06 13:36 ` Heyi Guo 2019-03-06 16:34 ` Igor Mammedov 2019-03-06 13:36 ` [Qemu-devel] [PATCH v4 2/2] hw/arm/acpi: enable SHPC native hot plug Heyi Guo 2019-03-06 16:37 ` [Qemu-devel] [PATCH v4 0/2] arm/acpi: simplify aml code and enable SHPC Igor Mammedov 2 siblings, 1 reply; 7+ messages in thread From: Heyi Guo @ 2019-03-06 13:36 UTC (permalink / raw) To: qemu-arm, qemu-devel Cc: wanghaibin.wang, Heyi Guo, Shannon Zhao, Peter Maydell, Michael S. Tsirkin, Igor Mammedov The last argument of AML bit and/or statement is the target variable, so we don't need to use a NULL target and then an additional store operation; a single bit and/or statement is enough. Cc: Shannon Zhao <shannon.zhaosl@gmail.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Suggested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Heyi Guo <guoheyi@huawei.com> --- hw/arm/virt-acpi-build.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index d7e2e48..cebec4c 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -265,17 +265,17 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP"))); aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL), - aml_name("CTRL"))); + aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1D), + aml_name("CTRL"))); ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1)))); - aml_append(ifctx1, aml_store(aml_or(aml_name("CDW1"), aml_int(0x08), NULL), - aml_name("CDW1"))); + aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08), + aml_name("CDW1"))); aml_append(ifctx, ifctx1); ifctx1 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL")))); - aml_append(ifctx1, aml_store(aml_or(aml_name("CDW1"), aml_int(0x10), NULL), - aml_name("CDW1"))); + aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10), + aml_name("CDW1"))); aml_append(ifctx, ifctx1); aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3"))); @@ -283,8 +283,8 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, aml_append(method, ifctx); elsectx = aml_else(); - aml_append(elsectx, aml_store(aml_or(aml_name("CDW1"), aml_int(4), NULL), - aml_name("CDW1"))); + aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4), + aml_name("CDW1"))); aml_append(elsectx, aml_return(aml_arg(3))); aml_append(method, elsectx); aml_append(dev, method); -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH v4 1/2] hw/arm/acpi: simplify AML bit and/or statement 2019-03-06 13:36 ` [Qemu-devel] [PATCH v4 1/2] hw/arm/acpi: simplify AML bit and/or statement Heyi Guo @ 2019-03-06 16:34 ` Igor Mammedov 2019-03-09 2:33 ` Heyi Guo 0 siblings, 1 reply; 7+ messages in thread From: Igor Mammedov @ 2019-03-06 16:34 UTC (permalink / raw) To: Heyi Guo Cc: qemu-arm, qemu-devel, Peter Maydell, Michael S. Tsirkin, Shannon Zhao, wanghaibin.wang On Wed, 6 Mar 2019 21:36:56 +0800 Heyi Guo <guoheyi@huawei.com> wrote: > The last argument of AML bit and/or statement is the target variable, > so we don't need to use a NULL target and then an additional store > operation; a single bit and/or statement is enough. s: a single bit and/or : using just aml_and() or aml_and() " With commit message fixed up: Reviewed-by: Igor Mammedov <imammedo@redhat.com> > > Cc: Shannon Zhao <shannon.zhaosl@gmail.com> > Cc: Peter Maydell <peter.maydell@linaro.org> > Cc: "Michael S. Tsirkin" <mst@redhat.com> > Cc: Igor Mammedov <imammedo@redhat.com> > Suggested-by: Igor Mammedov <imammedo@redhat.com> > Signed-off-by: Heyi Guo <guoheyi@huawei.com> > --- > hw/arm/virt-acpi-build.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c > index d7e2e48..cebec4c 100644 > --- a/hw/arm/virt-acpi-build.c > +++ b/hw/arm/virt-acpi-build.c > @@ -265,17 +265,17 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP"))); > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); > - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL), > - aml_name("CTRL"))); > + aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1D), > + aml_name("CTRL"))); > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1)))); > - aml_append(ifctx1, aml_store(aml_or(aml_name("CDW1"), aml_int(0x08), NULL), > - aml_name("CDW1"))); > + aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08), > + aml_name("CDW1"))); > aml_append(ifctx, ifctx1); > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL")))); > - aml_append(ifctx1, aml_store(aml_or(aml_name("CDW1"), aml_int(0x10), NULL), > - aml_name("CDW1"))); > + aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10), > + aml_name("CDW1"))); > aml_append(ifctx, ifctx1); > > aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3"))); > @@ -283,8 +283,8 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, > aml_append(method, ifctx); > > elsectx = aml_else(); > - aml_append(elsectx, aml_store(aml_or(aml_name("CDW1"), aml_int(4), NULL), > - aml_name("CDW1"))); > + aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4), > + aml_name("CDW1"))); > aml_append(elsectx, aml_return(aml_arg(3))); > aml_append(method, elsectx); > aml_append(dev, method); ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH v4 1/2] hw/arm/acpi: simplify AML bit and/or statement 2019-03-06 16:34 ` Igor Mammedov @ 2019-03-09 2:33 ` Heyi Guo 0 siblings, 0 replies; 7+ messages in thread From: Heyi Guo @ 2019-03-09 2:33 UTC (permalink / raw) To: Igor Mammedov Cc: qemu-arm, qemu-devel, Peter Maydell, Michael S. Tsirkin, Shannon Zhao, wanghaibin.wang On 2019/3/7 0:34, Igor Mammedov wrote: > On Wed, 6 Mar 2019 21:36:56 +0800 > Heyi Guo <guoheyi@huawei.com> wrote: > >> The last argument of AML bit and/or statement is the target variable, >> so we don't need to use a NULL target and then an additional store >> operation; a single bit and/or statement is enough. > s: a single bit and/or : using just aml_and() or aml_and() " > > With commit message fixed up: > > Reviewed-by: Igor Mammedov <imammedo@redhat.com> Thanks; have fixed it in v5. Heyi > >> Cc: Shannon Zhao <shannon.zhaosl@gmail.com> >> Cc: Peter Maydell <peter.maydell@linaro.org> >> Cc: "Michael S. Tsirkin" <mst@redhat.com> >> Cc: Igor Mammedov <imammedo@redhat.com> >> Suggested-by: Igor Mammedov <imammedo@redhat.com> >> Signed-off-by: Heyi Guo <guoheyi@huawei.com> >> --- >> hw/arm/virt-acpi-build.c | 16 ++++++++-------- >> 1 file changed, 8 insertions(+), 8 deletions(-) >> >> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c >> index d7e2e48..cebec4c 100644 >> --- a/hw/arm/virt-acpi-build.c >> +++ b/hw/arm/virt-acpi-build.c >> @@ -265,17 +265,17 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, >> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); >> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP"))); >> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); >> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL), >> - aml_name("CTRL"))); >> + aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1D), >> + aml_name("CTRL"))); >> >> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1)))); >> - aml_append(ifctx1, aml_store(aml_or(aml_name("CDW1"), aml_int(0x08), NULL), >> - aml_name("CDW1"))); >> + aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08), >> + aml_name("CDW1"))); >> aml_append(ifctx, ifctx1); >> >> ifctx1 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL")))); >> - aml_append(ifctx1, aml_store(aml_or(aml_name("CDW1"), aml_int(0x10), NULL), >> - aml_name("CDW1"))); >> + aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10), >> + aml_name("CDW1"))); >> aml_append(ifctx, ifctx1); >> >> aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3"))); >> @@ -283,8 +283,8 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, >> aml_append(method, ifctx); >> >> elsectx = aml_else(); >> - aml_append(elsectx, aml_store(aml_or(aml_name("CDW1"), aml_int(4), NULL), >> - aml_name("CDW1"))); >> + aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4), >> + aml_name("CDW1"))); >> aml_append(elsectx, aml_return(aml_arg(3))); >> aml_append(method, elsectx); >> aml_append(dev, method); > > . > ^ permalink raw reply [flat|nested] 7+ messages in thread
* [Qemu-devel] [PATCH v4 2/2] hw/arm/acpi: enable SHPC native hot plug 2019-03-06 13:36 [Qemu-devel] [PATCH v4 0/2] arm/acpi: simplify aml code and enable SHPC Heyi Guo 2019-03-06 13:36 ` [Qemu-devel] [PATCH v4 1/2] hw/arm/acpi: simplify AML bit and/or statement Heyi Guo @ 2019-03-06 13:36 ` Heyi Guo 2019-03-06 16:35 ` Igor Mammedov 2019-03-06 16:37 ` [Qemu-devel] [PATCH v4 0/2] arm/acpi: simplify aml code and enable SHPC Igor Mammedov 2 siblings, 1 reply; 7+ messages in thread From: Heyi Guo @ 2019-03-06 13:36 UTC (permalink / raw) To: qemu-arm, qemu-devel Cc: wanghaibin.wang, Heyi Guo, Shannon Zhao, Peter Maydell, Michael S. Tsirkin, Igor Mammedov After the introduction of generic PCIe root port and PCIe-PCI bridge, we will also have SHPC controller on ARM, so just enable SHPC native hot plug. Cc: Shannon Zhao <shannon.zhaosl@gmail.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Heyi Guo <guoheyi@huawei.com> --- hw/arm/virt-acpi-build.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index cebec4c..b6fef28 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP"))); aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); - aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1D), + + /* + * Allow OS control for all 5 features: + * PCIeHotplug SHPCHotplug PME AER PCIeCapability. + */ + aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F), aml_name("CTRL"))); ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1)))); -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH v4 2/2] hw/arm/acpi: enable SHPC native hot plug 2019-03-06 13:36 ` [Qemu-devel] [PATCH v4 2/2] hw/arm/acpi: enable SHPC native hot plug Heyi Guo @ 2019-03-06 16:35 ` Igor Mammedov 0 siblings, 0 replies; 7+ messages in thread From: Igor Mammedov @ 2019-03-06 16:35 UTC (permalink / raw) To: Heyi Guo Cc: qemu-arm, qemu-devel, wanghaibin.wang, Shannon Zhao, Peter Maydell, Michael S. Tsirkin On Wed, 6 Mar 2019 21:36:57 +0800 Heyi Guo <guoheyi@huawei.com> wrote: > After the introduction of generic PCIe root port and PCIe-PCI bridge, > we will also have SHPC controller on ARM, so just enable SHPC native > hot plug. > > Cc: Shannon Zhao <shannon.zhaosl@gmail.com> > Cc: Peter Maydell <peter.maydell@linaro.org> > Cc: "Michael S. Tsirkin" <mst@redhat.com> > Cc: Igor Mammedov <imammedo@redhat.com> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com> > Signed-off-by: Heyi Guo <guoheyi@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> > --- > hw/arm/virt-acpi-build.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c > index cebec4c..b6fef28 100644 > --- a/hw/arm/virt-acpi-build.c > +++ b/hw/arm/virt-acpi-build.c > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP"))); > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); > - aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1D), > + > + /* > + * Allow OS control for all 5 features: > + * PCIeHotplug SHPCHotplug PME AER PCIeCapability. > + */ > + aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F), > aml_name("CTRL"))); > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1)))); ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH v4 0/2] arm/acpi: simplify aml code and enable SHPC 2019-03-06 13:36 [Qemu-devel] [PATCH v4 0/2] arm/acpi: simplify aml code and enable SHPC Heyi Guo 2019-03-06 13:36 ` [Qemu-devel] [PATCH v4 1/2] hw/arm/acpi: simplify AML bit and/or statement Heyi Guo 2019-03-06 13:36 ` [Qemu-devel] [PATCH v4 2/2] hw/arm/acpi: enable SHPC native hot plug Heyi Guo @ 2019-03-06 16:37 ` Igor Mammedov 2 siblings, 0 replies; 7+ messages in thread From: Igor Mammedov @ 2019-03-06 16:37 UTC (permalink / raw) To: qemu-devel On Wed, 6 Mar 2019 21:36:55 +0800 Heyi Guo <guoheyi@huawei.com> wrote: > After the introduction of generic PCIe root port and PCIe-PCI bridge, we will > also have SHPC controller on ARM, and we don't support ACPI hot plug, so just > enable SHPC native hot plug. > > Igor also spotted the store operation outside of bit and/or is not necessary, so > simply the code at first. Since it's pretty close to soft-freeze ping Peter in 1-2 days, otherwise patches might miss 4.0 release. > > v4: > - Improve the code indention. > > Cc: Shannon Zhao <shannon.zhaosl@gmail.com> > Cc: Peter Maydell <peter.maydell@linaro.org> > Cc: "Michael S. Tsirkin" <mst@redhat.com> > Cc: Igor Mammedov <imammedo@redhat.com> > > Heyi Guo (2): > hw/arm/acpi: simplify AML bit and/or statement > hw/arm/acpi: enable SHPC native hot plug > > hw/arm/virt-acpi-build.c | 21 +++++++++++++-------- > 1 file changed, 13 insertions(+), 8 deletions(-) > ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-03-09 2:34 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-03-06 13:36 [Qemu-devel] [PATCH v4 0/2] arm/acpi: simplify aml code and enable SHPC Heyi Guo 2019-03-06 13:36 ` [Qemu-devel] [PATCH v4 1/2] hw/arm/acpi: simplify AML bit and/or statement Heyi Guo 2019-03-06 16:34 ` Igor Mammedov 2019-03-09 2:33 ` Heyi Guo 2019-03-06 13:36 ` [Qemu-devel] [PATCH v4 2/2] hw/arm/acpi: enable SHPC native hot plug Heyi Guo 2019-03-06 16:35 ` Igor Mammedov 2019-03-06 16:37 ` [Qemu-devel] [PATCH v4 0/2] arm/acpi: simplify aml code and enable SHPC Igor Mammedov
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