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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id t6sm10940776pgu.23.2019.08.26.16.47.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 26 Aug 2019 16:47:16 -0700 (PDT) To: Peter Maydell References: <20190819213755.26175-1-richard.henderson@linaro.org> <20190819213755.26175-63-richard.henderson@linaro.org> From: Richard Henderson Openpgp: preference=signencrypt Message-ID: <155ee312-cb2e-3fba-6277-c00d35c5ea94@linaro.org> Date: Mon, 26 Aug 2019 16:47:13 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::444 Subject: Re: [Qemu-devel] [PATCH v2 62/68] target/arm: Convert T16, Miscellaneous 16-bit instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm , QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/26/19 1:38 PM, Peter Maydell wrote: >> + IT 1011 1111 ... imm:5 &ci cond=%it_cond > > This is correct (same behaviour as the old decoder, but > it looks a bit odd here because it's not the same as > the fields defined by the architecture (in particular the > 'cond' field is not the same set of bits as the 'firstcond' > field). We could maybe comment it: > > # Bits 7:0 in IT are architecturally simply the > # new PSTATE.IT bits (despite the instruction description > # splitting them into 'firstcond' and 'mask' fields). > # In QEMU during translation we track the IT bits using > # the DisasContext fields condexec_cond and condexec_mask, > # so here we massage the bits from the insn into the form > # that that optimization requires. > > (Or equivalently we could just pass a single 8 bit immediate > to the trans_IT function and split it out there, I dunno.) I think I'll just go with this latter and do everything in trans_IT. >> +%imm6_9_3 9:1 3:5 !function=times_2 > > Would it be worth adding support to the decodetree script > for letting you specify fixed bits in this kind of field-decode, > so we could write '9:1 3:5 0' rather than having to specify > a multiply-by-2 function to put the 0 bit in ? Or is it > not likely to be common enough to be worth bothering with? > (Not something for this series, anyway.) I hadn't thought about that. Adding 1, 2, or -1 also appears, but that's 3 of the 60 instances currently in the tree whereas shifts make up 33 of 60. r~