From: <tony.nguyen@bt.com>
To: <qemu-devel@nongnu.org>
Cc: peter.maydell@linaro.org, walling@linux.ibm.com, mst@redhat.com,
palmer@sifive.com, mark.cave-ayland@ilande.co.uk,
Alistair.Francis@wdc.com, arikalo@wavecomp.com, david@redhat.com,
pasic@linux.ibm.com, borntraeger@de.ibm.com, rth@twiddle.net,
atar4qemu@gmail.com, ehabkost@redhat.com, sw@weilnetz.de,
qemu-s390x@nongnu.org, qemu-arm@nongnu.org,
david@gibson.dropbear.id.au, qemu-riscv@nongnu.org,
cohuck@redhat.com, claudio.fontana@huawei.com,
alex.williamson@redhat.com, qemu-ppc@nongnu.org,
amarkovic@wavecomp.com, pbonzini@redhat.com,
aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH v2 07/20] memory: Access MemoryRegion with MemOp
Date: Mon, 22 Jul 2019 15:45:09 +0000 [thread overview]
Message-ID: <1563810308843.1378@bt.com> (raw)
In-Reply-To: <e9c6e5310b1a4863be45d45bf087fc3d@tpw09926dag18e.domain1.systemhost.net>
Replacing size with size+sign+endianness (MemOp) will enable us to
collapse the two byte swaps, adjust_endianness and handle_bswap, along
the I/O path.
While interfaces are converted, callers will have existing unsigned
size coerced into a MemOp, and the callee will use this MemOp as an
unsigned size.
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
---
include/exec/memop.h | 4 ++++
include/exec/memory.h | 9 +++++----
memory.c | 7 +++++--
3 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/include/exec/memop.h b/include/exec/memop.h
index 43e99d7..73f1bf7 100644
--- a/include/exec/memop.h
+++ b/include/exec/memop.h
@@ -24,4 +24,8 @@ typedef enum MemOp {
MO_BSWAP = 8, /* Host reverse endian. */
} MemOp;
+/* No-op while memory_region_dispatch_[read|write] is converted to MemOp */
+#define MEMOP_SIZE(op) (op) /* MemOp to size. */
+#define SIZE_MEMOP(ul) (ul) /* Size to MemOp. */
+
#endif
diff --git a/include/exec/memory.h b/include/exec/memory.h
index bb0961d..30b1c58 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -19,6 +19,7 @@
#include "exec/cpu-common.h"
#include "exec/hwaddr.h"
#include "exec/memattrs.h"
+#include "exec/memop.h"
#include "exec/ramlist.h"
#include "qemu/queue.h"
#include "qemu/int128.h"
@@ -1731,13 +1732,13 @@ void mtree_info(bool flatview, bool dispatch_tree, bool owner);
* @mr: #MemoryRegion to access
* @addr: address within that region
* @pval: pointer to uint64_t which the data is written to
- * @size: size of the access in bytes
+ * @op: encodes size of the access in bytes
* @attrs: memory transaction attributes to use for the access
*/
MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
hwaddr addr,
uint64_t *pval,
- unsigned size,
+ MemOp op,
MemTxAttrs attrs);
/**
* memory_region_dispatch_write: perform a write directly to the specified
@@ -1746,13 +1747,13 @@ MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
* @mr: #MemoryRegion to access
* @addr: address within that region
* @data: data to write
- * @size: size of the access in bytes
+ * @op: encodes size of the access in bytes
* @attrs: memory transaction attributes to use for the access
*/
MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
hwaddr addr,
uint64_t data,
- unsigned size,
+ MemOp op,
MemTxAttrs attrs);
/**
diff --git a/memory.c b/memory.c
index d4579bb..73cb345 100644
--- a/memory.c
+++ b/memory.c
@@ -1437,10 +1437,11 @@ static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
hwaddr addr,
uint64_t *pval,
- unsigned size,
+ MemOp op,
MemTxAttrs attrs)
{
MemTxResult r;
+ unsigned size = MEMOP_SIZE(op);
if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
*pval = unassigned_mem_read(mr, addr, size);
@@ -1481,9 +1482,11 @@ static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
hwaddr addr,
uint64_t data,
- unsigned size,
+ MemOp op,
MemTxAttrs attrs)
{
+ unsigned size = MEMOP_SIZE(op);
+
if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
unassigned_mem_write(mr, addr, data, size);
return MEMTX_DECODE_ERROR;
--
1.8.3.1
next prev parent reply other threads:[~2019-07-22 15:45 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-22 15:34 [Qemu-devel] [PATCH v2 00/20] Invert Endian bit in SPARCv9 MMU TTE tony.nguyen
2019-07-22 15:38 ` [Qemu-devel] [PATCH v2 01/20] tcg: Replace MO_8 with MO_UB alias tony.nguyen
2019-07-23 8:04 ` [Qemu-devel] [qemu-s390x] " David Hildenbrand
2019-07-22 15:39 ` [Qemu-devel] [PATCH v2 02/20] tcg: Replace MO_16 with MO_UW alias tony.nguyen
2019-07-22 15:40 ` tony.nguyen
2019-07-22 15:41 ` [Qemu-devel] [PATCH v2 03/20] tcg: Replace MO_32 with MO_UL alias tony.nguyen
2019-07-22 15:42 ` [Qemu-devel] [PATCH v2 04/20] tcg: Replace MO_64 with MO_UQ alias tony.nguyen
2019-07-22 15:43 ` [Qemu-devel] [PATCH v2 05/20] tcg: Move size+sign+endian from TCGMemOp to MemOp tony.nguyen
2019-07-22 15:44 ` [Qemu-devel] [PATCH v2 06/20] tcg: Rename get_memop to get_tcgmemop tony.nguyen
2019-07-22 15:45 ` tony.nguyen [this message]
2019-07-22 15:45 ` [Qemu-devel] [PATCH v2 08/20] target/mips: Access MemoryRegion with MemOp tony.nguyen
2019-07-22 15:46 ` [Qemu-devel] [PATCH v2 09/20] hw/s390x: " tony.nguyen
2019-07-22 15:47 ` [Qemu-devel] [PATCH v2 10/20] hw/intc/armv7m_nic: " tony.nguyen
2019-07-22 15:48 ` [Qemu-devel] [PATCH v2 11/20] hw/virtio: " tony.nguyen
2019-07-22 15:48 ` [Qemu-devel] [PATCH v2 12/20] hw/vfio: " tony.nguyen
2019-07-22 15:49 ` [Qemu-devel] [PATCH v2 13/20] exec: " tony.nguyen
2019-07-22 15:50 ` [Qemu-devel] [PATCH v2 14/20] cputlb: " tony.nguyen
2019-07-22 15:50 ` [Qemu-devel] [PATCH v2 15/20] memory: Access MemoryRegion with MemOp semantics tony.nguyen
2019-07-22 15:51 ` [Qemu-devel] [PATCH v2 16/20] memory: Single byte swap along the I/O path tony.nguyen
2019-07-22 15:51 ` [Qemu-devel] [PATCH v2 17/20] cpu: TLB_FLAGS_MASK bit to force memory slow path tony.nguyen
2019-07-25 7:01 ` [Qemu-devel] [PATCH v3 00/15] Invert Endian bit in SPARCv9 MMU TTE tony.nguyen
2019-07-25 7:03 ` [Qemu-devel] [PATCH v3 01/15] tcg: TCGMemOp is now accelerator independent MemOp tony.nguyen
2019-07-25 7:03 ` [Qemu-devel] [PATCH v3 02/15] memory: Access MemoryRegion with MemOp tony.nguyen
2019-07-25 7:05 ` [Qemu-devel] [PATCH v3 03/15] target/mips: " tony.nguyen
2019-07-25 7:06 ` [Qemu-devel] [PATCH v3 04/15] hw/s390x: " tony.nguyen
2019-07-25 7:06 ` [Qemu-devel] [PATCH v3 05/15] hw/intc/armv7m_nic: " tony.nguyen
2019-07-25 7:07 ` [Qemu-devel] [PATCH v3 06/15] hw/virtio: " tony.nguyen
2019-07-25 7:08 ` [Qemu-devel] [PATCH v3 07/15] hw/vfio: " tony.nguyen
2019-07-25 7:08 ` [Qemu-devel] [PATCH v3 08/15] exec: " tony.nguyen
2019-07-25 7:08 ` [Qemu-devel] [PATCH v3 09/15] cputlb: " tony.nguyen
2019-07-25 7:09 ` [Qemu-devel] [PATCH v3 10/15] memory: Access MemoryRegion with MemOp semantics tony.nguyen
2019-07-25 7:10 ` [Qemu-devel] [PATCH v3 11/15] memory: Single byte swap along the I/O path tony.nguyen
2019-07-25 7:10 ` [Qemu-devel] [PATCH v3 12/15] cpu: TLB_FLAGS_MASK bit to force memory slow path tony.nguyen
2019-07-25 7:11 ` [Qemu-devel] [PATCH v3 13/15] cputlb: Byte swap memory transaction attribute tony.nguyen
2019-07-25 7:11 ` [Qemu-devel] [PATCH v3 14/15] target/sparc: Add TLB entry with attributes tony.nguyen
2019-07-25 7:12 ` [Qemu-devel] [PATCH v3 15/15] target/sparc: sun4u Invert Endian TTE bit tony.nguyen
2019-07-25 7:25 ` [Qemu-devel] [PATCH v3 00/15] Invert Endian bit in SPARCv9 MMU TTE no-reply
2019-07-25 7:58 ` [Qemu-devel] [PATCH v4 " tony.nguyen
2019-07-25 8:00 ` [Qemu-devel] [PATCH v4 01/15] tcg: TCGMemOp is now accelerator independent MemOp tony.nguyen
2019-07-25 8:00 ` [Qemu-devel] [PATCH v4 02/15] memory: Access MemoryRegion with MemOp tony.nguyen
2019-07-25 8:01 ` [Qemu-devel] [PATCH v4 03/15] target/mips: " tony.nguyen
2019-07-25 8:01 ` [Qemu-devel] [PATCH v4 04/15] hw/s390x: " tony.nguyen
2019-07-25 8:02 ` [Qemu-devel] [PATCH v4 05/15] hw/intc/armv7m_nic: " tony.nguyen
2019-07-25 8:02 ` [Qemu-devel] [PATCH v4 06/15] hw/virtio: " tony.nguyen
2019-07-25 8:03 ` [Qemu-devel] [PATCH v4 07/15] hw/vfio: " tony.nguyen
2019-07-25 8:03 ` [Qemu-devel] [PATCH v4 08/15] exec: " tony.nguyen
2019-07-25 8:04 ` [Qemu-devel] [PATCH v4 09/15] cputlb: " tony.nguyen
2019-07-25 8:04 ` [Qemu-devel] [PATCH v4 10/15] memory: Access MemoryRegion with MemOp semantics tony.nguyen
2019-07-25 8:04 ` [Qemu-devel] [PATCH v4 11/15] memory: Single byte swap along the I/O path tony.nguyen
2019-07-25 8:05 ` [Qemu-devel] [PATCH v4 12/15] cpu: TLB_FLAGS_MASK bit to force memory slow path tony.nguyen
2019-07-25 8:05 ` [Qemu-devel] [PATCH v4 13/15] cputlb: Byte swap memory transaction attribute tony.nguyen
2019-07-25 8:06 ` [Qemu-devel] [PATCH v4 14/15] target/sparc: Add TLB entry with attributes tony.nguyen
2019-07-25 8:06 ` [Qemu-devel] [PATCH v4 15/15] target/sparc: sun4u Invert Endian TTE bit tony.nguyen
2019-07-22 15:52 ` [Qemu-devel] [PATCH v2 18/20] cputlb: Byte swap memory transaction attribute tony.nguyen
2019-07-22 15:53 ` [Qemu-devel] [PATCH v2 19/20] target/sparc: Add TLB entry with attributes tony.nguyen
2019-07-22 15:54 ` [Qemu-devel] [PATCH v2 20/20] target/sparc: sun4u Invert Endian TTE bit tony.nguyen
2019-07-22 15:59 ` [Qemu-devel] [PATCH v2 00/20] Invert Endian bit in SPARCv9 MMU TTE Richard Henderson
2019-07-22 16:22 ` Paolo Bonzini
2019-07-22 16:28 ` tony.nguyen
2019-07-22 18:58 ` Richard Henderson
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