From: <tony.nguyen@bt.com>
To: <qemu-devel@nongnu.org>
Cc: peter.maydell@linaro.org, walling@linux.ibm.com,
sagark@eecs.berkeley.edu, david@redhat.com, palmer@sifive.com,
mark.cave-ayland@ilande.co.uk, laurent@vivier.eu,
Alistair.Francis@wdc.com, edgar.iglesias@gmail.com,
arikalo@wavecomp.com, pasic@linux.ibm.com,
borntraeger@de.ibm.com, rth@twiddle.net, atar4qemu@gmail.com,
ehabkost@redhat.com, qemu-s390x@nongnu.org, qemu-arm@nongnu.org,
stefanha@redhat.com, shorne@gmail.com,
david@gibson.dropbear.id.au, qemu-riscv@nongnu.org,
kbastian@mail.uni-paderborn.de, cohuck@redhat.com,
alex.williamson@redhat.com, qemu-ppc@nongnu.org,
amarkovic@wavecomp.com, pbonzini@redhat.com,
aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH v4 12/15] cpu: TLB_FLAGS_MASK bit to force memory slow path
Date: Thu, 25 Jul 2019 09:56:49 +0000 [thread overview]
Message-ID: <1564048608923.3207@bt.com> (raw)
In-Reply-To: <45d1ebe4b2ed4c039c9da20a738652df@tpw09926dag18e.domain1.systemhost.net>
The fast path is taken when TLB_FLAGS_MASK is all zero.
TLB_FORCE_SLOW is simply a TLB_FLAGS_MASK bit to force the slow path,
there are no other side effects.
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
---
include/exec/cpu-all.h | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 536ea58..e496f99 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -331,12 +331,18 @@ CPUArchState *cpu_copy(CPUArchState *env);
#define TLB_MMIO (1 << (TARGET_PAGE_BITS - 3))
/* Set if TLB entry must have MMU lookup repeated for every access */
#define TLB_RECHECK (1 << (TARGET_PAGE_BITS - 4))
+/* Set if TLB entry must take the slow path. */
+#define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS - 5))
/* Use this mask to check interception with an alignment mask
* in a TCG backend.
*/
-#define TLB_FLAGS_MASK (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO \
- | TLB_RECHECK)
+#define TLB_FLAGS_MASK \
+ (TLB_INVALID_MASK \
+ | TLB_NOTDIRTY \
+ | TLB_MMIO \
+ | TLB_RECHECK \
+ | TLB_FORCE_SLOW)
/**
* tlb_hit_page: return true if page aligned @addr is a hit against the
--
1.8.3.1
next prev parent reply other threads:[~2019-07-25 9:57 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-25 9:51 [Qemu-devel] [PATCH v4 00/15] Invert Endian bit in SPARCv9 MMU TTE tony.nguyen
2019-07-25 9:52 ` [Qemu-devel] [PATCH v4 01/15] tcg: TCGMemOp is now accelerator independent MemOp tony.nguyen
2019-07-25 9:52 ` [Qemu-devel] [PATCH v4 02/15] memory: Access MemoryRegion with MemOp tony.nguyen
2019-07-25 11:45 ` Philippe Mathieu-Daudé
2019-07-26 6:03 ` tony.nguyen
2019-07-26 6:10 ` Philippe Mathieu-Daudé
2019-07-25 9:52 ` [Qemu-devel] [PATCH v4 03/15] target/mips: " tony.nguyen
2019-07-25 11:30 ` Philippe Mathieu-Daudé
2019-07-25 11:37 ` Philippe Mathieu-Daudé
2019-07-25 9:53 ` [Qemu-devel] [PATCH v4 04/15] hw/s390x: " tony.nguyen
2019-07-25 9:53 ` [Qemu-devel] [PATCH v4 05/15] hw/intc/armv7m_nic: " tony.nguyen
2019-07-25 11:31 ` Philippe Mathieu-Daudé
2019-07-25 9:54 ` [Qemu-devel] [PATCH v4 06/15] hw/virtio: " tony.nguyen
2019-07-25 9:54 ` [Qemu-devel] [PATCH v4 07/15] hw/vfio: " tony.nguyen
2019-07-25 9:55 ` [Qemu-devel] [PATCH v4 08/15] exec: " tony.nguyen
2019-07-25 11:32 ` Philippe Mathieu-Daudé
2019-07-25 9:55 ` [Qemu-devel] [PATCH v4 09/15] cputlb: " tony.nguyen
2019-07-25 11:38 ` Philippe Mathieu-Daudé
2019-07-25 11:49 ` Philippe Mathieu-Daudé
2019-07-25 9:55 ` [Qemu-devel] [PATCH v4 10/15] memory: Access MemoryRegion with MemOp semantics tony.nguyen
2019-07-25 9:56 ` [Qemu-devel] [PATCH v4 11/15] memory: Single byte swap along the I/O path tony.nguyen
2019-07-25 11:52 ` Philippe Mathieu-Daudé
2019-07-25 9:56 ` tony.nguyen [this message]
2019-07-25 9:57 ` [Qemu-devel] [PATCH v4 13/15] cputlb: Byte swap memory transaction attribute tony.nguyen
2019-07-25 9:57 ` [Qemu-devel] [PATCH v4 14/15] target/sparc: Add TLB entry with attributes tony.nguyen
2019-07-25 9:57 ` [Qemu-devel] [PATCH v4 15/15] target/sparc: sun4u Invert Endian TTE bit tony.nguyen
-- strict thread matches above, loose matches on Subject: below --
2019-07-22 15:34 [Qemu-devel] [PATCH v2 00/20] Invert Endian bit in SPARCv9 MMU TTE tony.nguyen
2019-07-22 15:51 ` [Qemu-devel] [PATCH v2 17/20] cpu: TLB_FLAGS_MASK bit to force memory slow path tony.nguyen
2019-07-25 7:01 ` [Qemu-devel] [PATCH v3 00/15] Invert Endian bit in SPARCv9 MMU TTE tony.nguyen
2019-07-25 7:58 ` [Qemu-devel] [PATCH v4 " tony.nguyen
2019-07-25 8:05 ` [Qemu-devel] [PATCH v4 12/15] cpu: TLB_FLAGS_MASK bit to force memory slow path tony.nguyen
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