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[147.11.224.80]) by smtp.gmail.com with ESMTPSA id v8sm87339107pgs.82.2019.08.11.01.07.17 (version=TLS1 cipher=AES128-SHA bits=128/128); Sun, 11 Aug 2019 01:07:17 -0700 (PDT) From: Bin Meng To: Alistair Francis , Palmer Dabbelt , qemu-devel@nongnu.org, qemu-riscv@nongnu.org Date: Sun, 11 Aug 2019 01:06:43 -0700 Message-Id: <1565510821-3927-11-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1565510821-3927-1-git-send-email-bmeng.cn@gmail.com> References: <1565510821-3927-1-git-send-email-bmeng.cn@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 Subject: [Qemu-devel] [PATCH v3 10/28] riscv: sifive_u: Remove the unnecessary include of prci header X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" sifive_u machine does not use PRCI as of today. Remove the prci header inclusion. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis --- Changes in v3: None Changes in v2: None hw/riscv/sifive_u.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index f24ec2e..e071838 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -41,7 +41,6 @@ #include "hw/riscv/sifive_plic.h" #include "hw/riscv/sifive_clint.h" #include "hw/riscv/sifive_uart.h" -#include "hw/riscv/sifive_prci.h" #include "hw/riscv/sifive_u.h" #include "hw/riscv/boot.h" #include "chardev/char.h" -- 2.7.4