From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
To: qemu-devel@nongnu.org
Cc: arikalo@wavecomp.com
Subject: [PATCH 11/11] target/mips: msa: Split helpers for B<CLR|NEG|SEL>.<B|H|W|D>
Date: Tue, 24 Sep 2019 15:26:42 +0200 [thread overview]
Message-ID: <1569331602-2586-12-git-send-email-aleksandar.markovic@rt-rk.com> (raw)
In-Reply-To: <1569331602-2586-1-git-send-email-aleksandar.markovic@rt-rk.com>
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/helper.h | 18 +++-
target/mips/msa_helper.c | 227 ++++++++++++++++++++++++++++++++++++++++++-----
target/mips/translate.c | 57 ++++++++++--
3 files changed, 267 insertions(+), 35 deletions(-)
diff --git a/target/mips/helper.h b/target/mips/helper.h
index 27544a1..1411e0e 100644
--- a/target/mips/helper.h
+++ b/target/mips/helper.h
@@ -807,6 +807,21 @@ DEF_HELPER_4(msa_bmnz_v, void, env, i32, i32, i32)
DEF_HELPER_4(msa_bmz_v, void, env, i32, i32, i32)
DEF_HELPER_4(msa_bsel_v, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_bclr_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_bclr_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_bclr_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_bclr_d, void, env, i32, i32, i32)
+
+DEF_HELPER_4(msa_bneg_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_bneg_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_bneg_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_bneg_d, void, env, i32, i32, i32)
+
+DEF_HELPER_4(msa_bset_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_bset_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_bset_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_bset_d, void, env, i32, i32, i32)
+
DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32)
@@ -846,9 +861,6 @@ DEF_HELPER_5(msa_srlri_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_sll_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_sra_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_srl_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_bclr_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_bset_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_bneg_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_binsl_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_binsr_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_addv_df, void, env, i32, i32, i32, i32)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index eda675a..9e4f275 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -523,7 +523,210 @@ void helper_msa_bsel_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
* +---------------+----------------------------------------------------------+
*/
-/* TODO: insert Bit Set group helpers here */
+static inline int64_t msa_bclr_df(uint32_t df, int64_t arg1, int64_t arg2)
+{
+ int32_t b_arg2 = BIT_POSITION(arg2, df);
+ return UNSIGNED(arg1 & (~(1LL << b_arg2)), df);
+}
+
+void helper_msa_bclr_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->b[0] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[1]);
+ pwd->b[2] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[2]);
+ pwd->b[3] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[3]);
+ pwd->b[4] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[4]);
+ pwd->b[5] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[5]);
+ pwd->b[6] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[6]);
+ pwd->b[7] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[7]);
+ pwd->b[8] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[8]);
+ pwd->b[9] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[9]);
+ pwd->b[10] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[10]);
+ pwd->b[11] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[11]);
+ pwd->b[12] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[12]);
+ pwd->b[13] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[13]);
+ pwd->b[14] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[14]);
+ pwd->b[15] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[15]);
+}
+
+void helper_msa_bclr_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->h[0] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[1]);
+ pwd->h[2] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[2]);
+ pwd->h[3] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[3]);
+ pwd->h[4] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[4]);
+ pwd->h[5] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[5]);
+ pwd->h[6] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[6]);
+ pwd->h[7] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[7]);
+}
+
+void helper_msa_bclr_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->w[0] = msa_bclr_df(DF_WORD, pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_bclr_df(DF_WORD, pws->w[0], pwt->w[1]);
+ pwd->w[2] = msa_bclr_df(DF_WORD, pws->w[0], pwt->w[2]);
+ pwd->w[3] = msa_bclr_df(DF_WORD, pws->w[0], pwt->w[3]);
+}
+
+void helper_msa_bclr_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->d[0] = msa_bclr_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_bclr_df(DF_DOUBLE, pws->d[0], pwt->d[1]);
+}
+
+static inline int64_t msa_bneg_df(uint32_t df, int64_t arg1, int64_t arg2)
+{
+ int32_t b_arg2 = BIT_POSITION(arg2, df);
+ return UNSIGNED(arg1 ^ (1LL << b_arg2), df);
+}
+
+void helper_msa_bneg_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->b[0] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[1]);
+ pwd->b[2] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[2]);
+ pwd->b[3] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[3]);
+ pwd->b[4] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[4]);
+ pwd->b[5] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[5]);
+ pwd->b[6] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[6]);
+ pwd->b[7] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[7]);
+ pwd->b[8] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[8]);
+ pwd->b[9] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[9]);
+ pwd->b[10] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[10]);
+ pwd->b[11] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[11]);
+ pwd->b[12] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[12]);
+ pwd->b[13] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[13]);
+ pwd->b[14] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[14]);
+ pwd->b[15] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[15]);
+}
+
+void helper_msa_bneg_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->h[0] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[1]);
+ pwd->h[2] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[2]);
+ pwd->h[3] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[3]);
+ pwd->h[4] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[4]);
+ pwd->h[5] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[5]);
+ pwd->h[6] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[6]);
+ pwd->h[7] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[7]);
+}
+
+void helper_msa_bneg_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->w[0] = msa_bneg_df(DF_WORD, pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_bneg_df(DF_WORD, pws->w[0], pwt->w[1]);
+ pwd->w[2] = msa_bneg_df(DF_WORD, pws->w[0], pwt->w[2]);
+ pwd->w[3] = msa_bneg_df(DF_WORD, pws->w[0], pwt->w[3]);
+}
+
+void helper_msa_bneg_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->d[0] = msa_bneg_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_bneg_df(DF_DOUBLE, pws->d[0], pwt->d[1]);
+}
+
+static inline int64_t msa_bset_df(uint32_t df, int64_t arg1,
+ int64_t arg2)
+{
+ int32_t b_arg2 = BIT_POSITION(arg2, df);
+ return UNSIGNED(arg1 | (1LL << b_arg2), df);
+}
+
+void helper_msa_bset_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->b[0] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[1]);
+ pwd->b[2] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[2]);
+ pwd->b[3] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[3]);
+ pwd->b[4] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[4]);
+ pwd->b[5] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[5]);
+ pwd->b[6] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[6]);
+ pwd->b[7] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[7]);
+ pwd->b[8] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[8]);
+ pwd->b[9] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[9]);
+ pwd->b[10] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[10]);
+ pwd->b[11] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[11]);
+ pwd->b[12] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[12]);
+ pwd->b[13] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[13]);
+ pwd->b[14] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[14]);
+ pwd->b[15] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[15]);
+}
+
+void helper_msa_bset_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->h[0] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[1]);
+ pwd->h[2] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[2]);
+ pwd->h[3] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[3]);
+ pwd->h[4] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[4]);
+ pwd->h[5] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[5]);
+ pwd->h[6] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[6]);
+ pwd->h[7] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[7]);
+}
+
+void helper_msa_bset_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->w[0] = msa_bset_df(DF_WORD, pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_bset_df(DF_WORD, pws->w[0], pwt->w[1]);
+ pwd->w[2] = msa_bset_df(DF_WORD, pws->w[0], pwt->w[2]);
+ pwd->w[3] = msa_bset_df(DF_WORD, pws->w[0], pwt->w[3]);
+}
+
+void helper_msa_bset_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->d[0] = msa_bset_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_bset_df(DF_DOUBLE, pws->d[0], pwt->d[1]);
+}
/*
@@ -1220,25 +1423,6 @@ static inline int64_t msa_srl_df(uint32_t df, int64_t arg1, int64_t arg2)
return u_arg1 >> b_arg2;
}
-static inline int64_t msa_bclr_df(uint32_t df, int64_t arg1, int64_t arg2)
-{
- int32_t b_arg2 = BIT_POSITION(arg2, df);
- return UNSIGNED(arg1 & (~(1LL << b_arg2)), df);
-}
-
-static inline int64_t msa_bset_df(uint32_t df, int64_t arg1,
- int64_t arg2)
-{
- int32_t b_arg2 = BIT_POSITION(arg2, df);
- return UNSIGNED(arg1 | (1LL << b_arg2), df);
-}
-
-static inline int64_t msa_bneg_df(uint32_t df, int64_t arg1, int64_t arg2)
-{
- int32_t b_arg2 = BIT_POSITION(arg2, df);
- return UNSIGNED(arg1 ^ (1LL << b_arg2), df);
-}
-
static inline int64_t msa_sat_s_df(uint32_t df, int64_t arg, uint32_t m)
{
return arg < M_MIN_INT(m + 1) ? M_MIN_INT(m + 1) :
@@ -1734,9 +1918,6 @@ void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, \
MSA_BINOP_DF(sll)
MSA_BINOP_DF(sra)
MSA_BINOP_DF(srl)
-MSA_BINOP_DF(bclr)
-MSA_BINOP_DF(bset)
-MSA_BINOP_DF(bneg)
MSA_BINOP_DF(addv)
MSA_BINOP_DF(subv)
MSA_BINOP_DF(max_s)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 6080c72..1a87f79 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28418,6 +28418,54 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
break;
}
break;
+ case OPC_BCLR_df:
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_bclr_b(cpu_env, twd, tws, twt);
+ break;
+ case DF_HALF:
+ gen_helper_msa_bclr_h(cpu_env, twd, tws, twt);
+ break;
+ case DF_WORD:
+ gen_helper_msa_bclr_w(cpu_env, twd, tws, twt);
+ break;
+ case DF_DOUBLE:
+ gen_helper_msa_bclr_d(cpu_env, twd, tws, twt);
+ break;
+ }
+ break;
+ case OPC_BNEG_df:
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_bneg_b(cpu_env, twd, tws, twt);
+ break;
+ case DF_HALF:
+ gen_helper_msa_bneg_h(cpu_env, twd, tws, twt);
+ break;
+ case DF_WORD:
+ gen_helper_msa_bneg_w(cpu_env, twd, tws, twt);
+ break;
+ case DF_DOUBLE:
+ gen_helper_msa_bneg_d(cpu_env, twd, tws, twt);
+ break;
+ }
+ break;
+ case OPC_BSET_df:
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_bset_b(cpu_env, twd, tws, twt);
+ break;
+ case DF_HALF:
+ gen_helper_msa_bset_h(cpu_env, twd, tws, twt);
+ break;
+ case DF_WORD:
+ gen_helper_msa_bset_w(cpu_env, twd, tws, twt);
+ break;
+ case DF_DOUBLE:
+ gen_helper_msa_bset_d(cpu_env, twd, tws, twt);
+ break;
+ }
+ break;
case OPC_SLL_df:
gen_helper_msa_sll_df(cpu_env, tdf, twd, tws, twt);
break;
@@ -28487,9 +28535,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
case OPC_SRLR_df:
gen_helper_msa_srlr_df(cpu_env, tdf, twd, tws, twt);
break;
- case OPC_BCLR_df:
- gen_helper_msa_bclr_df(cpu_env, tdf, twd, tws, twt);
- break;
case OPC_MAX_U_df:
gen_helper_msa_max_u_df(cpu_env, tdf, twd, tws, twt);
break;
@@ -28505,9 +28550,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
case OPC_PCKOD_df:
gen_helper_msa_pckod_df(cpu_env, tdf, twd, tws, twt);
break;
- case OPC_BSET_df:
- gen_helper_msa_bset_df(cpu_env, tdf, twd, tws, twt);
- break;
case OPC_MIN_S_df:
gen_helper_msa_min_s_df(cpu_env, tdf, twd, tws, twt);
break;
@@ -28526,9 +28568,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
case OPC_ILVL_df:
gen_helper_msa_ilvl_df(cpu_env, tdf, twd, tws, twt);
break;
- case OPC_BNEG_df:
- gen_helper_msa_bneg_df(cpu_env, tdf, twd, tws, twt);
- break;
case OPC_MIN_U_df:
gen_helper_msa_min_u_df(cpu_env, tdf, twd, tws, twt);
break;
--
2.7.4
prev parent reply other threads:[~2019-09-24 14:34 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-24 13:26 [PATCH 00/11] target/mips: Misc cleanups for September/October 2019 Aleksandar Markovic
2019-09-24 13:26 ` [PATCH 01/11] target/mips: Clean up helper.c Aleksandar Markovic
2019-09-24 13:26 ` [PATCH 02/11] target/mips: Clean up internal.h Aleksandar Markovic
2019-09-24 13:26 ` [PATCH 03/11] target/mips: Clean up kvm_mips.h Aleksandar Markovic
2019-09-24 13:26 ` [PATCH 04/11] target/mips: Clean up mips-defs.h Aleksandar Markovic
2019-09-24 13:26 ` [PATCH 05/11] target/mips: Clean up op_helper.c Aleksandar Markovic
2019-09-24 13:26 ` [PATCH 06/11] target/mips: Clean up translate.c Aleksandar Markovic
2019-09-24 13:51 ` Philippe Mathieu-Daudé
2019-09-24 13:26 ` [PATCH 07/11] target/mips: msa: Split helpers for <NLOC|NLZC>.<B|H|W|D> Aleksandar Markovic
2019-09-24 13:26 ` [PATCH 08/11] target/mips: msa: Split helpers for PCNT.<B|H|W|D> Aleksandar Markovic
2019-09-24 13:26 ` [PATCH 09/11] target/mips: msa: Split helpers for BINS<L|R>.<B|H|W|D> Aleksandar Markovic
2019-09-24 13:26 ` [PATCH 10/11] target/mips: msa: Unroll loops and demacro <BMNZ|BMZ|BSEL>.V Aleksandar Markovic
2019-09-24 13:26 ` Aleksandar Markovic [this message]
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