From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: riku.voipio@iki.fi, richard.henderson@linaro.org,
laurent@vivier.eu, Taylor Simpson <tsimpson@quicinc.com>,
philmd@redhat.com, aleksandar.m.mail@gmail.com
Subject: [RFC PATCH 41/66] Hexagon TCG generation - step 04
Date: Mon, 10 Feb 2020 18:40:19 -0600 [thread overview]
Message-ID: <1581381644-13678-42-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1581381644-13678-1-git-send-email-tsimpson@quicinc.com>
Override store instructions
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
target/hexagon/helper_overrides.h | 241 ++++++++++++++++++++++++++++++++++++++
1 file changed, 241 insertions(+)
diff --git a/target/hexagon/helper_overrides.h b/target/hexagon/helper_overrides.h
index 673b7a5..648fc5d 100644
--- a/target/hexagon/helper_overrides.h
+++ b/target/hexagon/helper_overrides.h
@@ -636,4 +636,245 @@
#define fWRAP_L4_ploadrdfnew_abs(GENHLPR, SHORTCODE) \
fWRAP_PRED_LOAD_PAIR(fEA_IMM(uiV), fLSBNEWNOT(PtN))
+/* load-locked and store-locked */
+#define fWRAP_L2_loadw_locked(GENHLPR, SHORTCODE) \
+ SHORTCODE
+#define fWRAP_L4_loadd_locked(GENHLPR, SHORTCODE) \
+ SHORTCODE
+#define fWRAP_S2_storew_locked(GENHLPR, SHORTCODE) \
+ do { SHORTCODE; READ_PREG(PdV, PdN); } while (0)
+#define fWRAP_S4_stored_locked(GENHLPR, SHORTCODE) \
+ do { SHORTCODE; READ_PREG(PdV, PdN); } while (0)
+
+#define fWRAP_STORE(SHORTCODE) \
+ do { \
+ TCGv HALF = tcg_temp_new(); \
+ TCGv BYTE = tcg_temp_new(); \
+ TCGv NEWREG_ST = tcg_temp_new(); \
+ TCGv tmp = tcg_temp_new(); \
+ SHORTCODE; \
+ tcg_temp_free(HALF); \
+ tcg_temp_free(BYTE); \
+ tcg_temp_free(NEWREG_ST); \
+ tcg_temp_free(tmp); \
+ } while (0)
+
+#define fWRAP_STORE_ap(STORE) \
+ do { \
+ TCGv HALF = tcg_temp_new(); \
+ TCGv BYTE = tcg_temp_new(); \
+ TCGv NEWREG_ST = tcg_temp_new(); \
+ { \
+ fEA_IMM(UiV); \
+ STORE; \
+ tcg_gen_movi_tl(ReV, UiV); \
+ } \
+ tcg_temp_free(HALF); \
+ tcg_temp_free(BYTE); \
+ tcg_temp_free(NEWREG_ST); \
+ } while (0)
+
+#define fWRAP_STORE_pcr(SHIFT, STORE) \
+ do { \
+ TCGv ireg = tcg_temp_new(); \
+ TCGv HALF = tcg_temp_new(); \
+ TCGv BYTE = tcg_temp_new(); \
+ TCGv NEWREG_ST = tcg_temp_new(); \
+ TCGv tmp = tcg_temp_new(); \
+ fEA_REG(RxV); \
+ fPM_CIRR(RxV, fREAD_IREG(MuV, SHIFT), MuV); \
+ STORE; \
+ tcg_temp_free(ireg); \
+ tcg_temp_free(HALF); \
+ tcg_temp_free(BYTE); \
+ tcg_temp_free(NEWREG_ST); \
+ tcg_temp_free(tmp); \
+ } while (0)
+
+#define fWRAP_S2_storerb_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerb_pi(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerb_ap(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_ap(fSTORE(1, 1, EA, fGETBYTE(0, RtV)))
+#define fWRAP_S2_storerb_pr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerb_ur(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerb_pbr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerb_pci(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerb_pcr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_pcr(0, fSTORE(1, 1, EA, fGETBYTE(0, RtV)))
+#define fWRAP_S4_storerb_rr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerbnew_rr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storeirb_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerbgp(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS1_storeb_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS2_storebi0(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerh_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerh_pi(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerh_ap(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_ap(fSTORE(1, 2, EA, fGETHALF(0, RtV)))
+#define fWRAP_S2_storerh_pr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerh_ur(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerh_pbr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerh_pci(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerh_pcr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_pcr(1, fSTORE(1, 2, EA, fGETHALF(0, RtV)))
+#define fWRAP_S4_storerh_rr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storeirh_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerhgp(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS2_storeh_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerf_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerf_pi(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerf_ap(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_ap(fSTORE(1, 2, EA, fGETHALF(1, RtV)))
+#define fWRAP_S2_storerf_pr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerf_ur(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerf_pbr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerf_pci(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerf_pcr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_pcr(1, fSTORE(1, 2, EA, fGETHALF(1, RtV)))
+#define fWRAP_S4_storerf_rr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerfgp(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storeri_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storeri_pi(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storeri_ap(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_ap(fSTORE(1, 4, EA, RtV))
+#define fWRAP_S2_storeri_pr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storeri_ur(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storeri_pbr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storeri_pci(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storeri_pcr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_pcr(2, fSTORE(1, 4, EA, RtV))
+#define fWRAP_S4_storeri_rr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerinew_rr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storeiri_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerigp(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS1_storew_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS2_storew_sp(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS2_storewi0(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerd_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerd_pi(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerd_ap(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_ap(fSTORE(1, 8, EA, RttV))
+#define fWRAP_S2_storerd_pr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerd_ur(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerd_pbr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerd_pci(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerd_pcr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_pcr(3, fSTORE(1, 8, EA, RttV))
+#define fWRAP_S4_storerd_rr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerdgp(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_SS2_stored_sp(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerbnew_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerbnew_pi(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerbnew_ap(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_ap(fSTORE(1, 1, EA, fGETBYTE(0, fNEWREG_ST(NtN))))
+#define fWRAP_S2_storerbnew_pr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerbnew_ur(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerbnew_pbr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerbnew_pci(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerbnew_pcr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_pcr(0, fSTORE(1, 1, EA, fGETBYTE(0, fNEWREG_ST(NtN))))
+#define fWRAP_S2_storerbnewgp(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerhnew_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerhnew_pi(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerhnew_ap(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_ap(fSTORE(1, 2, EA, fGETHALF(0, fNEWREG_ST(NtN))))
+#define fWRAP_S2_storerhnew_pr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerhnew_ur(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerhnew_pbr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerhnew_pci(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerhnew_pcr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_pcr(1, fSTORE(1, 2, EA, fGETHALF(0, fNEWREG_ST(NtN))))
+#define fWRAP_S2_storerhnewgp(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+
+#define fWRAP_S2_storerinew_io(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerinew_pi(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerinew_ap(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_ap(fSTORE(1, 4, EA, fNEWREG_ST(NtN)))
+#define fWRAP_S2_storerinew_pr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S4_storerinew_ur(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerinew_pbr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerinew_pci(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+#define fWRAP_S2_storerinew_pcr(GENHLPR, SHORTCODE) \
+ fWRAP_STORE_pcr(2, fSTORE(1, 4, EA, fNEWREG_ST(NtN)))
+#define fWRAP_S2_storerinewgp(GENHLPR, SHORTCODE) \
+ fWRAP_STORE(SHORTCODE)
+
#endif
--
2.7.4
next prev parent reply other threads:[~2020-02-11 1:11 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-11 0:39 [RFC PATCH 00/66] Hexagon patch series Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 01/66] Hexagon Maintainers Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 02/66] Hexagon ELF Machine Definition Taylor Simpson
2020-02-11 7:16 ` Philippe Mathieu-Daudé
2020-02-11 0:39 ` [RFC PATCH 03/66] Hexagon CPU Scalar Core Definition Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 04/66] Hexagon register names Taylor Simpson
2020-02-11 7:18 ` Philippe Mathieu-Daudé
2020-02-11 0:39 ` [RFC PATCH 05/66] Hexagon Disassembler Taylor Simpson
2020-02-11 7:20 ` Philippe Mathieu-Daudé
2020-02-11 0:39 ` [RFC PATCH 06/66] Hexagon CPU Scalar Core Helpers Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 07/66] Hexagon GDB Stub Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 08/66] Hexagon instruction and packet types Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 09/66] Hexagon architecture types Taylor Simpson
2020-02-11 7:23 ` Philippe Mathieu-Daudé
2020-02-11 0:39 ` [RFC PATCH 10/66] Hexagon register fields Taylor Simpson
2020-02-11 15:29 ` Philippe Mathieu-Daudé
2020-02-11 0:39 ` [RFC PATCH 11/66] Hexagon instruction attributes Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 12/66] Hexagon register map Taylor Simpson
2020-02-11 7:26 ` Philippe Mathieu-Daudé
2020-02-11 0:39 ` [RFC PATCH 13/66] Hexagon instruction/packet decode Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 14/66] Hexagon instruction printing Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 15/66] Hexagon arch import - instruction semantics definitions Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 16/66] Hexagon arch import - macro definitions Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 17/66] Hexagon arch import - instruction encoding Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 18/66] Hexagon instruction class definitions Taylor Simpson
2020-02-11 0:39 ` [RFC PATCH 19/66] Hexagon instruction utility functions Taylor Simpson
2020-02-11 7:29 ` Philippe Mathieu-Daudé
2020-02-11 0:39 ` [RFC PATCH 20/66] Hexagon generator phase 1 - C preprocessor for semantics Taylor Simpson
2020-02-11 7:30 ` Philippe Mathieu-Daudé
2020-02-11 0:39 ` [RFC PATCH 21/66] Hexagon generator phase 2 - qemu_def_generated.h Taylor Simpson
2020-02-11 7:33 ` Philippe Mathieu-Daudé
2020-02-11 0:40 ` [RFC PATCH 22/66] Hexagon generator phase 2 - qemu_wrap_generated.h Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 23/66] Hexagon generator phase 2 - opcodes_def_generated.h Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 24/66] Hexagon generator phase 2 - op_attribs_generated.h Taylor Simpson
2020-02-11 8:01 ` Philippe Mathieu-Daudé
2020-02-11 0:40 ` [RFC PATCH 25/66] Hexagon generator phase 2 - op_regs_generated.h Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 26/66] Hexagon generator phase 2 - printinsn-generated.h Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 27/66] Hexagon generator phase 3 - C preprocessor for decode tree Taylor Simpson
2020-02-11 7:35 ` Philippe Mathieu-Daudé
2020-02-11 0:40 ` [RFC PATCH 28/66] Hexagon generater phase 4 - Decode tree Taylor Simpson
2020-02-11 7:37 ` Philippe Mathieu-Daudé
2020-02-11 8:03 ` Philippe Mathieu-Daudé
2020-02-11 0:40 ` [RFC PATCH 29/66] Hexagon opcode data structures Taylor Simpson
2020-02-11 7:40 ` Philippe Mathieu-Daudé
2020-02-12 17:36 ` Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 30/66] Hexagon macros to interface with the generator Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 31/66] Hexagon macros referenced in instruction semantics Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 32/66] Hexagon instruction classes Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 33/66] Hexagon TCG generation helpers - step 1 Taylor Simpson
2020-02-11 15:22 ` Philippe Mathieu-Daudé
2020-02-11 0:40 ` [RFC PATCH 34/66] Hexagon TCG generation helpers - step 2 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 35/66] Hexagon TCG generation helpers - step 3 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 36/66] Hexagon TCG generation helpers - step 4 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 37/66] Hexagon TCG generation helpers - step 5 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 38/66] Hexagon TCG generation - step 01 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 39/66] Hexagon TCG generation - step 02 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 40/66] Hexagon TCG generation - step 03 Taylor Simpson
2020-02-11 0:40 ` Taylor Simpson [this message]
2020-02-11 0:40 ` [RFC PATCH 42/66] Hexagon TCG generation - step 05 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 43/66] Hexagon TCG generation - step 06 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 44/66] Hexagon TCG generation - step 07 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 45/66] Hexagon TCG generation - step 08 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 46/66] Hexagon TCG generation - step 09 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 47/66] Hexagon TCG generation - step 10 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 48/66] Hexagon TCG generation - step 11 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 49/66] Hexagon TCG generation - step 12 Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 50/66] Hexagon translation Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 51/66] Hexagon Linux user emulation Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 52/66] Hexagon build infrastructure Taylor Simpson
2020-02-11 7:15 ` Philippe Mathieu-Daudé
2020-02-11 0:40 ` [RFC PATCH 53/66] Hexagon - Add Hexagon Vector eXtensions (HVX) to core definition Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 54/66] Hexagon HVX support in gdbstub Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 55/66] Hexagon HVX import instruction encodings Taylor Simpson
2020-02-11 7:02 ` Philippe Mathieu-Daudé
2020-02-11 14:35 ` Taylor Simpson
2020-02-11 14:40 ` Philippe Mathieu-Daudé
2020-02-11 14:43 ` Philippe Mathieu-Daudé
2020-02-11 0:40 ` [RFC PATCH 56/66] Hexagon HVX import semantics Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 57/66] Hexagon HVX import macro definitions Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 58/66] Hexagon HVX semantics generator Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 59/66] Hexagon HVX instruction decoding Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 60/66] Hexagon HVX instruction utility functions Taylor Simpson
2020-02-11 7:46 ` Philippe Mathieu-Daudé
2020-02-11 0:40 ` [RFC PATCH 61/66] Hexagon HVX macros to interface with the generator Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 62/66] Hexagon HVX macros referenced in instruction semantics Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 63/66] Hexagon HVX helper to commit vector stores (masked and scatter/gather) Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 64/66] Hexagon HVX TCG generation Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 65/66] Hexagon HVX translation Taylor Simpson
2020-02-11 0:40 ` [RFC PATCH 66/66] Hexagon HVX build infrastructure Taylor Simpson
2020-02-11 1:31 ` [RFC PATCH 00/66] Hexagon patch series no-reply
2020-02-11 7:49 ` Philippe Mathieu-Daudé
2020-02-11 7:53 ` Philippe Mathieu-Daudé
2020-02-11 15:32 ` Philippe Mathieu-Daudé
2020-02-26 16:13 ` Taylor Simpson
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