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From: Xu Yandong <xuyandong2@huawei.com>
To: <peter.maydell@linaro.org>
Cc: zhang.zhanghailiang@huawei.com, slp@redhat.com,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Xu Yandong <xuyandong2@huawei.com>,
	qemu-devel@nongnu.org, Shannon Zhao <shannon.zhaosl@gmail.com>,
	qemu-arm@nongnu.org, Igor Mammedov <imammedo@redhat.com>,
	wu.wubin@huawei.com
Subject: [PATCH RFC 04/16] hw/arm: move shared irqmap member to ArmMachine
Date: Mon, 17 Feb 2020 02:51:16 -0500	[thread overview]
Message-ID: <1581925888-103620-5-git-send-email-xuyandong2@huawei.com> (raw)
In-Reply-To: <1581925888-103620-1-git-send-email-xuyandong2@huawei.com>

Move irqmap member from VirtMachineState to ArmMachineState.

Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>
Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
Signed-off-by: Xu Yandong <xuyandong2@huawei.com>
---
 hw/arm/virt-acpi-build.c |  8 ++++----
 hw/arm/virt.c            | 25 +++++++++++++------------
 include/hw/arm/arm.h     |  1 +
 include/hw/arm/virt.h    |  1 -
 4 files changed, 18 insertions(+), 17 deletions(-)

diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index ef61a651c1..27e6c95eca 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -414,7 +414,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
     its->identifiers[0] = 0; /* MADT translation_id */
 
     if (vms->iommu == VIRT_IOMMU_SMMUV3) {
-        int irq =  vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE;
+        int irq =  ams->irqmap[VIRT_SMMU] + ARM_SPI_BASE;
 
         /* SMMUv3 node */
         smmu_offset = iort_node_offset + node_size;
@@ -488,7 +488,7 @@ build_spcr(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
     AcpiSerialPortConsoleRedirection *spcr;
     ArmMachineState *ams = ARM_MACHINE(vms);
     const MemMapEntry *uart_memmap = &ams->memmap[VIRT_UART];
-    int irq = vms->irqmap[VIRT_UART] + ARM_SPI_BASE;
+    int irq = ams->irqmap[VIRT_UART] + ARM_SPI_BASE;
     int spcr_start = table_data->len;
 
     spcr = acpi_data_push(table_data, sizeof(*spcr));
@@ -609,7 +609,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
     ArmMachineState *ams = ARM_MACHINE(vms);
     int madt_start = table_data->len;
     const MemMapEntry *memmap = ams->memmap;
-    const int *irqmap = vms->irqmap;
+    const int *irqmap = ams->irqmap;
     AcpiMultipleApicTable *madt;
     AcpiMadtGenericDistributor *gicd;
     AcpiMadtGenericMsiFrame *gic_msi;
@@ -730,7 +730,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
     MachineState *ms = MACHINE(vms);
     ArmMachineState *ams = ARM_MACHINE(vms);
     const MemMapEntry *memmap = ams->memmap;
-    const int *irqmap = vms->irqmap;
+    const int *irqmap = ams->irqmap;
 
     dsdt = init_aml_allocator();
     /* Reserve space for header */
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 1dea640719..e7eee13385 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -544,7 +544,7 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
     DeviceState *dev;
     MachineState *ms = MACHINE(vms);
     ArmMachineState *ams = ARM_MACHINE(vms);
-    int irq = vms->irqmap[VIRT_ACPI_GED];
+    int irq = ams->irqmap[VIRT_ACPI_GED];
     uint32_t event = ACPI_GED_PWR_DOWN_EVT;
 
     if (ms->ram_slots) {
@@ -588,7 +588,7 @@ static void create_v2m(VirtMachineState *vms)
 {
     int i;
     ArmMachineState *ams = ARM_MACHINE(vms);
-    int irq = vms->irqmap[VIRT_GIC_V2M];
+    int irq = ams->irqmap[VIRT_GIC_V2M];
     DeviceState *dev;
 
     dev = qdev_create(NULL, "arm-gicv2m");
@@ -734,7 +734,7 @@ static void create_uart(const VirtMachineState *vms, int uart,
     const ArmMachineState *ams = ARM_MACHINE(vms);
     hwaddr base = ams->memmap[uart].base;
     hwaddr size = ams->memmap[uart].size;
-    int irq = vms->irqmap[uart];
+    int irq = ams->irqmap[uart];
     const char compat[] = "arm,pl011\0arm,primecell";
     const char clocknames[] = "uartclk\0apb_pclk";
     DeviceState *dev = qdev_create(NULL, "pl011");
@@ -782,7 +782,7 @@ static void create_rtc(const VirtMachineState *vms)
     const ArmMachineState *ams = ARM_MACHINE(vms);
     hwaddr base = ams->memmap[VIRT_RTC].base;
     hwaddr size = ams->memmap[VIRT_RTC].size;
-    int irq = vms->irqmap[VIRT_RTC];
+    int irq = ams->irqmap[VIRT_RTC];
     const char compat[] = "arm,pl031\0arm,primecell";
 
     sysbus_create_simple("pl031", base, qdev_get_gpio_in(vms->gic, irq));
@@ -820,7 +820,7 @@ static void create_gpio(const VirtMachineState *vms)
     const ArmMachineState *ams = ARM_MACHINE(vms);
     hwaddr base = ams->memmap[VIRT_GPIO].base;
     hwaddr size = ams->memmap[VIRT_GPIO].size;
-    int irq = vms->irqmap[VIRT_GPIO];
+    int irq = ams->irqmap[VIRT_GPIO];
     const char compat[] = "arm,pl061\0arm,primecell";
 
     pl061_dev = sysbus_create_simple("pl061", base,
@@ -892,7 +892,7 @@ static void create_virtio_devices(const VirtMachineState *vms)
      * of disks users must use UUIDs or similar mechanisms.
      */
     for (i = 0; i < NUM_VIRTIO_TRANSPORTS; i++) {
-        int irq = vms->irqmap[VIRT_MMIO] + i;
+        int irq = ams->irqmap[VIRT_MMIO] + i;
         hwaddr base = ams->memmap[VIRT_MMIO].base + i * size;
 
         sysbus_create_simple("virtio-mmio", base,
@@ -908,7 +908,7 @@ static void create_virtio_devices(const VirtMachineState *vms)
      */
     for (i = NUM_VIRTIO_TRANSPORTS - 1; i >= 0; i--) {
         char *nodename;
-        int irq = vms->irqmap[VIRT_MMIO] + i;
+        int irq = ams->irqmap[VIRT_MMIO] + i;
         hwaddr base = ams->memmap[VIRT_MMIO].base + i * size;
 
         nodename = g_strdup_printf("/virtio_mmio@%" PRIx64, base);
@@ -1155,7 +1155,7 @@ static void create_smmu(const VirtMachineState *vms,
     char *node;
     const ArmMachineState *ams = ARM_MACHINE(vms);
     const char compat[] = "arm,smmu-v3";
-    int irq =  vms->irqmap[VIRT_SMMU];
+    int irq = ams->irqmap[VIRT_SMMU];
     int i;
     hwaddr base = ams->memmap[VIRT_SMMU].base;
     hwaddr size = ams->memmap[VIRT_SMMU].size;
@@ -1213,7 +1213,7 @@ static void create_pcie(VirtMachineState *vms)
     hwaddr base_ecam, size_ecam;
     hwaddr base = base_mmio;
     int nr_pcie_buses;
-    int irq = vms->irqmap[VIRT_PCIE];
+    int irq = ams->irqmap[VIRT_PCIE];
     MemoryRegion *mmio_alias;
     MemoryRegion *mmio_reg;
     MemoryRegion *ecam_alias;
@@ -1349,7 +1349,7 @@ static void create_platform_bus(VirtMachineState *vms)
 
     s = SYS_BUS_DEVICE(dev);
     for (i = 0; i < PLATFORM_BUS_NUM_IRQS; i++) {
-        int irq = vms->irqmap[VIRT_PLATFORM_BUS] + i;
+        int irq = ams->irqmap[VIRT_PLATFORM_BUS] + i;
         sysbus_connect_irq(s, i, qdev_get_gpio_in(vms->gic, irq));
     }
 
@@ -1440,7 +1440,7 @@ void virt_machine_done(Notifier *notifier, void *data)
         platform_bus_add_all_fdt_nodes(ams->fdt, "/intc",
                                        ams->memmap[VIRT_PLATFORM_BUS].base,
                                        ams->memmap[VIRT_PLATFORM_BUS].size,
-                                       vms->irqmap[VIRT_PLATFORM_BUS]);
+                                       ams->irqmap[VIRT_PLATFORM_BUS]);
     }
     if (arm_load_dtb(info->dtb_start, info, info->dtb_limit, as, ms) < 0) {
         exit(1);
@@ -2084,6 +2084,7 @@ static void virt_instance_init(Object *obj)
 {
     VirtMachineState *vms = VIRT_MACHINE(obj);
     VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
+    ArmMachineState *ams = ARM_MACHINE(vms);
 
     /* EL3 is disabled by default on virt: this makes us consistent
      * between KVM and TCG for this board, and it also allows us to
@@ -2146,7 +2147,7 @@ static void virt_instance_init(Object *obj)
                                     "Valid values are none and smmuv3",
                                     NULL);
 
-    vms->irqmap = a15irqmap;
+    ams->irqmap = a15irqmap;
 
     virt_flash_create(vms);
 }
diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h
index f269668d41..97cb902b6a 100644
--- a/include/hw/arm/arm.h
+++ b/include/hw/arm/arm.h
@@ -88,6 +88,7 @@ typedef struct {
 typedef struct {
     MachineState parent;
     MemMapEntry *memmap;
+    const int *irqmap;
     void *fdt;
     int fdt_size;
 } ArmMachineState;
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 1b460d8d31..4028821a09 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -71,7 +71,6 @@ typedef struct {
     int32_t gic_version;
     VirtIOMMUType iommu;
     struct arm_boot_info bootinfo;
-    const int *irqmap;
     int smp_cpus;
     uint32_t clock_phandle;
     uint32_t gic_phandle;
-- 
2.18.1



  parent reply	other threads:[~2020-02-17  7:44 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-17  7:51 [PATCH RFC 00/16] Implement Microvm for aarch64 architecture Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 01/16] hw/arm/arm: Introduce ArmMachineState and ArmMachineClass Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 02/16] hw/arm: move shared fdt member to ArmMachine Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 03/16] hw/arm: move shared memmap " Xu Yandong
2020-02-17  7:51 ` Xu Yandong [this message]
2020-02-17  7:51 ` [PATCH RFC 05/16] hw/arm: move shared smp_cpus " Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 06/16] hw/arm/virt: split MSI related codes from create_gic Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 07/16] hw/arm/virt: split virt extension " Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 08/16] hw/arm/virt: split secure " Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 09/16] hw/arm: move shared gic member to ArmMachine Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 10/16] hw/arm: split create_gic function Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 11/16] hw/arm: move shared psci_enable and claim_edge_triggered_timers member to ArmMachine Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 12/16] hw/arm: move shared devices related functions to arm.c and export them Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 13/16] hw/arm: move shared fdt " Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 14/16] hw/arm: move shared bootinfo member to ArmMachine Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 15/16] hw/arm: move shared cpu related functions to arm.c and export them Xu Yandong
2020-02-17  7:51 ` [PATCH RFC 16/16] hw/arm: Introduce the microvm machine type Xu Yandong
2020-02-17  8:19 ` [PATCH RFC 00/16] Implement Microvm for aarch64 architecture no-reply
2020-02-17  9:56 ` Peter Maydell

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