* [PATCH 1/3] usb/hcd-xhci: Make dma read/writes hooks pci free
2020-03-02 9:35 [PATCH 0/3] Make hcd-xhci independent of pci hooks Sai Pavan Boddu
@ 2020-03-02 9:35 ` Sai Pavan Boddu
2020-03-03 10:11 ` Gerd Hoffmann
2020-03-02 9:35 ` [PATCH 2/3] usb/hcd-xhci: Move qemu-xhci device to hcd-xhci-pci.c Sai Pavan Boddu
2020-03-02 9:35 ` [PATCH 3/3] usb/hcd-xhci: Split pci wrapper for xhci base model Sai Pavan Boddu
2 siblings, 1 reply; 7+ messages in thread
From: Sai Pavan Boddu @ 2020-03-02 9:35 UTC (permalink / raw)
To: Gerd Hoffmann, Paolo Bonzini, Yang Zhong, Richard Henderson,
Thomas Huth, Anthony Liguori, Philippe Mathieu-Daudé,
Stefan Weil, Gonglei, Edgar E . Iglesias, Vikram Garhwal
Cc: qemu-devel
This patch starts making the hcd-xhci.c pci free, as part of this
restructuring dma read/writes are handled without passing pci object.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
---
hw/usb/hcd-xhci.c | 23 ++++++++++-------------
hw/usb/hcd-xhci.h | 3 +++
2 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
index b330e36..6e88670 100644
--- a/hw/usb/hcd-xhci.c
+++ b/hw/usb/hcd-xhci.c
@@ -495,7 +495,7 @@ static inline void xhci_dma_read_u32s(XHCIState *xhci, dma_addr_t addr,
assert((len % sizeof(uint32_t)) == 0);
- pci_dma_read(PCI_DEVICE(xhci), addr, buf, len);
+ dma_memory_read(xhci->as, addr, buf, len);
for (i = 0; i < (len / sizeof(uint32_t)); i++) {
buf[i] = le32_to_cpu(buf[i]);
@@ -515,7 +515,7 @@ static inline void xhci_dma_write_u32s(XHCIState *xhci, dma_addr_t addr,
for (i = 0; i < n; i++) {
tmp[i] = cpu_to_le32(buf[i]);
}
- pci_dma_write(PCI_DEVICE(xhci), addr, tmp, len);
+ dma_memory_write(xhci->as, addr, tmp, len);
}
static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport)
@@ -644,7 +644,6 @@ static void xhci_die(XHCIState *xhci)
static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v)
{
- PCIDevice *pci_dev = PCI_DEVICE(xhci);
XHCIInterrupter *intr = &xhci->intr[v];
XHCITRB ev_trb;
dma_addr_t addr;
@@ -663,7 +662,7 @@ static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v)
ev_trb.status, ev_trb.control);
addr = intr->er_start + TRB_SIZE*intr->er_ep_idx;
- pci_dma_write(pci_dev, addr, &ev_trb, TRB_SIZE);
+ dma_memory_write(xhci->as, addr, &ev_trb, TRB_SIZE);
intr->er_ep_idx++;
if (intr->er_ep_idx >= intr->er_size) {
@@ -720,12 +719,11 @@ static void xhci_ring_init(XHCIState *xhci, XHCIRing *ring,
static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb,
dma_addr_t *addr)
{
- PCIDevice *pci_dev = PCI_DEVICE(xhci);
uint32_t link_cnt = 0;
while (1) {
TRBType type;
- pci_dma_read(pci_dev, ring->dequeue, trb, TRB_SIZE);
+ dma_memory_read(xhci->as, ring->dequeue, trb, TRB_SIZE);
trb->addr = ring->dequeue;
trb->ccs = ring->ccs;
le64_to_cpus(&trb->parameter);
@@ -762,7 +760,6 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb,
static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring)
{
- PCIDevice *pci_dev = PCI_DEVICE(xhci);
XHCITRB trb;
int length = 0;
dma_addr_t dequeue = ring->dequeue;
@@ -773,7 +770,7 @@ static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring)
while (1) {
TRBType type;
- pci_dma_read(pci_dev, dequeue, &trb, TRB_SIZE);
+ dma_memory_read(xhci->as, dequeue, &trb, TRB_SIZE);
le64_to_cpus(&trb.parameter);
le32_to_cpus(&trb.status);
le32_to_cpus(&trb.control);
@@ -828,7 +825,7 @@ static void xhci_er_reset(XHCIState *xhci, int v)
xhci_die(xhci);
return;
}
- pci_dma_read(PCI_DEVICE(xhci), erstba, &seg, sizeof(seg));
+ dma_memory_read(xhci->as, erstba, &seg, sizeof(seg));
le32_to_cpus(&seg.addr_low);
le32_to_cpus(&seg.addr_high);
le32_to_cpus(&seg.size);
@@ -1440,7 +1437,7 @@ static int xhci_xfer_create_sgl(XHCITransfer *xfer, int in_xfer)
int i;
xfer->int_req = false;
- pci_dma_sglist_init(&xfer->sgl, PCI_DEVICE(xhci), xfer->trb_count);
+ qemu_sglist_init(&xfer->sgl, DEVICE(xhci), xfer->trb_count, xhci->as);
for (i = 0; i < xfer->trb_count; i++) {
XHCITRB *trb = &xfer->trbs[i];
dma_addr_t addr;
@@ -2101,7 +2098,7 @@ static TRBCCode xhci_address_slot(XHCIState *xhci, unsigned int slotid,
assert(slotid >= 1 && slotid <= xhci->numslots);
dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high);
- poctx = ldq_le_pci_dma(PCI_DEVICE(xhci), dcbaap + 8 * slotid);
+ poctx = ldq_le_dma(xhci->as, dcbaap + 8 * slotid);
ictx = xhci_mask64(pictx);
octx = xhci_mask64(poctx);
@@ -2439,7 +2436,7 @@ static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx)
/* TODO: actually implement real values here */
bw_ctx[0] = 0;
memset(&bw_ctx[1], 80, xhci->numports); /* 80% */
- pci_dma_write(PCI_DEVICE(xhci), ctx, bw_ctx, sizeof(bw_ctx));
+ dma_memory_write(xhci->as, ctx, bw_ctx, sizeof(bw_ctx));
return CC_SUCCESS;
}
@@ -3531,7 +3528,7 @@ static int usb_xhci_post_load(void *opaque, int version_id)
continue;
}
slot->ctx =
- xhci_mask64(ldq_le_pci_dma(pci_dev, dcbaap + 8 * slotid));
+ xhci_mask64(ldq_le_dma(xhci->as, dcbaap + 8 * slotid));
xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx));
slot->uport = xhci_lookup_uport(xhci, slot_ctx);
if (!slot->uport) {
diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h
index 2fad4df..18bed7e 100644
--- a/hw/usb/hcd-xhci.h
+++ b/hw/usb/hcd-xhci.h
@@ -22,6 +22,8 @@
#ifndef HW_USB_HCD_XHCI_H
#define HW_USB_HCD_XHCI_H
+#include "sysemu/dma.h"
+
#define TYPE_XHCI "base-xhci"
#define TYPE_NEC_XHCI "nec-usb-xhci"
#define TYPE_QEMU_XHCI "qemu-xhci"
@@ -189,6 +191,7 @@ struct XHCIState {
USBBus bus;
MemoryRegion mem;
+ AddressSpace *as;
MemoryRegion mem_cap;
MemoryRegion mem_oper;
MemoryRegion mem_runtime;
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/3] usb/hcd-xhci: Split pci wrapper for xhci base model
2020-03-02 9:35 [PATCH 0/3] Make hcd-xhci independent of pci hooks Sai Pavan Boddu
2020-03-02 9:35 ` [PATCH 1/3] usb/hcd-xhci: Make dma read/writes hooks pci free Sai Pavan Boddu
2020-03-02 9:35 ` [PATCH 2/3] usb/hcd-xhci: Move qemu-xhci device to hcd-xhci-pci.c Sai Pavan Boddu
@ 2020-03-02 9:35 ` Sai Pavan Boddu
2020-03-03 10:14 ` Gerd Hoffmann
2020-03-03 10:27 ` Gerd Hoffmann
2 siblings, 2 replies; 7+ messages in thread
From: Sai Pavan Boddu @ 2020-03-02 9:35 UTC (permalink / raw)
To: Gerd Hoffmann, Paolo Bonzini, Yang Zhong, Richard Henderson,
Thomas Huth, Anthony Liguori, Philippe Mathieu-Daudé,
Stefan Weil, Gonglei, Edgar E . Iglesias, Vikram Garhwal
Cc: qemu-devel
This patch sets the base to use xhci as sysbus model, for which pci
specific hooks are moved to hcd-xhci-pci.c. As a part of this requirment
msi/msix interrupts handling is moved under XHCIPCIState. Made required
changes for qemu-xhci-nec.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
---
hw/usb/Kconfig | 6 ++
hw/usb/Makefile.objs | 1 +
hw/usb/hcd-xhci-nec.c | 8 +--
hw/usb/hcd-xhci-pci.c | 192 ++++++++++++++++++++++++++++++++++++++++++++++++--
hw/usb/hcd-xhci-pci.h | 47 ++++++++++++
hw/usb/hcd-xhci.c | 167 +++++++------------------------------------
hw/usb/hcd-xhci.h | 12 ++--
7 files changed, 275 insertions(+), 158 deletions(-)
create mode 100644 hw/usb/hcd-xhci-pci.h
diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig
index 5e70ed5..e93541e 100644
--- a/hw/usb/Kconfig
+++ b/hw/usb/Kconfig
@@ -36,6 +36,12 @@ config USB_XHCI
depends on PCI
select USB
+config USB_XHCI_PCI
+ bool
+ default y if PCI_DEVICES
+ depends on PCI
+ select USB_XHCI
+
config USB_XHCI_NEC
bool
default y if PCI_DEVICES
diff --git a/hw/usb/Makefile.objs b/hw/usb/Makefile.objs
index 2b10868..ff150fe 100644
--- a/hw/usb/Makefile.objs
+++ b/hw/usb/Makefile.objs
@@ -11,6 +11,7 @@ common-obj-$(CONFIG_USB_EHCI_PCI) += hcd-ehci-pci.o
common-obj-$(CONFIG_USB_EHCI_SYSBUS) += hcd-ehci-sysbus.o
common-obj-$(CONFIG_USB_XHCI) += hcd-xhci.o
common-obj-$(CONFIG_USB_XHCI_NEC) += hcd-xhci-nec.o
+common-obj-$(CONFIG_USB_XHCI_PCI) += hcd-xhci-pci.o
common-obj-$(CONFIG_USB_MUSB) += hcd-musb.o
common-obj-$(CONFIG_TUSB6010) += tusb6010.o
diff --git a/hw/usb/hcd-xhci-nec.c b/hw/usb/hcd-xhci-nec.c
index e6a5a22..e1a29bf 100644
--- a/hw/usb/hcd-xhci-nec.c
+++ b/hw/usb/hcd-xhci-nec.c
@@ -25,11 +25,11 @@
#include "hw/pci/pci.h"
#include "hw/qdev-properties.h"
-#include "hcd-xhci.h"
+#include "hcd-xhci-pci.h"
static Property nec_xhci_properties[] = {
- DEFINE_PROP_ON_OFF_AUTO("msi", XHCIState, msi, ON_OFF_AUTO_AUTO),
- DEFINE_PROP_ON_OFF_AUTO("msix", XHCIState, msix, ON_OFF_AUTO_AUTO),
+ DEFINE_PROP_ON_OFF_AUTO("msi", XHCIPciState, msi, ON_OFF_AUTO_AUTO),
+ DEFINE_PROP_ON_OFF_AUTO("msix", XHCIPciState, msix, ON_OFF_AUTO_AUTO),
DEFINE_PROP_BIT("superspeed-ports-first",
XHCIState, flags, XHCI_FLAG_SS_FIRST, true),
DEFINE_PROP_BIT("force-pcie-endcap", XHCIState, flags,
@@ -52,7 +52,7 @@ static void nec_xhci_class_init(ObjectClass *klass, void *data)
static const TypeInfo nec_xhci_info = {
.name = TYPE_NEC_XHCI,
- .parent = TYPE_XHCI,
+ .parent = TYPE_XHCI_PCI,
.class_init = nec_xhci_class_init,
};
diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c
index 26af683..fb51ddf 100644
--- a/hw/usb/hcd-xhci-pci.c
+++ b/hw/usb/hcd-xhci-pci.c
@@ -23,12 +23,192 @@
#include "qemu/osdep.h"
#include "hw/pci/pci.h"
#include "hw/qdev-properties.h"
+#include "migration/vmstate.h"
#include "hw/pci/msi.h"
#include "hw/pci/msix.h"
-#include "hcd-xhci.h"
+#include "hcd-xhci-pci.h"
#include "trace.h"
#include "qapi/error.h"
+#define OFF_MSIX_TABLE 0x3000
+#define OFF_MSIX_PBA 0x3800
+
+static void xhci_pci_intr_update(void *opaque, int n, bool enable)
+{
+ XHCIPciState *s = XHCI_PCI(opaque);
+ PCIDevice *pci_dev = PCI_DEVICE(opaque);
+
+ if (!msix_enabled(pci_dev)) {
+ return;
+ }
+ if (enable == !!s->msix_used[n]) {
+ return;
+ }
+ if (enable) {
+ trace_usb_xhci_irq_msix_use(n);
+ msix_vector_use(pci_dev, n);
+ s->msix_used[n] = 1;
+ } else {
+ trace_usb_xhci_irq_msix_unuse(n);
+ msix_vector_unuse(pci_dev, n);
+ s->msix_used[n] = 0;
+ }
+}
+
+static void xhci_pci_intr_raise(void *opaque, int n, bool level)
+{
+ PCIDevice *pci_dev = PCI_DEVICE(opaque);
+
+ if (n == 0 &&
+ !(msix_enabled(pci_dev) ||
+ msi_enabled(pci_dev))) {
+ pci_set_irq(pci_dev, level);
+ }
+ if (msix_enabled(pci_dev)) {
+ msix_notify(pci_dev, n);
+ return;
+ }
+
+ if (msi_enabled(pci_dev)) {
+ msi_notify(pci_dev, n);
+ return;
+ }
+}
+
+static void xhci_pci_reset(DeviceState *dev)
+{
+ XHCIPciState *s = XHCI_PCI(dev);
+
+ device_legacy_reset(DEVICE(s->xhci));
+}
+
+static void usb_xhci_pci_realize(struct PCIDevice *dev, Error **errp)
+{
+ int ret;
+ Error *err = NULL;
+ XHCIPciState *s = XHCI_PCI(dev);
+ DeviceState *xhci_dev = DEVICE(s->xhci);
+
+ dev->config[PCI_CLASS_PROG] = 0x30; /* xHCI */
+ dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */
+ dev->config[PCI_CACHE_LINE_SIZE] = 0x10;
+ dev->config[0x60] = 0x30; /* release number */
+
+ qdev_prop_set_bit(xhci_dev, "streams", s->enable_streams);
+ qdev_prop_set_uint32(xhci_dev, "p2", s->numports_2);
+ qdev_prop_set_uint32(xhci_dev, "p3", s->numports_3);
+ object_property_set_link(OBJECT(xhci_dev), OBJECT(s), "host", NULL);
+ qdev_init_nofail(xhci_dev);
+ s->xhci = XHCI(xhci_dev);
+ s->xhci->intr_update = xhci_pci_intr_update;
+ s->xhci->intr_raise = xhci_pci_intr_raise;
+
+ if (s->msi != ON_OFF_AUTO_OFF) {
+ ret = msi_init(dev, 0x70, s->xhci->numintrs, true, false, &err);
+ /*
+ * Any error other than -ENOTSUP(board's MSI support is broken)
+ * is a programming error
+ */
+ assert(!ret || ret == -ENOTSUP);
+ if (ret && s->msi == ON_OFF_AUTO_ON) {
+ /* Can't satisfy user's explicit msi=on request, fail */
+ error_append_hint(&err, "You have to use msi=auto (default) or "
+ "msi=off with this machine type.\n");
+ error_propagate(errp, err);
+ return;
+ }
+ assert(!err || s->msi == ON_OFF_AUTO_AUTO);
+ /* With msi=auto, we fall back to MSI off silently */
+ error_free(err);
+ }
+ pci_register_bar(dev, 0,
+ PCI_BASE_ADDRESS_SPACE_MEMORY |
+ PCI_BASE_ADDRESS_MEM_TYPE_64,
+ &s->xhci->mem);
+
+ if (pci_bus_is_express(pci_get_bus(dev)) ||
+ xhci_get_flag(s->xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) {
+ ret = pcie_endpoint_cap_init(dev, 0xa0);
+ assert(ret > 0);
+ }
+
+ if (s->msix != ON_OFF_AUTO_OFF) {
+ /* TODO check for errors, and should fail when msix=on */
+ msix_init(dev, s->xhci->numintrs,
+ &s->xhci->mem, 0, OFF_MSIX_TABLE,
+ &s->xhci->mem, 0, OFF_MSIX_PBA,
+ 0x90, NULL);
+ }
+ s->xhci->as = pci_get_address_space(dev);
+}
+
+static void usb_xhci_pci_exit(PCIDevice *dev)
+{
+ XHCIPciState *s = XHCI_PCI(dev);
+ /* destroy msix memory region */
+ if (dev->msix_table && dev->msix_pba
+ && dev->msix_entry_used) {
+ msix_uninit(dev, &s->xhci->mem, &s->xhci->mem);
+ }
+}
+
+static Property xhci_pci_properties[] = {
+ DEFINE_PROP_BOOL("streams", XHCIPciState, enable_streams, true),
+ DEFINE_PROP_UINT32("p2", XHCIPciState, numports_2, 4),
+ DEFINE_PROP_UINT32("p3", XHCIPciState, numports_3, 4),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static const VMStateDescription vmstate_xhci_pci = {
+ .name = "xhci-pci",
+ .version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_PCI_DEVICE(parent_obj, XHCIPciState),
+ VMSTATE_MSIX(parent_obj, XHCIPciState),
+ VMSTATE_UINT8_ARRAY(msix_used, XHCIPciState, MAXINTRS),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static void xhci_instance_init(Object *obj)
+{
+ XHCIPciState *s = XHCI_PCI(obj);
+ /*
+ * QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command
+ * line, therefore, no need to wait to realize like other devices
+ */
+ PCI_DEVICE(obj)->cap_present |= QEMU_PCI_CAP_EXPRESS;
+ s->xhci = XHCI(object_new(TYPE_XHCI));
+}
+
+static void xhci_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ device_class_set_props(dc, xhci_pci_properties);
+ dc->reset = xhci_pci_reset;
+ dc->vmsd = &vmstate_xhci_pci;
+ set_bit(DEVICE_CATEGORY_USB, dc->categories);
+ k->realize = usb_xhci_pci_realize;
+ k->exit = usb_xhci_pci_exit;
+ k->class_id = PCI_CLASS_SERIAL_USB;
+}
+
+static const TypeInfo xhci_pci_info = {
+ .name = TYPE_XHCI_PCI,
+ .parent = TYPE_PCI_DEVICE,
+ .instance_size = sizeof(XHCIPciState),
+ .class_init = xhci_class_init,
+ .instance_init = xhci_instance_init,
+ .abstract = true,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_PCIE_DEVICE },
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { }
+ },
+};
+
static void qemu_xhci_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
@@ -40,10 +220,11 @@ static void qemu_xhci_class_init(ObjectClass *klass, void *data)
static void qemu_xhci_instance_init(Object *obj)
{
- XHCIState *xhci = XHCI(obj);
+ XHCIPciState *s = XHCI_PCI(obj);
+ XHCIState *xhci = s->xhci;
- xhci->msi = ON_OFF_AUTO_OFF;
- xhci->msix = ON_OFF_AUTO_AUTO;
+ s->msi = ON_OFF_AUTO_OFF;
+ s->msix = ON_OFF_AUTO_AUTO;
xhci->numintrs = MAXINTRS;
xhci->numslots = MAXSLOTS;
xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST);
@@ -51,13 +232,14 @@ static void qemu_xhci_instance_init(Object *obj)
static const TypeInfo qemu_xhci_info = {
.name = TYPE_QEMU_XHCI,
- .parent = TYPE_XHCI,
+ .parent = TYPE_XHCI_PCI,
.class_init = qemu_xhci_class_init,
.instance_init = qemu_xhci_instance_init,
};
static void xhci_register_types(void)
{
+ type_register_static(&xhci_pci_info);
type_register_static(&qemu_xhci_info);
}
diff --git a/hw/usb/hcd-xhci-pci.h b/hw/usb/hcd-xhci-pci.h
new file mode 100644
index 0000000..da452a7
--- /dev/null
+++ b/hw/usb/hcd-xhci-pci.h
@@ -0,0 +1,47 @@
+/*
+ * USB xHCI controller emulation
+ *
+ * Copyright (c) 2011 Securiforest
+ * Date: 2011-05-11 ; Author: Hector Martin <hector@marcansoft.com>
+ * Based on usb-ohci.c, emulates Renesas NEC USB 3.0
+ * Date: 2020-01-1; Author: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
+ * PCI hooks are moved from XHCIState to XHCIPciState
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HW_USB_HCD_XHCI_PCI_H
+#define HW_USB_HCD_XHCI_PCI_H
+
+#include "hw/usb.h"
+#include "hcd-xhci.h"
+
+#define TYPE_XHCI_PCI "pci-xhci"
+#define XHCI_PCI(obj) \
+ OBJECT_CHECK(XHCIPciState, (obj), TYPE_XHCI_PCI)
+
+
+typedef struct XHCIPciState {
+ /*< private >*/
+ PCIDevice parent_obj;
+ /*< public >*/
+ XHCIState *xhci;
+ OnOffAuto msi;
+ OnOffAuto msix;
+ uint8_t msix_used[MAXINTRS];
+ bool enable_streams;
+ uint32_t numports_2, numports_3;
+} XHCIPciState;
+
+#endif
diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
index ba07ca2..1daac96 100644
--- a/hw/usb/hcd-xhci.c
+++ b/hw/usb/hcd-xhci.c
@@ -25,10 +25,7 @@
#include "qemu/queue.h"
#include "hw/usb.h"
#include "migration/vmstate.h"
-#include "hw/pci/pci.h"
#include "hw/qdev-properties.h"
-#include "hw/pci/msi.h"
-#include "hw/pci/msix.h"
#include "trace.h"
#include "qapi/error.h"
@@ -57,8 +54,6 @@
#define OFF_OPER LEN_CAP
#define OFF_RUNTIME 0x1000
#define OFF_DOORBELL 0x2000
-#define OFF_MSIX_TABLE 0x3000
-#define OFF_MSIX_PBA 0x3800
/* must be power of 2 */
#define LEN_REGS 0x4000
@@ -548,54 +543,25 @@ static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport)
return &xhci->ports[index];
}
-static void xhci_intx_update(XHCIState *xhci)
+static void xhci_intr_update(XHCIState *xhci, int v)
{
- PCIDevice *pci_dev = PCI_DEVICE(xhci);
int level = 0;
- if (msix_enabled(pci_dev) ||
- msi_enabled(pci_dev)) {
- return;
- }
-
- if (xhci->intr[0].iman & IMAN_IP &&
- xhci->intr[0].iman & IMAN_IE &&
- xhci->usbcmd & USBCMD_INTE) {
- level = 1;
- }
-
- trace_usb_xhci_irq_intx(level);
- pci_set_irq(pci_dev, level);
-}
-
-static void xhci_msix_update(XHCIState *xhci, int v)
-{
- PCIDevice *pci_dev = PCI_DEVICE(xhci);
- bool enabled;
-
- if (!msix_enabled(pci_dev)) {
- return;
- }
-
- enabled = xhci->intr[v].iman & IMAN_IE;
- if (enabled == xhci->intr[v].msix_used) {
- return;
+ if (v == 0) {
+ if (xhci->intr[0].iman & IMAN_IP &&
+ xhci->intr[0].iman & IMAN_IE &&
+ xhci->usbcmd & USBCMD_INTE) {
+ level = 1;
+ }
+ xhci->intr_raise(xhci->hostOpaque, 0, level);
}
- if (enabled) {
- trace_usb_xhci_irq_msix_use(v);
- msix_vector_use(pci_dev, v);
- xhci->intr[v].msix_used = true;
- } else {
- trace_usb_xhci_irq_msix_unuse(v);
- msix_vector_unuse(pci_dev, v);
- xhci->intr[v].msix_used = false;
- }
+ xhci->intr_update(xhci->hostOpaque, v,
+ xhci->intr[v].iman & IMAN_IE);
}
static void xhci_intr_raise(XHCIState *xhci, int v)
{
- PCIDevice *pci_dev = PCI_DEVICE(xhci);
bool pending = (xhci->intr[v].erdp_low & ERDP_EHB);
xhci->intr[v].erdp_low |= ERDP_EHB;
@@ -613,22 +579,7 @@ static void xhci_intr_raise(XHCIState *xhci, int v)
return;
}
- if (msix_enabled(pci_dev)) {
- trace_usb_xhci_irq_msix(v);
- msix_notify(pci_dev, v);
- return;
- }
-
- if (msi_enabled(pci_dev)) {
- trace_usb_xhci_irq_msi(v);
- msi_notify(pci_dev, v);
- return;
- }
-
- if (v == 0) {
- trace_usb_xhci_irq_intx(1);
- pci_irq_assert(pci_dev);
- }
+ xhci->intr_raise(xhci->hostOpaque, v, true);
}
static inline int xhci_running(XHCIState *xhci)
@@ -2715,7 +2666,6 @@ static void xhci_reset(DeviceState *dev)
xhci->intr[i].erstba_high = 0;
xhci->intr[i].erdp_low = 0;
xhci->intr[i].erdp_high = 0;
- xhci->intr[i].msix_used = 0;
xhci->intr[i].er_ep_idx = 0;
xhci->intr[i].er_pcs = 1;
@@ -2962,13 +2912,13 @@ static void xhci_oper_write(void *ptr, hwaddr reg,
if (val & USBCMD_HCRST) {
xhci_reset(d);
}
- xhci_intx_update(xhci);
+ xhci_intr_update(xhci, 0);
break;
case 0x04: /* USBSTS */
/* these bits are write-1-to-clear */
xhci->usbsts &= ~(val & (USBSTS_HSE|USBSTS_EINT|USBSTS_PCD|USBSTS_SRE));
- xhci_intx_update(xhci);
+ xhci_intr_update(xhci, 0);
break;
case 0x14: /* DNCTRL */
@@ -3071,10 +3021,7 @@ static void xhci_runtime_write(void *ptr, hwaddr reg,
}
intr->iman &= ~IMAN_IE;
intr->iman |= val & IMAN_IE;
- if (v == 0) {
- xhci_intx_update(xhci);
- }
- xhci_msix_update(xhci, v);
+ xhci_intr_update(xhci, v);
break;
case 0x04: /* IMOD */
intr->imod = val;
@@ -3319,7 +3266,6 @@ static USBBusOps xhci_bus_ops = {
static void usb_xhci_init(XHCIState *xhci)
{
- DeviceState *dev = DEVICE(xhci);
XHCIPort *port;
unsigned int i, usbports, speedmask;
@@ -3334,7 +3280,7 @@ static void usb_xhci_init(XHCIState *xhci)
usbports = MAX(xhci->numports_2, xhci->numports_3);
xhci->numports = xhci->numports_2 + xhci->numports_3;
- usb_bus_new(&xhci->bus, sizeof(xhci->bus), &xhci_bus_ops, dev);
+ usb_bus_new(&xhci->bus, sizeof(xhci->bus), &xhci_bus_ops, xhci->hostOpaque);
for (i = 0; i < usbports; i++) {
speedmask = 0;
@@ -3374,18 +3320,12 @@ static void usb_xhci_init(XHCIState *xhci)
}
}
-static void usb_xhci_realize(struct PCIDevice *dev, Error **errp)
+static void usb_xhci_realize(DeviceState *dev, Error **errp)
{
- int i, ret;
- Error *err = NULL;
+ int i;
XHCIState *xhci = XHCI(dev);
- dev->config[PCI_CLASS_PROG] = 0x30; /* xHCI */
- dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */
- dev->config[PCI_CACHE_LINE_SIZE] = 0x10;
- dev->config[0x60] = 0x30; /* release number */
-
if (strcmp(object_get_typename(OBJECT(dev)), TYPE_NEC_XHCI) == 0) {
xhci->nec_quirks = true;
}
@@ -3410,23 +3350,6 @@ static void usb_xhci_realize(struct PCIDevice *dev, Error **errp)
xhci->max_pstreams_mask = 0;
}
- if (xhci->msi != ON_OFF_AUTO_OFF) {
- ret = msi_init(dev, 0x70, xhci->numintrs, true, false, &err);
- /* Any error other than -ENOTSUP(board's MSI support is broken)
- * is a programming error */
- assert(!ret || ret == -ENOTSUP);
- if (ret && xhci->msi == ON_OFF_AUTO_ON) {
- /* Can't satisfy user's explicit msi=on request, fail */
- error_append_hint(&err, "You have to use msi=auto (default) or "
- "msi=off with this machine type.\n");
- error_propagate(errp, err);
- return;
- }
- assert(!err || xhci->msi == ON_OFF_AUTO_AUTO);
- /* With msi=auto, we fall back to MSI off silently */
- error_free(err);
- }
-
usb_xhci_init(xhci);
xhci->mfwrap_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_timer, xhci);
@@ -3453,27 +3376,9 @@ static void usb_xhci_realize(struct PCIDevice *dev, Error **errp)
port->name, 0x10);
memory_region_add_subregion(&xhci->mem, offset, &port->mem);
}
-
- pci_register_bar(dev, 0,
- PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64,
- &xhci->mem);
-
- if (pci_bus_is_express(pci_get_bus(dev)) ||
- xhci_get_flag(xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) {
- ret = pcie_endpoint_cap_init(dev, 0xa0);
- assert(ret > 0);
- }
-
- if (xhci->msix != ON_OFF_AUTO_OFF) {
- /* TODO check for errors, and should fail when msix=on */
- msix_init(dev, xhci->numintrs,
- &xhci->mem, 0, OFF_MSIX_TABLE,
- &xhci->mem, 0, OFF_MSIX_PBA,
- 0x90, NULL);
- }
}
-static void usb_xhci_exit(PCIDevice *dev)
+static void usb_xhci_unrealize(DeviceState *dev, Error **errp)
{
int i;
XHCIState *xhci = XHCI(dev);
@@ -3500,19 +3405,12 @@ static void usb_xhci_exit(PCIDevice *dev)
memory_region_del_subregion(&xhci->mem, &port->mem);
}
- /* destroy msix memory region */
- if (dev->msix_table && dev->msix_pba
- && dev->msix_entry_used) {
- msix_uninit(dev, &xhci->mem, &xhci->mem);
- }
-
usb_bus_release(&xhci->bus);
}
static int usb_xhci_post_load(void *opaque, int version_id)
{
XHCIState *xhci = opaque;
- PCIDevice *pci_dev = PCI_DEVICE(xhci);
XHCISlot *slot;
XHCIEPContext *epctx;
dma_addr_t dcbaap, pctx;
@@ -3558,11 +3456,7 @@ static int usb_xhci_post_load(void *opaque, int version_id)
}
for (intr = 0; intr < xhci->numintrs; intr++) {
- if (xhci->intr[intr].msix_used) {
- msix_vector_use(pci_dev, intr);
- } else {
- msix_vector_unuse(pci_dev, intr);
- }
+ xhci_intr_update(xhci, intr);
}
return 0;
@@ -3631,7 +3525,6 @@ static const VMStateDescription vmstate_xhci_intr = {
VMSTATE_UINT32(erdp_high, XHCIInterrupter),
/* state */
- VMSTATE_BOOL(msix_used, XHCIInterrupter),
VMSTATE_BOOL(er_pcs, XHCIInterrupter),
VMSTATE_UINT64(er_start, XHCIInterrupter),
VMSTATE_UINT32(er_size, XHCIInterrupter),
@@ -3654,9 +3547,6 @@ static const VMStateDescription vmstate_xhci = {
.version_id = 1,
.post_load = usb_xhci_post_load,
.fields = (VMStateField[]) {
- VMSTATE_PCI_DEVICE(parent_obj, XHCIState),
- VMSTATE_MSIX(parent_obj, XHCIState),
-
VMSTATE_STRUCT_VARRAY_UINT32(ports, XHCIState, numports, 1,
vmstate_xhci_port, XHCIPort),
VMSTATE_STRUCT_VARRAY_UINT32(slots, XHCIState, numslots, 1,
@@ -3688,34 +3578,27 @@ static Property xhci_properties[] = {
XHCI_FLAG_ENABLE_STREAMS, true),
DEFINE_PROP_UINT32("p2", XHCIState, numports_2, 4),
DEFINE_PROP_UINT32("p3", XHCIState, numports_3, 4),
+ DEFINE_PROP_LINK("host", XHCIState, hostOpaque, TYPE_DEVICE,
+ DeviceState *),
DEFINE_PROP_END_OF_LIST(),
};
static void xhci_class_init(ObjectClass *klass, void *data)
{
- PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->realize = usb_xhci_realize;
+ dc->unrealize = usb_xhci_unrealize;
+ dc->reset = xhci_reset;
dc->vmsd = &vmstate_xhci;
device_class_set_props(dc, xhci_properties);
- dc->reset = xhci_reset;
- set_bit(DEVICE_CATEGORY_USB, dc->categories);
- k->realize = usb_xhci_realize;
- k->exit = usb_xhci_exit;
- k->class_id = PCI_CLASS_SERIAL_USB;
}
static const TypeInfo xhci_info = {
.name = TYPE_XHCI,
- .parent = TYPE_PCI_DEVICE,
+ .parent = TYPE_DEVICE,
.instance_size = sizeof(XHCIState),
.class_init = xhci_class_init,
- .abstract = true,
- .interfaces = (InterfaceInfo[]) {
- { INTERFACE_PCIE_DEVICE },
- { INTERFACE_CONVENTIONAL_PCI_DEVICE },
- { }
- },
};
static void xhci_register_types(void)
diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h
index ca03481..371100a 100644
--- a/hw/usb/hcd-xhci.h
+++ b/hw/usb/hcd-xhci.h
@@ -170,7 +170,7 @@ typedef struct XHCIInterrupter {
uint32_t erdp_low;
uint32_t erdp_high;
- bool msix_used, er_pcs;
+ bool er_pcs;
dma_addr_t er_start;
uint32_t er_size;
@@ -185,10 +185,7 @@ typedef struct XHCIInterrupter {
} XHCIInterrupter;
struct XHCIState {
- /*< private >*/
- PCIDevice parent_obj;
- /*< public >*/
-
+ DeviceState parent;
USBBus bus;
MemoryRegion mem;
AddressSpace *as;
@@ -204,8 +201,9 @@ struct XHCIState {
uint32_t numslots;
uint32_t flags;
uint32_t max_pstreams_mask;
- OnOffAuto msi;
- OnOffAuto msix;
+ void (*intr_update)(void *opaque, int n, bool enable);
+ void (*intr_raise)(void *opaque, int n, bool level);
+ DeviceState *hostOpaque;
/* Operational Registers */
uint32_t usbcmd;
--
2.7.4
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