From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Felipe Franciosi <felipe@nutanix.com>
Subject: [PULL 20/61] qom/object: Use common get/set uint helpers
Date: Mon, 16 Mar 2020 22:26:47 +0100 [thread overview]
Message-ID: <1584394048-44994-21-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1584394048-44994-1-git-send-email-pbonzini@redhat.com>
From: Felipe Franciosi <felipe@nutanix.com>
Several objects implemented their own uint property getters and setters,
despite them being straightforward (without any checks/validations on
the values themselves) and identical across objects. This makes use of
an enhanced API for object_property_add_uintXX_ptr() which offers
default setters.
Some of these setters used to update the value even if the type visit
failed (eg. because the value being set overflowed over the given type).
The new setter introduces a check for these errors, not updating the
value if an error occurred. The error is propagated.
Signed-off-by: Felipe Franciosi <felipe@nutanix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/acpi/ich9.c | 95 +++++-------------------------------------------
hw/isa/lpc_ich9.c | 12 ++-----
hw/misc/edu.c | 13 ++-----
hw/pci-host/q35.c | 14 ++------
hw/ppc/spapr.c | 36 ++++---------------
memory.c | 15 ++------
target/arm/cpu.c | 22 ++----------
target/i386/sev.c | 106 +++++-------------------------------------------------
8 files changed, 37 insertions(+), 276 deletions(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 67fe05a..336cace 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -357,81 +357,6 @@ static void ich9_pm_set_cpu_hotplug_legacy(Object *obj, bool value,
s->pm.cpu_hotplug_legacy = value;
}
-static void ich9_pm_get_disable_s3(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- ICH9LPCPMRegs *pm = opaque;
- uint8_t value = pm->disable_s3;
-
- visit_type_uint8(v, name, &value, errp);
-}
-
-static void ich9_pm_set_disable_s3(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- ICH9LPCPMRegs *pm = opaque;
- Error *local_err = NULL;
- uint8_t value;
-
- visit_type_uint8(v, name, &value, &local_err);
- if (local_err) {
- goto out;
- }
- pm->disable_s3 = value;
-out:
- error_propagate(errp, local_err);
-}
-
-static void ich9_pm_get_disable_s4(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- ICH9LPCPMRegs *pm = opaque;
- uint8_t value = pm->disable_s4;
-
- visit_type_uint8(v, name, &value, errp);
-}
-
-static void ich9_pm_set_disable_s4(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- ICH9LPCPMRegs *pm = opaque;
- Error *local_err = NULL;
- uint8_t value;
-
- visit_type_uint8(v, name, &value, &local_err);
- if (local_err) {
- goto out;
- }
- pm->disable_s4 = value;
-out:
- error_propagate(errp, local_err);
-}
-
-static void ich9_pm_get_s4_val(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- ICH9LPCPMRegs *pm = opaque;
- uint8_t value = pm->s4_val;
-
- visit_type_uint8(v, name, &value, errp);
-}
-
-static void ich9_pm_set_s4_val(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- ICH9LPCPMRegs *pm = opaque;
- Error *local_err = NULL;
- uint8_t value;
-
- visit_type_uint8(v, name, &value, &local_err);
- if (local_err) {
- goto out;
- }
- pm->s4_val = value;
-out:
- error_propagate(errp, local_err);
-}
-
static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
{
ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
@@ -468,18 +393,14 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp)
ich9_pm_get_cpu_hotplug_legacy,
ich9_pm_set_cpu_hotplug_legacy,
NULL);
- object_property_add(obj, ACPI_PM_PROP_S3_DISABLED, "uint8",
- ich9_pm_get_disable_s3,
- ich9_pm_set_disable_s3,
- NULL, pm, NULL);
- object_property_add(obj, ACPI_PM_PROP_S4_DISABLED, "uint8",
- ich9_pm_get_disable_s4,
- ich9_pm_set_disable_s4,
- NULL, pm, NULL);
- object_property_add(obj, ACPI_PM_PROP_S4_VAL, "uint8",
- ich9_pm_get_s4_val,
- ich9_pm_set_s4_val,
- NULL, pm, NULL);
+ object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S3_DISABLED,
+ &pm->disable_s3, OBJ_PROP_FLAG_READWRITE,
+ NULL);
+ object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_DISABLED,
+ &pm->disable_s4, OBJ_PROP_FLAG_READWRITE,
+ NULL);
+ object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_VAL,
+ &pm->s4_val, OBJ_PROP_FLAG_READWRITE, NULL);
object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
ich9_pm_get_enable_tco,
ich9_pm_set_enable_tco,
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 3d0f4db..fbc3165 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -625,13 +625,6 @@ static const MemoryRegionOps ich9_rst_cnt_ops = {
.endianness = DEVICE_LITTLE_ENDIAN
};
-static void ich9_lpc_get_sci_int(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- ICH9LPCState *lpc = ICH9_LPC_DEVICE(obj);
- visit_type_uint8(v, name, &lpc->sci_gsi, errp);
-}
-
static void ich9_lpc_initfn(Object *obj)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(obj);
@@ -639,9 +632,8 @@ static void ich9_lpc_initfn(Object *obj)
static const uint8_t acpi_enable_cmd = ICH9_APM_ACPI_ENABLE;
static const uint8_t acpi_disable_cmd = ICH9_APM_ACPI_DISABLE;
- object_property_add(obj, ACPI_PM_PROP_SCI_INT, "uint8",
- ich9_lpc_get_sci_int,
- NULL, NULL, NULL, NULL);
+ object_property_add_uint8_ptr(obj, ACPI_PM_PROP_SCI_INT,
+ &lpc->sci_gsi, OBJ_PROP_FLAG_READ, NULL);
object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_ENABLE_CMD,
&acpi_enable_cmd, OBJ_PROP_FLAG_READ, NULL);
object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_DISABLE_CMD,
diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index d5e2bdb..ff10f5b 100644
--- a/hw/misc/edu.c
+++ b/hw/misc/edu.c
@@ -396,21 +396,14 @@ static void pci_edu_uninit(PCIDevice *pdev)
msi_uninit(pdev);
}
-static void edu_obj_uint64(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- uint64_t *val = opaque;
-
- visit_type_uint64(v, name, val, errp);
-}
-
static void edu_instance_init(Object *obj)
{
EduState *edu = EDU(obj);
edu->dma_mask = (1UL << 28) - 1;
- object_property_add(obj, "dma_mask", "uint64", edu_obj_uint64,
- edu_obj_uint64, NULL, &edu->dma_mask, NULL);
+ object_property_add_uint64_ptr(obj, "dma_mask",
+ &edu->dma_mask, OBJ_PROP_FLAG_READWRITE,
+ NULL);
}
static void edu_class_init(ObjectClass *class, void *data)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 993f467..2bbc90b 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -166,14 +166,6 @@ static void q35_host_get_pci_hole64_end(Object *obj, Visitor *v,
visit_type_uint64(v, name, &value, errp);
}
-static void q35_host_get_mmcfg_size(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- PCIExpressHost *e = PCIE_HOST_BRIDGE(obj);
-
- visit_type_uint64(v, name, &e->size, errp);
-}
-
/*
* NOTE: setting defaults for the mch.* fields in this table
* doesn't work, because mch is a separate QOM object that is
@@ -214,6 +206,7 @@ static void q35_host_initfn(Object *obj)
{
Q35PCIHost *s = Q35_HOST_DEVICE(obj);
PCIHostState *phb = PCI_HOST_BRIDGE(obj);
+ PCIExpressHost *pehb = PCIE_HOST_BRIDGE(obj);
memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb,
"pci-conf-idx", 4);
@@ -243,9 +236,8 @@ static void q35_host_initfn(Object *obj)
q35_host_get_pci_hole64_end,
NULL, NULL, NULL, NULL);
- object_property_add(obj, PCIE_HOST_MCFG_SIZE, "uint64",
- q35_host_get_mmcfg_size,
- NULL, NULL, NULL, NULL);
+ object_property_add_uint64_ptr(obj, PCIE_HOST_MCFG_SIZE,
+ &pehb->size, OBJ_PROP_FLAG_READ, NULL);
object_property_add_link(obj, MCH_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION,
(Object **) &s->mch.ram_memory,
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index cc10798..41c0f24 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3223,30 +3223,6 @@ static void spapr_set_resize_hpt(Object *obj, const char *value, Error **errp)
}
}
-static void spapr_get_vsmt(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- visit_type_uint32(v, name, (uint32_t *)opaque, errp);
-}
-
-static void spapr_set_vsmt(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- visit_type_uint32(v, name, (uint32_t *)opaque, errp);
-}
-
-static void spapr_get_kernel_addr(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- visit_type_uint64(v, name, (uint64_t *)opaque, errp);
-}
-
-static void spapr_set_kernel_addr(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- visit_type_uint64(v, name, (uint64_t *)opaque, errp);
-}
-
static char *spapr_get_ic_mode(Object *obj, Error **errp)
{
SpaprMachineState *spapr = SPAPR_MACHINE(obj);
@@ -3344,17 +3320,19 @@ static void spapr_instance_init(Object *obj)
object_property_set_description(obj, "resize-hpt",
"Resizing of the Hash Page Table (enabled, disabled, required)",
NULL);
- object_property_add(obj, "vsmt", "uint32", spapr_get_vsmt,
- spapr_set_vsmt, NULL, &spapr->vsmt, &error_abort);
+ object_property_add_uint32_ptr(obj, "vsmt",
+ &spapr->vsmt, OBJ_PROP_FLAG_READWRITE,
+ &error_abort);
object_property_set_description(obj, "vsmt",
"Virtual SMT: KVM behaves as if this were"
" the host's SMT mode", &error_abort);
+
object_property_add_bool(obj, "vfio-no-msix-emulation",
spapr_get_msix_emulation, NULL, NULL);
- object_property_add(obj, "kernel-addr", "uint64", spapr_get_kernel_addr,
- spapr_set_kernel_addr, NULL, &spapr->kernel_addr,
- &error_abort);
+ object_property_add_uint64_ptr(obj, "kernel-addr",
+ &spapr->kernel_addr, OBJ_PROP_FLAG_READWRITE,
+ &error_abort);
object_property_set_description(obj, "kernel-addr",
stringify(KERNEL_LOAD_ADDR)
" for -kernel is the default",
diff --git a/memory.c b/memory.c
index 09be40e..404ff4e 100644
--- a/memory.c
+++ b/memory.c
@@ -1170,15 +1170,6 @@ void memory_region_init(MemoryRegion *mr,
memory_region_do_init(mr, owner, name, size);
}
-static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- MemoryRegion *mr = MEMORY_REGION(obj);
- uint64_t value = mr->addr;
-
- visit_type_uint64(v, name, &value, errp);
-}
-
static void memory_region_get_container(Object *obj, Visitor *v,
const char *name, void *opaque,
Error **errp)
@@ -1242,10 +1233,8 @@ static void memory_region_initfn(Object *obj)
NULL, NULL, &error_abort);
op->resolve = memory_region_resolve_container;
- object_property_add(OBJECT(mr), "addr", "uint64",
- memory_region_get_addr,
- NULL, /* memory_region_set_addr */
- NULL, NULL, &error_abort);
+ object_property_add_uint64_ptr(OBJECT(mr), "addr",
+ &mr->addr, OBJ_PROP_FLAG_READ, &error_abort);
object_property_add(OBJECT(mr), "priority", "uint32",
memory_region_get_priority,
NULL, /* memory_region_set_priority */
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 3623ece..7fe3670 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1153,22 +1153,6 @@ static void arm_set_pmu(Object *obj, bool value, Error **errp)
cpu->has_pmu = value;
}
-static void arm_get_init_svtor(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- ARMCPU *cpu = ARM_CPU(obj);
-
- visit_type_uint32(v, name, &cpu->init_svtor, errp);
-}
-
-static void arm_set_init_svtor(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- ARMCPU *cpu = ARM_CPU(obj);
-
- visit_type_uint32(v, name, &cpu->init_svtor, errp);
-}
-
unsigned int gt_cntfrq_period_ns(ARMCPU *cpu)
{
/*
@@ -1288,9 +1272,9 @@ void arm_cpu_post_init(Object *obj)
* a simple DEFINE_PROP_UINT32 for this because we want to permit
* the property to be set after realize.
*/
- object_property_add(obj, "init-svtor", "uint32",
- arm_get_init_svtor, arm_set_init_svtor,
- NULL, NULL, &error_abort);
+ object_property_add_uint32_ptr(obj, "init-svtor",
+ &cpu->init_svtor,
+ OBJ_PROP_FLAG_READWRITE, &error_abort);
}
qdev_property_add_static(DEVICE(obj), &arm_cpu_cfgend_property);
diff --git a/target/i386/sev.c b/target/i386/sev.c
index 024bb24..846018a 100644
--- a/target/i386/sev.c
+++ b/target/i386/sev.c
@@ -267,109 +267,21 @@ qsev_guest_class_init(ObjectClass *oc, void *data)
}
static void
-qsev_guest_set_handle(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- QSevGuestInfo *sev = QSEV_GUEST_INFO(obj);
- uint32_t value;
-
- visit_type_uint32(v, name, &value, errp);
- sev->handle = value;
-}
-
-static void
-qsev_guest_set_policy(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- QSevGuestInfo *sev = QSEV_GUEST_INFO(obj);
- uint32_t value;
-
- visit_type_uint32(v, name, &value, errp);
- sev->policy = value;
-}
-
-static void
-qsev_guest_set_cbitpos(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- QSevGuestInfo *sev = QSEV_GUEST_INFO(obj);
- uint32_t value;
-
- visit_type_uint32(v, name, &value, errp);
- sev->cbitpos = value;
-}
-
-static void
-qsev_guest_set_reduced_phys_bits(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- QSevGuestInfo *sev = QSEV_GUEST_INFO(obj);
- uint32_t value;
-
- visit_type_uint32(v, name, &value, errp);
- sev->reduced_phys_bits = value;
-}
-
-static void
-qsev_guest_get_policy(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- uint32_t value;
- QSevGuestInfo *sev = QSEV_GUEST_INFO(obj);
-
- value = sev->policy;
- visit_type_uint32(v, name, &value, errp);
-}
-
-static void
-qsev_guest_get_handle(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- uint32_t value;
- QSevGuestInfo *sev = QSEV_GUEST_INFO(obj);
-
- value = sev->handle;
- visit_type_uint32(v, name, &value, errp);
-}
-
-static void
-qsev_guest_get_cbitpos(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- uint32_t value;
- QSevGuestInfo *sev = QSEV_GUEST_INFO(obj);
-
- value = sev->cbitpos;
- visit_type_uint32(v, name, &value, errp);
-}
-
-static void
-qsev_guest_get_reduced_phys_bits(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
-{
- uint32_t value;
- QSevGuestInfo *sev = QSEV_GUEST_INFO(obj);
-
- value = sev->reduced_phys_bits;
- visit_type_uint32(v, name, &value, errp);
-}
-
-static void
qsev_guest_init(Object *obj)
{
QSevGuestInfo *sev = QSEV_GUEST_INFO(obj);
sev->sev_device = g_strdup(DEFAULT_SEV_DEVICE);
sev->policy = DEFAULT_GUEST_POLICY;
- object_property_add(obj, "policy", "uint32", qsev_guest_get_policy,
- qsev_guest_set_policy, NULL, NULL, NULL);
- object_property_add(obj, "handle", "uint32", qsev_guest_get_handle,
- qsev_guest_set_handle, NULL, NULL, NULL);
- object_property_add(obj, "cbitpos", "uint32", qsev_guest_get_cbitpos,
- qsev_guest_set_cbitpos, NULL, NULL, NULL);
- object_property_add(obj, "reduced-phys-bits", "uint32",
- qsev_guest_get_reduced_phys_bits,
- qsev_guest_set_reduced_phys_bits, NULL, NULL, NULL);
+ object_property_add_uint32_ptr(obj, "policy", &sev->policy,
+ OBJ_PROP_FLAG_READWRITE, NULL);
+ object_property_add_uint32_ptr(obj, "handle", &sev->handle,
+ OBJ_PROP_FLAG_READWRITE, NULL);
+ object_property_add_uint32_ptr(obj, "cbitpos", &sev->cbitpos,
+ OBJ_PROP_FLAG_READWRITE, NULL);
+ object_property_add_uint32_ptr(obj, "reduced-phys-bits",
+ &sev->reduced_phys_bits,
+ OBJ_PROP_FLAG_READWRITE, NULL);
}
/* sev guest info */
--
1.8.3.1
next prev parent reply other threads:[~2020-03-16 21:39 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-16 21:26 [PULL 00/61] Misc patches for soft freeze Paolo Bonzini
2020-03-16 21:26 ` [PULL 01/61] scsi/qemu-pr-helper: Fix out-of-bounds access to trnptid_list[] Paolo Bonzini
2020-03-16 21:26 ` [PULL 02/61] optionrom/pvh: scan entire RSDP Area Paolo Bonzini
2020-03-16 21:26 ` [PULL 03/61] misc: Replace zero-length arrays with flexible array member (automatic) Paolo Bonzini
2020-03-16 21:26 ` [PULL 04/61] misc: Replace zero-length arrays with flexible array member (manual) Paolo Bonzini
2020-03-16 21:26 ` [PULL 05/61] configure: add configure option avx512f_opt Paolo Bonzini
2020-03-16 21:26 ` [PULL 06/61] util: add util function buffer_zero_avx512() Paolo Bonzini
2020-03-16 22:02 ` Paolo Bonzini
2020-03-16 21:26 ` [PULL 07/61] WHPX: TSC get and set should be dependent on VM state Paolo Bonzini
2020-03-16 21:26 ` [PULL 08/61] WHPX: Use QEMU values for trapped CPUID Paolo Bonzini
2020-03-16 21:26 ` [PULL 09/61] MAINTAINERS: Add entry for Guest X86 HAXM CPUs Paolo Bonzini
2020-03-17 7:46 ` Colin Xu
2020-03-17 8:26 ` Paolo Bonzini
2020-03-17 8:55 ` Colin Xu
2020-03-17 10:27 ` Paolo Bonzini
2020-03-18 0:23 ` Colin Xu
2020-03-16 21:26 ` [PULL 10/61] hw/i386/intel_iommu: Fix out-of-bounds access on guest IRT Paolo Bonzini
2020-03-16 21:26 ` [PULL 11/61] oslib-posix: initialize mutex and condition variable Paolo Bonzini
2020-03-16 21:26 ` [PULL 12/61] build-sys: do not make qemu-ga link with pixman Paolo Bonzini
2020-03-16 21:26 ` [PULL 13/61] modules: load modules from versioned /var/run dir Paolo Bonzini
2020-03-16 21:26 ` [PULL 14/61] configure: Fix building with SASL on Windows Paolo Bonzini
2020-03-16 21:26 ` [PULL 15/61] tests/docker: Install SASL library to extend code coverage on amd64 Paolo Bonzini
2020-03-16 21:26 ` [PULL 16/61] memory: Fix start offset for bitmap log_clear hook Paolo Bonzini
2020-03-16 21:26 ` [PULL 17/61] qom/object: enable setter for uint types Paolo Bonzini
2020-03-16 21:26 ` [PULL 18/61] ich9: fix getter type for sci_int property Paolo Bonzini
2020-03-16 21:26 ` [PULL 19/61] ich9: Simplify ich9_lpc_initfn Paolo Bonzini
2020-03-16 21:26 ` Paolo Bonzini [this message]
2020-03-16 21:26 ` [PULL 21/61] i386: Fix GCC warning with snprintf when HAX is enabled Paolo Bonzini
2020-03-16 21:26 ` [PULL 22/61] WHPX: Use proper synchronization primitives while processing Paolo Bonzini
2020-03-16 21:26 ` [PULL 23/61] Makefile: Align 'help' target output Paolo Bonzini
2020-03-16 21:26 ` [PULL 24/61] Makefile: Let the 'help' target list the tools targets Paolo Bonzini
2020-03-16 21:26 ` [PULL 25/61] hw/audio/fmopl: Move ENV_CURVE to .heap to save 32KiB of .bss Paolo Bonzini
2020-03-16 21:26 ` [PULL 26/61] hw/audio/intel-hda: Use memory region alias to reduce .rodata by 4.34MB Paolo Bonzini
2020-03-16 21:26 ` [PULL 27/61] hw/usb/quirks: Use smaller types to reduce .rodata by 10KiB Paolo Bonzini
2020-03-16 21:26 ` [PULL 28/61] ui/curses: Make control_characters[] array const Paolo Bonzini
2020-03-16 21:26 ` [PULL 29/61] ui/curses: Move arrays to .heap to save 74KiB of .bss Paolo Bonzini
2020-03-16 21:26 ` [PULL 30/61] qemu-cpu-models.rst: Document -noTSX, mds-no, taa-no, and tsx-ctrl Paolo Bonzini
2020-03-16 21:26 ` [PULL 31/61] softmmu/vl.c: Handle '-cpu help' and '-device help' before 'no default machine' Paolo Bonzini
2020-03-16 21:26 ` [PULL 32/61] Use -isystem for linux-headers dir Paolo Bonzini
2020-03-16 21:27 ` [PULL 33/61] exec/rom_reset: Free rom data during inmigrate skip Paolo Bonzini
2020-03-16 21:27 ` [PULL 34/61] cpus: avoid pause_all_vcpus getting stuck due to race Paolo Bonzini
2020-03-16 21:27 ` [PULL 35/61] lockable: add lock guards Paolo Bonzini
2020-03-16 21:27 ` [PULL 36/61] lockable: add QemuRecMutex support Paolo Bonzini
2020-03-16 21:27 ` [PULL 37/61] memory: Correctly return alias region type Paolo Bonzini
2020-03-16 21:27 ` [PULL 38/61] memory: Simplify memory_region_init_rom_nomigrate() to ease review Paolo Bonzini
2020-03-16 21:27 ` [PULL 39/61] scripts/cocci: Rename memory-region-{init-ram -> housekeeping} Paolo Bonzini
2020-03-16 21:27 ` [PULL 40/61] scripts/cocci: Patch to replace memory_region_init_{ram, readonly -> rom} Paolo Bonzini
2020-03-16 21:27 ` [PULL 41/61] hw/arm: Use memory_region_init_rom() with read-only regions Paolo Bonzini
2020-03-16 21:27 ` [PULL 42/61] hw/display: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 43/61] hw/m68k: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 44/61] hw/net: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 45/61] hw/pci-host: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 46/61] hw/ppc: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 47/61] hw/riscv: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 48/61] hw/sh4: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 49/61] hw/sparc: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 50/61] scripts/cocci: Patch to detect potential use of memory_region_init_rom Paolo Bonzini
2020-03-16 21:27 ` [PULL 51/61] scripts/cocci: Patch to remove unnecessary memory_region_set_readonly() Paolo Bonzini
2020-03-16 21:27 ` [PULL 52/61] scripts/cocci: Patch to let devices own their MemoryRegions Paolo Bonzini
2020-03-16 21:27 ` [PULL 53/61] hw/core: Let devices own the MemoryRegion they create Paolo Bonzini
2020-03-16 21:27 ` [PULL 54/61] hw/display: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 55/61] hw/dma: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 56/61] hw/riscv: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 57/61] hw/char: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 58/61] hw/arm/stm32: Use memory_region_init_rom() with read-only regions Paolo Bonzini
2020-03-16 21:27 ` [PULL 59/61] hw/ppc/ppc405: " Paolo Bonzini
2020-03-16 21:27 ` [PULL 60/61] hw/arm: Remove unnecessary memory_region_set_readonly() on ROM alias Paolo Bonzini
2020-03-16 21:27 ` [PULL 61/61] hw/arm: Let devices own the MemoryRegion they create Paolo Bonzini
2020-03-16 23:58 ` [PULL 00/61] Misc patches for soft freeze no-reply
2020-03-17 0:27 ` no-reply
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